JPH07121123B2 - Coding processor - Google Patents
Coding processorInfo
- Publication number
- JPH07121123B2 JPH07121123B2 JP62047351A JP4735187A JPH07121123B2 JP H07121123 B2 JPH07121123 B2 JP H07121123B2 JP 62047351 A JP62047351 A JP 62047351A JP 4735187 A JP4735187 A JP 4735187A JP H07121123 B2 JPH07121123 B2 JP H07121123B2
- Authority
- JP
- Japan
- Prior art keywords
- block
- signal
- circuit
- invalid
- invalid block
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/80—Details of filtering operations specially adapted for video compression, e.g. for pixel interpolation
- H04N19/82—Details of filtering operations specially adapted for video compression, e.g. for pixel interpolation involving filtering within a prediction loop
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/60—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding
- H04N19/61—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding in combination with predictive coding
Description
【発明の詳細な説明】 （１）発明の属する技術分野 本発明は，動画像信号の差分信号を高能率に符号化伝送
する符号化処理装置に関する。Description: TECHNICAL FIELD The present invention relates to a coding processing device that codes and transmits a differential signal of a moving image signal with high efficiency.
（２）従来の技術 例えばフレーム間符号化処理装置は，符号化済みの過去
の画像信号を用いて予測信号を構成し，得られた予測誤
差信号を量子化符号化伝送することにより高能率に符号
化するものである。(2) Conventional Technology For example, an interframe coding processing device is highly efficient by constructing a prediction signal using a past image signal that has been coded, and performing quantized coding transmission of the obtained prediction error signal. It is to be encoded.
従来のフレーム間符号化処理装置では，符号化効率を高
めることを目的として画像を複数画素毎にブロック化
し，ブロック内のフレーム間差分信号電力和が所定のし
きい値より小さい時このブロックを無効ブロックと定義
し，この無効ブロックに対しては無効ブロックであるこ
とを表す無効ブロック識別情報のみを伝送する。そし
て，有効ブロックについては有効ブロックであることを
表す有効ブロック識別情報と共に，フレーム間差分信号
を量子化して伝送する。量子化に際しては，伝送情報量
を削減するため，フレーム間差分信号の高周波成分を除
去するような量子化特性を用いる。また，予測信号を作
成する場合，前記量子化に際して含まれる量子化雑音の
影響を軽減するため，局部復号信号の帯域を制限した後
予測信号を構成している。In the conventional inter-frame coding processing device, an image is divided into blocks for every plurality of pixels for the purpose of improving coding efficiency, and this block is invalidated when the inter-frame difference signal power sum in the block is smaller than a predetermined threshold value. It is defined as a block, and only the invalid block identification information indicating the invalid block is transmitted to this invalid block. Then, with respect to the effective block, the inter-frame difference signal is quantized and transmitted together with the effective block identification information indicating that it is an effective block. At the time of quantization, in order to reduce the amount of transmission information, a quantization characteristic that removes high frequency components of the inter-frame difference signal is used. Further, when creating a prediction signal, the prediction signal is configured after limiting the band of the locally decoded signal in order to reduce the influence of quantization noise included in the quantization.
このように，従来装置における予測信号は高周波成分を
除去されているため，高周波成分を含む入力信号を符号
化する場合には，画像の静止領域であっても入力信号成
分と予測信号成分の不整合によりフレーム間差分信号が
非所望に発生し，有効ブロックと判定され多量の情報が
発生する欠点があった。As described above, since the high-frequency component is removed from the prediction signal in the conventional device, when the input signal including the high-frequency component is encoded, the input signal component and the prediction signal component are not included even in the still region of the image. Due to the matching, an inter-frame difference signal is generated undesirably, and it is determined that the block is a valid block, and a large amount of information is generated.
また，復号信号の帯域を制限すること無く予測信号を構
成する他の従来装置においても，量子化雑音が予測信号
に含まれる為，静止領域である場合でもフレーム間差分
信号が発生し，有効ブロックと判定され多量の情報が発
生する欠点があった。Also, in other conventional devices that configure the prediction signal without limiting the band of the decoded signal, since the quantization noise is included in the prediction signal, the inter-frame difference signal is generated even in the still region and the effective block is generated. Therefore, there is a drawback that a large amount of information is generated.
（３）発明の目的 本発明は，画像の静止領域について正確に無効ブロック
と判定し，高能率符号化を可能とする符号化処理装置を
提供することにある。(3) Object of the Invention It is an object of the present invention to provide an encoding processing device capable of accurately determining a still region of an image as an invalid block and enabling high-efficiency encoding.
（４）発明の構成 ４−１発明の特徴と従来の技術との差異 本発明は高周波帯域を制限した差分信号を用いて有効／
無効ブロックの判定を行うことを特徴とする。従来の技
術とは，有効／無効ブロックの判定に用いる差分信号が
異なる。(4) Configuration of the Invention 4-1 Differences between Features of the Invention and Prior Art The present invention is effective by using a differential signal with a high frequency band limited.
The feature is that an invalid block is determined. The difference signal used for the determination of the valid / invalid block is different from the conventional technique.
４−２実施例 図は本発明の１実施例であって,1は画像入力端子,2はフ
レーム差分回路,3は量子化回路,4はフレーム加算回路,5
は予測回路,6はフィルタ,7は有効／無効ブロック判定回
路,8はエントロピー符号化回路,9はバッファメモリ,10
はデータ出力端子である。ディジタル化された画像信号
は画像入力端子１から入力され，フレーム差分回路２に
おいて予測回路５から供給される予測信号を引き算さ
れ，得られたフレーム差分信号が量子化回路３において
量子化される。量子化代表値はフレーム加算回路４およ
びエントロピー符号化回路８に供給される。フレーム加
算回路４では量子化代表値と前記予測信号とを加算し，
その結果を予測回路５に供給する。予測回路５は１フレ
ーム以上のメモリを含み入力信号に対しフレーム間予測
信号を作成する。なお，本発明がフィールド間予測装置
として使用される場合には当該予測回路５は１フィール
ド程度のメモリを含めばよい。4-2 Embodiment FIG. 1 is an embodiment of the present invention, in which 1 is an image input terminal, 2 is a frame difference circuit, 3 is a quantization circuit, 4 is a frame addition circuit, 5
Is a prediction circuit, 6 is a filter, 7 is a valid / invalid block determination circuit, 8 is an entropy coding circuit, 9 is a buffer memory, 10
Is a data output terminal. The digitized image signal is input from the image input terminal 1, the frame difference circuit 2 subtracts the prediction signal supplied from the prediction circuit 5, and the obtained frame difference signal is quantized in the quantization circuit 3. The quantized representative value is supplied to the frame addition circuit 4 and the entropy coding circuit 8. The frame addition circuit 4 adds the quantized representative value and the prediction signal,
The result is supplied to the prediction circuit 5. The prediction circuit 5 includes a memory for one frame or more and creates an interframe prediction signal for an input signal. When the present invention is used as an inter-field prediction device, the prediction circuit 5 may include a memory for about 1 field.
フィルタ６はフレーム差分回路２の出力すなわちフレー
ム間差分信号を入力し，その高周波成分を除去する。有
効／無効ブロック判定回路７はフィルタ６において帯域
制限されたフレーム間差分信号を入力し，これを所定の
大きさにブロック化し，ブロック内のフレーム間差分信
号電力和が所定のしきい値未満のとき無効ブロックと判
定し，しきい値以上の時有効ブロックと判定する。The filter 6 receives the output of the frame difference circuit 2, that is, the inter-frame difference signal, and removes the high frequency component thereof. The valid / invalid block judgment circuit 7 inputs the band-limited inter-frame difference signal in the filter 6, blocks it into a predetermined size, and makes the inter-frame difference signal power sum within the block less than a predetermined threshold value. When it is above the threshold, it is judged to be a valid block.
ここでは１例としてフレーム間差分信号電力和を用いて
判定を行う方法について述べたが，このほかにフレーム
間差分信号絶対値の和がしきい値を越えるか否か等各種
の方式があることは容易に類推でき，本発明は単にフレ
ーム間差分信号電力和を用いる装置に制限されるもので
はない。Here, as an example, the method of making a judgment using the sum of inter-frame difference signal powers has been described, but there are various other methods such as whether or not the sum of the absolute values of inter-frame difference signals exceeds a threshold value. Can be easily analogized, and the present invention is not limited to devices that simply use interframe difference signal power sums.
無効ブロックと判定されたブロックでは量子化回路３に
おいて当該ブロックに含まれるフレーム間差分の量子化
代表値をゼロに変換する。エントロピー符号化回路８は
有効／無効ブロック判定回路７から供給される有効／無
効ブロック識別情報及び量子化回路３から供給される量
子化出力を入力し，これらに対し，所定の符号を割り当
てる。バッファメモリ９はエントロピー符号化回路８か
ら供給される不均一なデータを速度平滑し，伝送路上の
信号形式に変換した後，一定の伝送速度でデータ出力端
子10を介して受信側に伝送する。In the block determined as an invalid block, the quantization circuit 3 converts the quantized representative value of the inter-frame difference included in the block into zero. The entropy coding circuit 8 inputs the valid / invalid block identification information supplied from the valid / invalid block determination circuit 7 and the quantized output supplied from the quantization circuit 3, and assigns a predetermined code to them. The buffer memory 9 performs speed smoothing on the non-uniform data supplied from the entropy coding circuit 8, converts it into a signal format on the transmission path, and then transmits it to the receiving side via the data output terminal 10 at a constant transmission speed.
（５）発明の効果 以上説明したように，本発明によれば，有効／無効ブロ
ックの判定に際し，帯域制限を行った差分信号を用いる
ようにしたため，量子化雑音の影響あるいは帯域制限さ
れた予測信号と帯域制限されていない入力信号との不整
合の影響を受けることが無く，画像の静止領域について
正確に無効ブロックと判定することができ，不要な情報
の発生を防ぎ高能率な符号化を実現できる利点がある。(5) Effects of the Invention As described above, according to the present invention, since the band-limited differential signal is used when determining valid / invalid blocks, the influence of quantization noise or band-limited prediction is used. The static area of the image can be accurately determined as an invalid block without being affected by the mismatch between the signal and the input signal whose band is not limited, and unnecessary information can be prevented from being generated and highly efficient encoding can be performed. There are advantages that can be realized.
図は本発明の１実施例構成を示す。 １……画像入力端子,2……フレーム差分回路,3……量子
化回路,4……フレーム加算回路,5……予測回路,6……フ
ィルタ,7……有効／無効ブロック判定回路,8……エント
ロピー符号化回路,9……バッファメモリ,10……データ
出力端子。The figure shows the configuration of an embodiment of the present invention. 1 ... Image input terminal, 2 ... Frame difference circuit, 3 ... Quantization circuit, 4 ... Frame addition circuit, 5 ... Prediction circuit, 6 ... Filter, 7 ... Valid / invalid block determination circuit, 8 ...... Entropy coding circuit, 9 ... Buffer memory, 10 ... Data output terminal.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 安田 浩 神奈川県横須賀市武１丁目2356番地 日本 電信電話株式会社複合通信研究所内 (56)参考文献 特開 昭60−158787（ＪＰ，Ａ) 特開 昭61−200788（ＪＰ，Ａ) 特開 昭51−58014（ＪＰ，Ａ) 日経エレクトロニクスＮｏ．341（1984 −４−23）Ｐ．197−203 電子通信学会技術報告 ＩＥ77−42 Ｐ．79−86 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Hiroshi Yasuda 1-2356 Takeshi, Yokosuka City, Kanagawa, Japan, NTT Communications Corporation (56) Reference JP-A-60-158787 (JP, A) 61-200788 (JP, A) JP-A-51-58014 (JP, A) Nikkei Electronics No. 341 (1984-4-23) P.I. 197-203 IEICE Technical Report IE77-42 P. 79-86
Claims (1)
ック化し，該ブロック毎に一括して符号化処理を行う符
号化処理装置において， 符号化処理に当って得られた差分信号を量子化回路に導
いて量子化するよう構成すると共に， 当該得られた差分信号が導かれて当該差分信号を所定の
周波数帯域内の信号に制限するフィルタと， 当該所定の周波数帯域内に制限された差分信号を用い
て，当該ブロックが上記量子化回路に導かれた差分信号
を伝送すべき有効ブロックかあるいは伝送する必要のな
い無効ブロックのいずれであるかを判定する有効／無効
ブロック判定回路とをそなえ， 当該判定された有効ブロックについては有効ブロックで
あることを表す有効ブロック識別情報と共に上記量子化
回路に導かれた差分信号を量子化した結果とを伝送し，
上記判定された無効ブロックについては当該無効ブロッ
クについての上記量子化回路に導かれた差分信号の伝送
を省略して当該無効ブロックであることを表す無効ブロ
ック識別情報のみを伝送するようにした ことを特徴とする符号化処理装置。1. An encoding processing apparatus for dividing an input image signal into blocks for each predetermined number of samples and performing an encoding process collectively for each block, wherein a difference signal obtained in the encoding process is quantized. A filter configured to guide the signal to the circuit for quantization, to which the obtained differential signal is guided to limit the differential signal to a signal within a predetermined frequency band, and a difference limited to within the predetermined frequency band. And a valid / invalid block determination circuit for determining whether the block is a valid block for transmitting the differential signal introduced to the quantization circuit or an invalid block that does not need to be transmitted, using the signal. , For the determined effective block, the effective block identification information indicating that it is an effective block and the result of quantizing the differential signal introduced to the quantization circuit are Transmit,
For the determined invalid block, the transmission of the differential signal guided to the quantization circuit for the invalid block is omitted and only the invalid block identification information indicating the invalid block is transmitted. A characteristic encoding processing device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62047351A JPH07121123B2 (en) | 1987-03-02 | 1987-03-02 | Coding processor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62047351A JPH07121123B2 (en) | 1987-03-02 | 1987-03-02 | Coding processor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63214091A JPS63214091A (en) | 1988-09-06 |
| JPH07121123B2 true JPH07121123B2 (en) | 1995-12-20 |
Family
ID=12772724
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62047351A Expired - Lifetime JPH07121123B2 (en) | 1987-03-02 | 1987-03-02 | Coding processor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH07121123B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9196800B2 (en) | 1996-06-26 | 2015-11-24 | Osram Gmbh | Light-radiating semiconductor component with a luminescence conversion element |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02241289A (en) * | 1989-03-15 | 1990-09-25 | Fujitsu Ltd | Picture encoding control system |
| JPH09200769A (en) * | 1996-01-16 | 1997-07-31 | Nec Corp | Inter-motion compensation frame encoding system |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5158014A (en) * | 1974-11-18 | 1976-05-21 | Nippon Telegraph & Telephone | FUREEMUKAN FUGOKAHOSHIKI |
| JPS60158787A (en) * | 1984-01-30 | 1985-08-20 | Mitsubishi Electric Corp | Interframe vector encoder |
| JPS61200788A (en) * | 1985-03-04 | 1986-09-05 | Kokusai Denshin Denwa Co Ltd <Kdd> | Time axis filtering system for elimination of coding noise |
-
1987
- 1987-03-02 JP JP62047351A patent/JPH07121123B2/en not_active Expired - Lifetime
Non-Patent Citations (2)
| Title |
|---|
| 日経エレクトロニクスＮｏ．３４１（１９８４−４−２３）Ｐ．１９７−２０３ |
| 電子通信学会技術報告ＩＥ７７−４２Ｐ．７９−８６ |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9196800B2 (en) | 1996-06-26 | 2015-11-24 | Osram Gmbh | Light-radiating semiconductor component with a luminescence conversion element |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS63214091A (en) | 1988-09-06 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |