JPH07121033B2 - Test relay drive circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Outline] A test relay drive circuit for driving a test relay provided for each circuit of a plurality of circuits under test for connecting to a common test device, The purpose is to provide a test relay drive circuit that prevents all test relays in the group from being driven when two or more relay drive signals are received simultaneously. When driving a test relay provided for each circuit under test, for each group of the test relay consisting of an appropriate number, a signal line for receiving a relay drive signal sent to each of the test relays, and , An output signal provided corresponding to each of the signal lines, and inputting all the signal lines except the corresponding signal line and not receiving the relay drive signal by all the input signal lines. To a signal monitoring output line, and a signal monitoring circuit provided corresponding to all the signal lines, each signal line and the signal monitoring output line corresponding to the signal line are input, and the relay is connected to the signal line. A relay drive output circuit for sending a relay drive output signal to a relay drive line connected to a test relay when a drive signal is input and an output signal of the signal monitor circuit is input to the signal monitor output line. Constitute.

[Industrial application field]

The present invention relates to a test relay drive circuit that drives a test relay provided for each circuit of a plurality of circuits under test for connecting to a common test apparatus.

In circuits where one of the input / output terminals is connected to the opposite device via the subscriber line or trunk line, and the other is connected to the telephone network of the exchange, such as the subscriber circuit or trunk circuit of the exchange, the line side In order to carry out the test of 1) or the test of the exchange side including its own circuit, the test can be performed separately for the line side and the circuit side. Since the test in this case is performed using a common test apparatus, each circuit is equipped with a test relay for connecting to the test apparatus. During the test, one circuit is connected to the test equipment from multiple circuits under test, so the tester specifies the circuit under test and sends a relay drive signal to the test relay of the circuit under test via a control system. Is sent.

FIG. 3 is a configuration diagram of a test device connection circuit, showing a circuit configuration when a subscriber circuit or a trunk circuit and a test device are connected by a test relay contact.

FIG. 3 shows one subscriber package or trunk package in which eight circuits are mounted. In the figure, t ₁₁
~ T ₁₄ and t ₈₁ ~ t ₈₄ are contacts of test relays T ₁ and T ₈ (relay windings are not shown) that connect the line under test / circuit # 1 and the line under test / circuit # 8 to the test equipment, respectively. is there. As is clear from the figure, when multiple test relays operate simultaneously, multiple lines or circuits are crossed, and in the case of testing on the circuit side, the high-voltage signal sent from one subscriber circuit is There may be a situation where the electronic circuit portion of another subscriber circuit is added and the electronic circuit portion is destroyed. For this reason, care is taken that no two or more test relays operate at the same time. In an electronic exchange, control is often performed by software so that two or more test relays do not operate at the same time. However, in the case of control by software, the software may run out of control due to some abnormality. In this case, only one circuit is used. The limiting condition of operating the test relay may not work. In addition to the software, the above conditions may not be satisfied even when the signal becomes abnormal due to a failure of the control system interface.

In order to prevent the above-mentioned abnormalities, it is effective to prevent two or more test relays from operating at the end of the test relay drive circuit. A method is used to prevent multiple test relays from operating due to hardware.

However, the above-mentioned method using hardware has drawbacks such as complicated wiring. Therefore, it is possible to prevent the operation of two or more test relays at the end of the drive circuit of the test relay with a simple configuration. Realization is required.

[Conventional technology]

FIG. 4 is a configuration diagram of a test relay drive circuit according to a conventional method, and shows a test relay drive circuit portion of a package in which eight sets of subscriber circuits or trunk circuits are mounted.

In the figure, 21 _{1 to} 21 ₈ are signal lines to which relay drive signals are input, 22 _{2 to} 22 ₈ are NOR logic circuits, 23 ₁ to 23 ₈ are AND logic circuits,
24 _{2 to} 24 ₈ are the output lines of the NOR logic circuits 22 _{2 to} 22 ₈ , 25 _{1 to} 25 _N are relay drive lines for sending the relay drive output signals, and the output lines of the AND logic circuits 23 ₁ to 23 ₈ , and 26 is the NOR A circuit for outputting priority information to another package in the logic circuit, 27 is a priority information output line indicating that the priority is higher than the other package, an output line of the NOR logic circuit 26, 28 is another package It is a priority information input line that tells you that there is.

It provided for each test relay signal lines 21 ₁ to 21 _8, which is not shown in each circuit under test in FIG. 4, the relay driving signal to any one of the signal lines in the normal operation is input. For some reason, the circuit shown in FIG.
₁ to 21 in case the relay drive signals simultaneously two or more of the ₈ is input, the priority of the provided signal lines in the example of FIG is constituted so that only the test relay located at the lowest priority to work 21 ₁ is the highest priority, and is set in the following order in the order 21 ₂ , 21 ₃ , ..., 21 ₈ . This will be described below with reference to FIG.

When the relay drive signal is input only to the signal line 21 ₁ , the signal is input to the AND logic circuit 23 ₁ . State to the AND logic circuit 23 ₁ is priority information input line 28 than the other packages are connected, the priority information input line 28 except when operating the preferentially test relay in other package output is sent That is, it is in the ON state. Since one test relay only operated to a common test apparatus in normal operation, the relay drive signal to the other package of common test device when the relay driving signal to the signal line 21 ₁ is input is not sent , The priority information input line 28 from other packages is on. Therefore, the AND logic circuit 23 ₁
Is turned on by the input of the relay drive signal (ON) from the signal line 21 _1, and sends the relay drive signal to the relay drive line 25 ₁ connected to the test relay or the driver of the relay.

Next, a case where the relay drive signals are simultaneously input to the signal lines 21 ₁ and 21 ₂ for some reason will be described. The relay drive signal is input to AND logic circuits 23 ₁ and 23 ₂ through signal lines 21 ₁ and 21 _2, respectively. However, the AND logic circuit 23 ₂
Since the output line 24 ₂ of the NOR logic circuit 22 ₂ and the priority information input line 28 from another package are input to the node, even if the priority information input line 28 from another package is in the ON state,
If the output line 24 ₂ of the R logic circuit is not on, the relay drive line 25
_No output is sent to ₂ . In the above example, the signal line 21 ₁ is inputted to the NOR logic circuit 22 ₂ and the relay drive signal is inputted (turned on) to the signal line 21 ₁ so that the output line of the NOR logic circuit 22 ₂ is outputted. 24 ₂ is off. Therefore, the AND logic circuit 23 ₂ and thus can not be sent to output.
On the other hand, since the AND logic circuit 23 ₁ is not affected by the presence / absence of the relay drive signal on the signal line 21 ₂ , the AND logic circuit 23 ₁ sends an output according to the relay drive signal input to the signal line 21 ₁ . That is, since the signal line 21 ₁ has a higher priority, the relay drive output signal is transmitted to the relay drive line 25 ₁ and the signal line 2 1
Since 1 ₂ has a lower priority than the signal line 21 ₂ , no relay drive output signal is sent to the relay drive line 25 ₂ .

As described above, only the test relays having the higher priority are operated in one package.

Further, when a plurality of packages as described above are connected to a common test apparatus, priority is set among the packages. For example, when the package shown in FIG. 4 is at a position prioritizing other packages, the priority information output line 27 is connected to the priority information input line 28 of the other package which is the second lower priority. All the signal lines 21 _{1 to} 21 ₈ are connected to the inputs of the NOR logic circuit 26, and when all the signal lines 21 _{1 to} 21 ₈ do not receive the relay drive signal, that is, when the signal is off, priority information is given. The output line 27 is turned on. Priority information output line 27 of the output portion of the signal line 21 ₁ If through 21 ₈ relay drive signal to one of the input NOR logic circuit 26 is turned off. Since the priority information output line 27 is connected through the priority information input line 28 of the other package of priority after position to the AND logic circuit 23 ₁ to 23 ₈ of the other packages, the priority information output line 27 is turned off In other packages, all AND logic circuits 23 ₁ to 23 ₈
Cannot send output. That is, when the package with the priority in the front drives the test relay, the package with the priority in the rear cannot output the relay drive output signal.

However, since the conventional test relay drive circuit shown in FIG. 4 requires prioritization among a plurality of packages, the above-mentioned prioritization is performed among the packages of all subscriber circuits or trunk circuits having a common test device. Since it is necessary to wire the priority information input / output lines 27 and 28 for giving the information, the wiring work at the time of newly adding a device becomes considerably complicated. In particular, when the above function is newly added to the existing system that does not have the test relay drive circuit as shown in FIG. 4 as a measure against software runaway, the above wiring should be installed on the package, shelf, rack, etc. If it is necessary to add terminals and cables for this purpose, the amount of work is large and the cost is high.

[Problems to be Solved by the Invention]

As described above, the conventional method of operating only the test relay having the highest priority when two or more signal lines for driving the test relay receive the relay drive signal at the same time requires complicated wiring, It was difficult to add the above functions to the system.

An object of the present invention is to provide a test relay drive circuit that prevents all test relays in a group from being driven when two or more of the test relays in the group receive a relay drive signal at the same time. .

[Means for Solving the Problems]

 FIG. 1 is an explanatory view of the principle of the present invention.

FIG. 1 shows an appropriate number of test relays, for example, the number N of circuits under test mounted in one package as a group, and shows the configuration of a test relay drive circuit installed for each group of the test relays. In the figure, 1 ₁ to 1 _N are signal lines, lines for receiving relay drive signals for driving individual test relays from a control system, etc., 2 ₁ to 2 _N are signal monitoring circuits, and the signal lines 1 ₁ 1 to 1 _N , each of which outputs an output signal when all the signal lines other than the corresponding signal line are not receiving the relay drive signal, 3 _{1 to} 3 _N are relay drive outputs in the circuit, it provided corresponding to the signal lines 1 ₁ to 1 _N, one of each of the signal lines 1 ₁ to 1 _N, for example, signal lines 1 _1, and the signal monitoring circuit corresponding to the signal lines 1 ₁ 2 ₁ of the output section as input, is input the relay drive signal to the signal lines 1 _1, and the test relay sends only relay drive output signal when the output signal from the signal monitoring circuit 2 ₁ is being transmitted That drives
4 ₁ to 4 _N is a line for transmitting the output signal of the signal monitoring circuit 2 ₁ to 2 _N in the signal monitoring output line, 5 ₁ to 5 _N at a relay driving line, the relay drive output circuit 3 ₁ to 3 _N It is a line for transmitting a relay drive output signal which is an output signal.

[Action]

In FIG. 1, the signal monitoring circuits 2 ₁ to 2 _N output signals when there is no input signal, for example, signal monitoring output lines 4 ₁ to 4 _N.
The relay drive output circuits 3 _{1 to} 3 _N each have two inputs, that is, the signal lines 1 ₁ to 1 _N and the signal monitoring output line 4 ₁ It is configured to deliver an output signal when both ~ 4 _N have an input signal.

Now, any _{one of} the signal lines 1 ₁ to 1 _N , for example, the signal line ₁₁
Signal monitoring circuit when relay drive signal is input only to
Since 2 there is no input Any _one of the input section and going on signal line 1 ₂ to 1 _N, the signal monitoring circuit 2 ₁ of the output portion of the signal monitoring output line 4 ₁
An output signal is sent to. Therefore, the relay drive output circuit 3 ₁ receives signals to both the input signal line 1 ₁ and the signal monitoring output line 4 ₁ and sends a relay drive output signal for driving the test relay to the relay drive line 5 ₁ of the output section. This allows
Signal lines 1 ₁ to test the relay or the test relay is not shown corresponding driver is driven.

Next, the case where the signal lines 1 ₁ and the relay driving signal simultaneously to 1 ₂ is input.

In a normal state, the relay drive signal is not simultaneously input to two or more signal lines of the signal lines 1 ₁ to ₁₂ , but the signal is output due to an abnormality in the control system (not shown) that transmits the relay drive signal. line 1 ₁ and 1 when the relay driving signals simultaneously ₂ is input, the relay drive signal 1 ₁ and the respective signal line
It is input through the 1 ₂ to the relay drive output circuit 3 ₁ and 3 _2.

On the other hand, the signal lines 1 ₁ signal monitoring circuit 2 ₂ except the signal monitoring circuit 2 ₁
It is connected to ~ 2 _N in duplicate and the signal line 1 ₂ is connected to the signal monitoring circuit 2 ₂
Are connected to the signal monitoring circuits 2 ₁ and 2 ₃ to 2 _N except for. Therefore, in the above state, the signal monitoring circuit 2 ₁ of the signal monitoring circuit 2 ₁ signal management output line of the output unit for the input of the from the signal line 1 ₂ is receiving a relay driving signal of the input
4 state that does not send the output signal to _1, for example, the OFF state. Similarly, since the signal monitoring circuit 2 ₂ also has an input on the signal line 1 ₁ , the signal monitoring output line 4 ₂ is also in a state in which no output signal is transmitted. That is, the relay drive output circuit 3 ₁ inputs the signal lines 1 ₁ from the relay drive signal, since a state in which signal monitoring output line 4 ₁ does not output the signal as the output of the relay driving line 5 _No output signal is sent to ₁ . Similarly, the relay drive output circuit 3 ₂ does not send the output signal.

As mentioned above, when the one signal lines 1 ₁ only the relay driving signal is inputted, the corresponding relay drive output signal to the relay driving line 5 ₁ delivery, but corresponding test relay is driven, the two signals when the line 1 _1, 1 ₂ to the relay drive signals at the same time is inputted, a relay drive output signals to any of the relay driving line 5 _1, 5 ₂ will not be sent. The same applies to the case where two relay drive signals are simultaneously input to two or more signal lines.

〔Example〕

FIG. 2 is a circuit configuration diagram of an embodiment of the present invention, showing an example composed of eight sets of circuits.

In the figure, 11 _{1 to} 11 ₈ are signal lines, 12 _{1 to} 12 ₈ are NOR logic circuits, and 13 ₁
〜 13 ₈ is an AND logic circuit, 14 ₁ 〜 14 ₈ is the NOR logic circuit 12 ₁ 〜
12 ₈ output lines, 15 ₁ to 15 ₈ are relay drive lines, which are lines for transmitting the relay drive output signals of the outputs of the AND logic circuits 13 _{1 to} 13 ₈ .

In FIG. 2, when the relay drive signal is input to only one signal line, for example, the signal line 11 ₁ , the NOR logic circuit 12 ₁
Since there is no input to the signal lines 11 _{2 to} 11 ₈ of the input section of the
The output line 14 ₁ of the logic circuit 12 ₁ is turned on, which causes
Two inputs of AND logic circuit 13 ₁ , signal line 11 ₁ and NOR logic circuit
12 ₁ of the output line 14 ₁ is turned on in the signal transmission state together,
A relay drive output signal is sent from the AND logic circuit 13 ₁ to the relay drive line 15 ₁ .

Then, when the relay driving signal simultaneously to the signal line 11 ₁ and 11 ₂ is input, the relay drive signal 1 ₁ and the respective signal line
Is input through the 1 ₂ to the AND logic circuit 13 ₁ and 13 _2. On the other hand, the signal line 11 ₁ is connected to the input parts of the NOR logic circuits 12 _{2 to} 12 ₈ in multiple ways, and the signal line 11 ₂ is connected to the NOR logic circuits 12 ₁ and 12 _{3 to} 12 8.
_Since it is connected to ₈ in multiple ways, if relay drive signals are input to both signal lines 11 ₁ and 11 ₂ as described above, N
Neither of the OR logic circuits 12 ₁ and 12 ₂ outputs an output. That is, the NOR logic circuit 12 _1, 12 ₂ of the output lines 14 _1, 14 ₂ both turned off.

Therefore, the AND logic circuit 13 ₁ receives the signal line 11 ₁ which is one of the inputs.
Even if a relay drive signal is input (turned on), the other input, NOR logic circuit 12 ₁ output line 14 ₁ is off as described above, so relay drive output is applied to relay drive line 15 ₁ . No signal is sent. Similarly, the output from the AND logic circuit 13 ₂ is not transmitted.

As described above, when the relay drive signal is input to only one signal line 11 ₁ , the relay drive signal is sent to the corresponding relay drive line 15 ₁ and the relay drive signal is simultaneously driven to the two signal lines 11 ₁ and 11 _2. When a signal is input, relay drive lines 15 ₁ , 1
No relay drive output signal is sent to any of 5 ₂ . When the relay drive signal is simultaneously input to the two signal lines of another combination or two or more signal lines, the same operation as the above example is performed.

Next, the action between the packages will be described. In the configuration of FIG. 2, the transmission information of the relay drive signal in each package is not transmitted to or received from other packages. This is because the present invention adopts a method of stopping the drive of the test relay as an abnormal state when the relay drive signals are simultaneously sent to the plurality of signal lines. In the method of driving only one test relay in each package when a relay drive signal is input to two abnormal signal lines, one more test relay is driven between other packages. However, it is necessary to send and receive information between packages in order to give priority to the packages, but in the present invention, it is not necessary to send and receive information regarding the relay drive signal between the packages according to the above principle. . Therefore, there is a feature that wiring between packages is unnecessary.

It should be noted that a case may be considered in which a test drive operates in each circuit in multiple packages because a relay drive signal is sent to each signal line in multiple packages, and multiple test relays operate as a system. However, the probability that the above-mentioned state will occur in a state where the control system becomes abnormal and an irregular signal is transmitted is extremely low, and can be considered to be almost nonexistent. Further, when the signal transmission system becomes defective, all the signals are normally fixed in the ON or OFF state, so that the simultaneous operation of a plurality of test relays is reliably prevented in the test relay drive circuit according to the present invention. it can.

〔The invention's effect〕

As described above, according to the present invention, even if the relay drive signal is simultaneously sent from the control system to two or more signal lines,
It is possible to prevent multiple test relays from operating at the same time, and there is no need to make complicated wiring between packages when applying them, which greatly contributes to stabilization and simplification of the performance of such test relay drive circuits. .

[Brief description of drawings]

FIG. 1 is a diagram for explaining the principle of the present invention, FIG. 2 is a circuit configuration diagram for an embodiment of the present invention, FIG. 3 is a test device connection circuit configuration diagram, and FIG. 4 is a conventional circuit configuration diagram. In the figure, 1 ₁ to 1 _N , 11 _{1 to} 11 ₈ , 21 _{1 to} 21 ₈ ...... Signal line 2 ₁ to 2 _N ...... Signal monitoring circuit 3 _{1 to} 3 _N ...... Relay drive output circuit 4 ₁ to 4 _N ...... Signal monitoring output line 5 _{1 to} 5 _N , 15 ₁ to 15 ₈ , 25 _{1 to} 25 ₈ ...... Relay drive line 12 _{1 to} 12 ₈ , 22 _{2 to} 22 ₈ , 26 …… NOR logic circuit 13 _{1 to} 13 ₈ and 23 ₁ to 23 ₈ ... AND logic circuit 14 _{1 to} 14 ₈ , 24 _{2 to} 24 ₈ ... NOR logic circuit output line 27 ... priority information output line 28 ... priority information input line.

Claims (1)

[Claims] 1. A circuit for driving a test relay provided for each circuit of a plurality of circuits under test for connecting to a common test apparatus, said test comprising N (N is a positive integer) for each group of relays, the signal line for receiving a relay drive signal sent to each of the test relay and (1 ₁ to 1 _N), signal lines (1 ₁
1 _N ) corresponding to each (1 _i ) (i = 1 to N), and all the signal lines (1 _1- ) except the corresponding signal line (1 _i ).
1 _i-1 , 1 _{i + 1} , to 1 _N ) as input, and the input signal line (1 ₁ to 1)
_i-1 , 1 _{i + 1} to 1 _N ) are not receiving the relay drive signal, and a signal monitoring circuit (2 ₁ to 2 _N ) for sending an output signal to the signal monitoring output line (4 _i ) , All the signal lines (1 ₁ ~
1 _N ) provided for each signal line (1 ₁ to 1 _N )
And signal lines ₍₁ 1 ~1 _N) corresponding to the signal monitoring output line and (4 ₁ ~4 _N) enter, the relay drive signals to the signal lines ₍₁ 1 ~1 _N) is inputted, and The signal monitoring output line (4 ₁ ~
4 _N ) is connected to the test relay when the output signal of the signal monitoring circuit (2 ₁ to 2 _N ) is input to the relay drive line (5 ₁ to
A test relay drive circuit comprising a relay drive output circuit (3 _{1 to} 3 _N ) for sending a relay drive output signal to 5 _N ).