JPH07115598A - Video signal mute processing circuit - Google Patents

Abstract

PURPOSE:To prevent a video image uneasy to see colored at random from being displayed by providing a 1st synchronization discrimination means and a 2nd synchronization discrimination means to a video mute processing circuit for a MUSE receiver so as to detect a synchronization switching point of a MUSE signal accurately and quickly thereby applying video mute processing to the video signal only when the synchronization is switched. CONSTITUTION:A 1st synchronization discrimination device 8 discriminates it to be 1st out of synchronism when a frame synchronizing signal detected by a frame synchronizing signal detector 3 is not introduced in a timing of an internal frame synchronizing signal generated by an internal synchronizing generator 4. A 2nd synchronization discrimination device 14 discriminates it to be 2nd out of synchronism where the internal synchronizing signal is not asynchronously with the incoming MUSE signal when a frame synchronizing signal detected by the frame synchronizing signal detector 3 is introduced in another timing of the internal frame synchronizing signal. A synchronization changeover discrimination device 15 discriminates it to be occurrence of synchronization changeover when both of 1st and 2nd out of synchronism take place to provide a mute signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video mute processing circuit in a high quality television signal receiving apparatus. That is, a high-definition television signal (hereinafter, also referred to as a high-definition signal) is received, and the phase of the synchronization signal included in the received television signal is, for example, during the reception (broadcast program switching (broadcasting)). (Station switching), etc. are performed, and the first phase until the second
When it is detected that the phase has been switched to the phase of, by temporarily stopping the output of the video signal obtained by digitally processing the received television signal to the display circuit, and muting, The present invention relates to a video mute processing circuit that prevents a temporarily disturbed image from being displayed due to switching of broadcast programs (switching of broadcasting stations).

[0002]

2. Description of the Related Art M is one of the methods for band-compressing and transmitting a wideband television signal (high-definition signal).
The USE method is known. This MUSE method is described in detail in Yuichi Ninomiya, December 1, 1990, published by the Institute of Electronics, Information and Communication Engineers, "MUSE-Hi-Vision Transmission Method".

As a conventional example of a video mute circuit used in a MUSE decoder or a high-definition image receiving device which receives this MUSE type television signal and restores the original wide-band television signal (high-vision signal), The method described in Kaihei 2-113788 can be mentioned.

In the video mute circuit according to this conventional technique, a frame pulse detection circuit for detecting a frame pulse which is a synchronizing signal multiplexed in the MUSE signal, and M
A switching means for switching between the output signal (video signal) after decoding the USE signal and a certain pattern signal and outputting either one is provided, and for example, the frame pulse detection circuit normally detects a frame pulse (synchronization signal). If it is not possible, it is determined that there has been out-of-synchronization, that is, there has been a switching of broadcast programs (broadcast station switching), etc., and the switching means is controlled by the out-of-synchronization detection signal, and the video signal up to that point is temporarily converted to a pattern signal. By switching and outputting to a display circuit, a pattern signal replacing a disturbed image is temporarily displayed and video mute processing is performed.

In the video mute circuit according to this prior art, when the frame pulse (synchronization signal) detected by the frame pulse detection circuit is not detected at a predetermined timing, it is determined that the synchronization is lost, but it is caused by rainfall in satellite broadcasting. Although there is no out-of-synchronization due to the deterioration of received C / N due to the influence of, or the instantaneous blocking of the broadcast radio wave by a flying object, the frame pulse detection circuit temporarily detects the frame pulse only at that time. It may not be done.

Even in such a case, if it is determined that the synchronization is out of sync and the synchronization re-pull-in operation on the receiver side is started, the image receiving screen becomes very difficult to see during that time. In order to prevent this from happening, in general, when the frame pulse detection circuit does not detect a frame pulse continuously over several frames, it is determined that synchronization is lost and a synchronization loss detection signal is output. (Hereinafter, the processing devised in this way is referred to as forward protection processing, and the number of consecutive frames that is not judged to be out of synchronization even if no frame pulse is detected is referred to as the number of times of protection.)

When the loss of synchronization is determined through the forward protection process in this way, the frame pulse detection circuit starts detection of a new frame pulse, and the new frame pulse thus detected is used as a reference. It is designed to re-acquire synchronization on the receiver side.

[0008]

Generally, in television broadcasting, as described above, the transmitting station that broadcasts the program may be switched when the program is switched, for example. In particular, in the case of satellite broadcasting, when the transmission station is switched, the signal (program) after switching and the signal (program) before switching may not be synchronized.

In this case, according to the conventional synchronization system on the receiver side, before the switching of the program (video signal) after the switching is performed from the switching of the program until the re-pulling-in is performed in synchronization with the switched program. Since the process of importing to the receiver is carried out with the synchronization of No., it is not actually synchronized.

Unlike the frequency division multiplexing system signal such as the NTSC signal, the MUSE signal is a signal in which a video luminance signal, a video chroma signal, an audio signal, and various control signals are time-division multiplexed. Then, since each data (video luminance signal, video chroma signal, audio signal, various control signals, etc.) is taken in from the incoming signal (MUSE signal) with reference to the internal frame synchronization signal, synchronization is performed. If they come off, incorrect data will be fetched and processed respectively.

In particular, data that is not originally a video chroma signal is
When chroma-processed, the colors are disorderly, meaningless as a video, and a very hard-to-see video display. Such an image display in which colors are disordered is very conspicuous and difficult to see even if it is displayed only for a period of one or two frames.

Generally, in the case of loss of synchronization, as described above,
As protection against deterioration of C / N and loss of frame sync signal, forward protection processing is performed to judge that synchronization is lost only after several times of loss of synchronization. The frame period will continue to be displayed.

In order to prevent the display of such a hard-to-see image, as in the prior art described above, the video signal from the video processing circuit is cut off during that period so as not to be displayed on the screen,
Alternatively, it is conceivable to perform video mute processing by displaying a specific pattern without disturbance, but in the case of the above-described conventional technology, mute processing is performed after it is determined to be out of synchronization through forward protection processing. Therefore, the video mute process is applied to the chaotically colored and difficult-to-see video display that is displayed during the forward protection process that occurs when the synchronization of incoming signals is switched (the program is switched). There was a problem that I could not make use of it.

An object of the present invention is to use MUSE by satellite broadcasting.
When receiving a high-definition broadcast, the sync signal switching associated with the switching of the transmitting station (broadcasting program switching) is detected accurately and quickly, which allows the video mute process to be performed abruptly. An object of the present invention is to provide a video mute processing circuit capable of eliminating at least an undisplayable video display during the applied period.

[0015]

To achieve the above object, according to the present invention, a high-definition television signal is received, and the phase of a synchronizing signal included in the received television signal is not changed until the middle of reception. When it is detected that the first phase has been switched to the second phase, the video signal obtained by digitally processing the received television signal is temporarily output to the display circuit. In the video mute processing circuit that stops and mutes,

The frame synchronization signal detecting means, the internal synchronization generating means, the first synchronization determining means, the second synchronization determining means, and the muting means are provided as the first solving means. .

To achieve the above object, in the present invention, in a video mute processing circuit, a frame sync signal detecting means, a horizontal sync signal detecting means, an internal sync generating means,
The first synchronization determining means, the second synchronization determining means, and the means for muting are provided as the second solving means.

[0018]

In the first solving means, the frame synchronizing signal detecting means detects the frame synchronizing signal included in the received high quality television signal. The internal synchronization generating means generates an internal frame synchronization signal based on the frame synchronization signal detected by the frame synchronization signal detecting means. The first synchronization determination means compares the internal frame synchronization signal generated by the internal synchronization generation means with the frame synchronization signal detected by the frame synchronization signal detection means, and the phases of both are constant. It is determined that there is synchronization by detecting that there is a phase relationship.

The second synchronization determination means detects that the frame synchronization signal detected by the frame synchronization signal detection means has a phase relationship different from the phase relationship detected by the first synchronization determination means. Then, it is determined that the synchronization is lost. The means for muting the phase of the high-definition television signal received when the first synchronization determination means does not obtain the synchronization determination and the second synchronization determination means determines the out-of-sync state. Is determined to have been switched, and the video signal obtained by digitally processing the received television signal is temporarily stopped from being output to the display circuit and muted.

As a result of muting, instead of the video signal obtained by processing the received television signal, a monochromatic video signal such as black or gray is output to the display circuit as a video output, and a black or gray or the like is output. A monochrome pattern is displayed, or the video signal is cut off and is not output to the display circuit, so that the video is not displayed.

As described above, the forward protection processing is conventionally performed even in the case of loss of synchronization due to synchronization switching (broadcast program switching) or in the case of loss of synchronization due to C / N deterioration or temporary loss of the frame synchronization signal. Although it was determined to be out of synchronization for the first time after that, in the first solving means, the second synchronization determining means is provided, and the determination result is used together with the determination result of the first synchronization determining means. Without waiting for the forward protection process, it becomes possible to immediately determine the loss of synchronization.

As a result, in an out-of-synchronization state due to synchronization switching of incoming signals (switching of broadcast programs),
While the forward protection process is being applied,
It is possible to solve the problem that an unclear image that is disorderly colored is continuously displayed.

In the second solving means, the frame synchronizing signal detecting means detects the frame synchronizing signal included in the received high definition television signal. The horizontal synchronizing signal detecting means detects the horizontal synchronizing signal included in the received high quality television signal. The internal sync generation means generates an internal frame sync signal and an internal horizontal sync signal with the frame sync signal detected by the frame sync signal detection means as a reference. The first synchronization determination means compares the internal frame synchronization signal generated by the internal synchronization generation means with the frame synchronization signal detected by the frame synchronization signal detection means, and the phases of both are constant. It is determined that there is synchronization by detecting that there is a phase relationship.

The second synchronization determination means compares the horizontal synchronization signal detected by the horizontal synchronization signal detection means with the internal horizontal synchronization signal generated by the internal synchronization generation means, and the phases of both are It is determined that the synchronization is lost by detecting that there is no certain phase relationship. The means for muting the phase of the high-definition television signal received when the first synchronization determination means does not obtain the synchronization determination and the second synchronization determination means determines the out-of-sync state. Is determined to have been switched, and the video signal obtained by digitally processing the received television signal is temporarily stopped from being output to the display circuit and muted.

As described above, in the second solving means, as in the first solving means, the forward protection processing is performed in the out-of-synchronization state due to the synchronization switching of the incoming signals (switching of the broadcast program). During this time, it is possible to solve the problem that unsightly images with chaotic colors continue to be displayed.

Further, in the second solving means, the horizontal synchronizing signal detecting means is provided as the second synchronizing detecting means in parallel with the frame synchronizing signal detecting means, so that it is arranged at the head of all the lines in the frame. Total 1125
Since the out-of-sync of the horizontal sync signal at a certain place can be detected immediately after the switching of the sync, the video mute process can be performed earlier, and the time for displaying a difficult-to-see screen is further shortened.

[0027]

1 is a block diagram showing a first embodiment of the present invention. In the figure, 1 is an input terminal for an analog MUSE signal, 2 is an A / D converter, 3 is a frame sync signal detector, 4 is an internal sync generator, 5 is a horizontal sync gate, and 6
Is a phase comparator, 7 is a clock generator, 8 is a synchronization determiner,
Reference numeral 9 is a forward protection processing circuit, 10 is a video signal processing circuit, 11 is a video signal switching processing circuit, 12 is a mute video signal generator, and 13 is a display circuit. It is the same as the configuration of the mute processing circuit according to the technology.

The present embodiment is largely different from the mute processing circuit according to the prior art in that 14 second sync decision devices and 1
5, there is provided a synchronism switching judging device. The operation of this embodiment will be described below.

Referring to FIG. The frame sync signal detector 3 detects the frame sync signal included in the digital MUSE signal output from the A / D converter 2, and the internal sync generator 4 receiving this detects the detected frame sync signal. An internal frame sync signal and an internal horizontal sync signal are generated as a reference. Internal horizontal sync signal, horizontal sync gate 5
Of the horizontal synchronization signal period in the incoming MUSE signal, the sampling phase shift is detected by the phase comparator 6, and the clock generator 7 changes the clock phase according to the phase difference. And A / D
An appropriate sampling clock is supplied to the converter 2. By the above, the PLL loop is configured and the internal synchronization signal arrives at M
Synchronize with the USE signal.

On the other hand, the frame sync signal detected by the frame sync signal detector 3 is also guided to the first sync determiner 8 and the second sync determiner 14. The first sync determiner 8 loses the first sync when the frame sync signal detected by the frame sync signal detector 3 is not guided at the timing of the internal frame sync signal generated by the internal sync generator 4. To determine.

The forward protection processing circuit 9, which determines that the synchronization is lost only after the synchronization is determined to be out of synchronization several times in succession, is determined by the first synchronization determiner 8 in the determination of the loss of synchronization. If the out-of-sync determination continues for a minute, it is determined that the synchronization has been switched, and the internal synchronization generator 4 is instructed to re-engage the synchronization. This prevents the synchronization from being re-pulled in by determining that the synchronization is switched due to erroneous synchronization loss once or twice due to deterioration of C / N or temporary loss of the frame synchronization signal.

When the frame synchronization signal detected by the frame synchronization signal detector 3 is introduced at a timing other than the timing of the internal frame synchronization signal generated by the internal synchronization generator 4, the second synchronization determiner 14 operates internally. If the frame synchronization signal and the incoming MUSE signal are not synchronized, the second
Is determined to be out of synchronization.

The synchronization switching determiner 15 switches the synchronization when both the first loss of synchronization from the first synchronization determiner 8 and the second loss of synchronization from the second synchronization determiner 14 occur. It is determined that this has occurred, and a mute signal is sent to the video signal switching processing circuit 11. Upon receiving the mute signal, the video signal switching processing circuit 11 replaces the signal from the video signal processing circuit 10 with the mute video signal generator 1
The video mute process is performed by switching the signal from 2 (for example, a monochromatic pattern signal such as black or gray) to be output to the display circuit 13 or by cutting off the signal so that no signal is output to the display circuit 13. Give.

As described above, in the present embodiment, it is possible to accurately and quickly detect the synchronization switching that occurs when the broadcasting transmitting station is switched, so that the incoming signal (MUSE signal) is detected immediately after the switching of the synchronization. The image signal obtained by processing is switched to a monochrome image signal such as black or gray for pattern display, or any signal input to the display circuit is cut off to create a state in which the image is not displayed. By performing the mute process, it is possible to eliminate the problem that the unprecedentedly colored image that is disorderly colored is displayed while the forward protection process is performed.

Next, FIG. 2 is a block diagram showing a second embodiment of the present invention. In the figure, 201 is a horizontal sync detector, 202 is a second sync determiner, and the other components are the same as those of the embodiment of FIG.

Referring to FIG. Horizontal sync detector 201
Detects the horizontal synchronizing signal included in the digital MUSE signal, and outputs the detected horizontal synchronizing signal at the timing of detection. The second sync determiner 202 is not synchronized with the internal sync signal when the detected horizontal sync signal is input from the horizontal sync detector 201 at timings other than the timing of the internal horizontal sync signal guided from the internal sync generator 4. MUSE
It is determined that the signal has arrived and the synchronization is lost.

As in the case of the embodiment shown in FIG. 1, when the synchronization switching determiner 15 determines that both the first synchronization determiner 8 and the second synchronization determiner 202 have lost synchronization (broadcast program). It outputs a mute signal to the video signal switching processing circuit 11 (determining that the switching of the synchronization due to the switching of 1) has occurred. As a result, as in the case of the embodiment of FIG. 1, the broadcast transmission station is switched and the incoming MUSE
The video mute process can be performed when the synchronization of signals is switched.

FIG. 3 shows the horizontal sync detector 20 of FIG.
2 is a block diagram showing a specific configuration example of No. 1; FIG. In FIG. 3, 301 is a digital MUSE signal input terminal, 30
2 is an input gate circuit, 303 is a pattern matching circuit, 304 is a matching count accumulation circuit, and 305 is an internal 1
The line counter 306 is an output terminal.

In FIG. 3, a signal is first input from the digital MUSE signal input terminal 301 and passes through the input gate circuit 302. In the initial state, the input gate circuit 302 passes all incoming signals. The pattern matching circuit 303 compares the signal passed through the input gate circuit 302 with the pattern of the horizontal synchronizing signal waveform held separately, and outputs a matching signal when they match. The coincidence signal is guided to the 1-line counter 305 and the matching number accumulation circuit 304.

Upon receiving the coincidence signal, the 1-line counter 305 sends a gate signal to the input gate circuit 302 at 1-line intervals from the timing, and the input gate circuit 3 receives the coincidence signal.
Gate the signal passing through 02. This is because when the horizontal synchronizing signal waveform is detected by the pattern matching circuit 303, the horizontal synchronizing signal waveform should arrive at one line intervals from that time, so the gate is applied to the input gate circuit 302 in consideration of the timing. is there.

The matching signal guided to the matching number accumulating circuit 304 is counted in the matching number accumulating circuit 304, and the count value (matching number accumulating value) of the matching signal within a certain period is set to a certain set value. When it exceeds, it is determined that the input gate 302 is capturing the horizontal synchronizing signal, and the horizontal synchronizing signal detection signal is output to the output terminal 306.

If the count value of the coincidence signal within a certain period (cumulative number of matching times) falls below the set value,
Sending a signal to the input gate circuit 302 and controlling the input gate circuit 302 to always open the gate to pass all the input signals, so that the pattern matching circuit 303 starts searching for the timing of the horizontal synchronizing signal again. to enable.

The above is a specific example of the horizontal sync detector 201, but it goes without saying that the means for detecting the position of the horizontal sync signal is not limited to this example.

As described above, in the present embodiment shown in FIG. 2 as well, as in the case of the embodiment of FIG. 1, it is possible to accurately and quickly detect the synchronization switching which occurs when the transmitting station is switched, for example. , Immediately after the synchronization is switched, the video signal to be output to the display circuit is switched to monochromatic video signal display (pattern display) such as black or gray, or all video signals are cut off and no video appears. The video mute process can be switched to or switched to, and thereby, it is possible to avoid displaying disorderly colored and hard-to-see video while the forward protection process is being performed.

In FIG. 2, the second synchronization judgment circuit 2
By using the horizontal sync signal detected by the horizontal sync detector 201 as 02, the horizontal sync signal is a signal located at the beginning of all the lines in the frame and at a total of 1125 locations, and therefore, after the synchronization is switched. The sync signal can be detected immediately. As a result, the video mute process can be performed more quickly, and it is possible to further reduce the time for displaying a difficult-to-see screen.

Next, FIG. 4 is a block diagram showing a third embodiment of the present invention. The present embodiment shown in FIG. 4 is different from the first embodiment shown in FIG. 1 in that the signal for notifying the internal synchronization generator 4 of loss of synchronization is sent from the first synchronization determiner 8 to the forward protection processing circuit 9 This is a point that not only is it passed through, but also from the output side of the synchronous switching determination unit 15.

The synchronization switch judging unit 15 receives the result of the loss of synchronization judgment from the first synchronization judging unit 8 and the result of the loss of synchronization judgment from the second synchronization judging unit 14, judges that the synchronization has been switched, and switches the video. The mute signal is sent to the processing circuit 11, and the mute signal is also output to the internal synchronization generator 4 as a signal notifying the loss of synchronization. The internal synchronization generator 4 receives the frame synchronization signal detected by the next frame synchronization signal detector 3 when either of the signals indicating the loss of synchronization is input from the synchronization switching determination unit 15 or the forward protection processing circuit 16. Resynchronization is started with reference to the signal.

As a result, in the case of synchronous switching, a signal from the synchronous switching determination unit 15 is introduced to notify the loss of synchronization, so that the synchronization pull-in to a new incoming MUSE signal is determined to be out of synchronization several times in succession. Only after that, the forward protection process, which determines that the synchronization is lost, is performed quickly without being affected. As a result, the time from switching the synchronization to entering the synchronization re-pull-in is shortened.

As described above, in the present embodiment shown in FIG. 4 as well, as in the case of the embodiment of FIG. 1, for example, the synchronous switching which occurs when the broadcasting transmitting station is switched can be detected accurately and quickly. , Immediately after the synchronization is switched, the video signal created by processing the incoming signal is switched to a monochromatic video signal such as black or gray for pattern display, or all video signals are cut off to output the video. The video mute process can be performed by creating a non-existing state, and it is possible to prevent the disorderly colored and hard-to-see image from being displayed while the forward protection process is performed.

Further, in the present embodiment shown in FIG. 4, a signal for notifying the loss of synchronization is introduced from the synchronization switching determiner 15 to the internal synchronization generator 4, so that a new synchronization signal is immediately transmitted when the synchronization is switched. Since the synchronization re-pull-in can be started, the period of performing the video mute process can be shortened, and the video of the incoming signal after the switching can be viewed earlier.

Although not shown, the embodiment of FIG. 4 can also be configured to use the horizontal sync detector 201 and the second sync determiner 202 as in the embodiment of FIG. In this case as well, as in the case of the embodiment of FIG. 2, the synchronization switching determiner 15 accurately and quickly detects the discontinuity of synchronization that occurs when the transmission station of the broadcast is switched, and makes it difficult to see the screen due to the loss of synchronization. It is possible to perform video mute processing so as not to display.

[0052]

As described above, according to the present invention,
In the video mute processing circuit, by providing the first synchronization determining means and the second synchronization determining means, the arrival of the incoming MUSE
Since it is possible to detect the synchronization change of the signal accurately and quickly, it is possible to perform the video mute process only when the synchronization is changed and prevent the chaotically colored and hard-to-see image from being displayed on the reception screen. .

[Brief description of drawings]

FIG. 1 is a block diagram showing a first embodiment of the present invention.

FIG. 2 is a block diagram showing a second embodiment of the present invention.

3 is a block diagram showing a specific configuration example of a horizontal synchronization detector 201 in FIG.

FIG. 4 is a diagram showing a third embodiment of the present invention. Third of the present invention
It is a block diagram showing an example of.

[Explanation of symbols]

1 ... Input terminal, 2 ... A / D converter, 3 ... Frame sync signal detector, 4 ... Internal sync generator, 5 ... Horizontal sync gate,
6 ... Phase comparator, 7 ... Clock generator, 8 ... First synchronization judging device, 9 ... Forward protection processing circuit, 10
... video signal processing circuit, 11 ... video signal switching processing circuit, 12 ... mute video signal generator, 13 ... display circuit,
14 ... 2nd synchronization judging device, 15 ... Synchronous switching judging device, 201 ... Horizontal synchronizing signal detector, 202 ... 2nd synchronization judging device, 301 ... Input terminal, 302 ... Input gate, 30
3 ... Pattern matching circuit, 304 ... Matching number accumulation circuit, 305 ... Internal 1-line counter, 306 ... Output terminal.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Noboru Kojima, 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Inside Visual Media Research Center, Hitachi, Ltd. (72) Inventor Tatsuo Nagata 292, Yoshida-cho, Totsuka-ku, Yokohama, Kanagawa (72) Inventor Takaaki Matono, Hitachi, Ltd., Visual Media Research Laboratories, Inc. 292, Yoshida-cho, Totsuka-ku, Yokohama, Kanagawa Prefecture, Ltd. 2-2-1 Japan Broadcasting Corporation Broadcast Center (72) Inventor Atsushi Yamakita Jun 2-Minami, Shibuya-ku, Tokyo 2-2-1 Japan Broadcasting Corporation Broadcast Center (72) Inventor Takashi Iwamoto Jinnan, Shibuya-ku, Tokyo 2-2-1 Japan Broadcasting Corporation Broadcasting Center

Claims (2)

[Claims] 1. A high-definition television signal is received, and the phase of a synchronization signal included in the received television signal is switched from the first phase up to then to the second phase during reception. When it is detected that the received video signal is digitally processed, the video signal obtained by digitally processing is temporarily stopped from being output to the display circuit to mute the video signal. A frame sync signal detecting means for detecting a frame sync signal included in the high definition television signal, and an internal sync generating means for generating an internal frame sync signal based on the frame sync signal detected by the frame sync signal detecting means. An internal frame synchronization signal generated by the internal synchronization generation means, and a frame detected by the frame synchronization signal detection means A first synchronization determination unit that compares the synchronization signal with each other, detects that the phases of the both have a certain phase relationship, and determines that there is synchronization, and a frame detected by the frame synchronization signal detection unit. The synchronization signal is out of synchronization by detecting that it has a different phase relationship from the phase relationship detected by the first synchronization determination means,
The second synchronization determination unit that determines that the first synchronization determination unit and the first synchronization determination unit cannot determine that there is synchronization,
When the out-of-synchronization determination is obtained by the second synchronization determination means, it is determined that the phase of the received high-definition television signal has been switched, and the received television signal is digitally processed and obtained. A video mute processing circuit comprising: means for temporarily muting an output video signal to the display circuit to mute the video signal. 2. A high-definition television signal is received, and the phase of a synchronization signal included in the received television signal is switched from the first phase to the second phase during the reception. When it is detected that the received video signal is digitally processed, the video signal obtained by digitally processing is temporarily stopped from being output to the display circuit to mute the video signal. A frame synchronization signal detecting means for detecting a frame synchronization signal included in the high-definition television signal, a horizontal synchronization signal detecting means for detecting a horizontal synchronization signal included in the received high-definition television signal, and the frame synchronization An internal synchronization generator that generates an internal frame synchronization signal and an internal horizontal synchronization signal with reference to the frame synchronization signal detected by the signal detection means. And a frame synchronization signal detected by the frame synchronization signal detection means, and the phases of both are in a certain phase relationship. Comparing the horizontal synchronization signal detected by the horizontal synchronization signal detecting means with the internal horizontal synchronization signal generated by the internal synchronization generating means. However, it is not possible to obtain a determination that there is synchronization between the second synchronization determination unit that determines that the phases of both are out of synchronization by detecting that they are not in a certain phase relationship, and the first synchronization determination unit,
When the out-of-synchronization determination is obtained by the second synchronization determination means, it is determined that the phase of the received high-definition television signal has been switched, and the received television signal is digitally processed to obtain it. A video mute processing circuit comprising: means for temporarily muting an output video signal to the display circuit to mute the video signal.