JPH07111864B2 - Solid-state electron beam generator - Google Patents

Description

The present invention relates to a solid-state electron beam generator.

[Prior Art] One of the conventionally known solid-state electron beam generators is, for example, the device disclosed in US Pat. No. 4,259,678. The device disclosed in this US patent forms a pn junction on a Si semiconductor substrate and applies a reverse voltage to the pn junction.
The avalanche effect produces electrons with higher energy than the thermal equilibrium state (hereinafter referred to as hot electrons), and the kinetic energy of hot electrons is used to extract an electron beam into a vacuum.

However, in such a device, there is a problem that the amount of current taken out is small because the proportion of hot electrons generated by the avalanche effect that has energy higher than the vacuum level is small.

A second solid-state electron beam generator known in the prior art, as disclosed in Japanese Patent Publication No. 54-30274, has
p consisting of Al _x Ga _(1-x) P (0 ≦ x ≦ 1) on aP semiconductor substrate
An n-junction region is provided, and a forward voltage is applied to the pn-junction region to take out the electrons injected from the n-region to the p-region.

However, such a device has an advantage that the amount of carriers can be increased as compared with the case of the above-mentioned US patent, but on the other hand, since there is no region for forming hot electrons, electron emission into a vacuum is performed. Low efficiency, and
The GaP substrate has the defect that it has many crystal defects and cannot form a good pn junction region.

Further, US Pat. No. 3,119,947, which is known prior to the above-mentioned two prior arts, discloses a device in which an npn region is formed on a Si semiconductor substrate and a voltage is applied between both n-type regions to emit electrons. Is proposed. According to such an npn type device, the emission efficiency of the device described as the first prior art (device utilizing pn junction) is about 10 ^-6 , whereas the emission efficiency is improved to about 10 ^-4 . It is possible.

However, the p-type region and the n-type region on the electron emission surface side need to be as thin as 100Å and be evenly provided.
There was a problem that its fabrication was difficult and not realistic.

[Problems to be Solved by the Invention] Therefore, in view of the above points, an object of the present invention is to provide a solid-state electron beam generator which facilitates a manufacturing process with a simple structure and sufficiently enhances electron emission efficiency. To do.

[Means for Solving the Problems] In order to achieve such an object, in the present invention, an emitter region having a first band gap and a base region having a second band gap narrower than the first band gap are provided. And a collector region having an electron emission surface, when forming a hetero-bipolar structure, an inclined layer in which a mixed crystal ratio of a predetermined material is gradually changed in a thickness direction is provided between the emitter region and the base region. Inserting and injecting electrons from the emitter region to the base region, a reverse bias voltage is applied between the base region and the collector region to emit the electrons from the electron emission surface.

[Operation] Electrons are injected from an emitter region having a wide bandgap into a base region having a narrow bandgap through an inclined layer, and further accelerated by an electric field generated in the collector region to generate a sufficiently large kinetic energy into electrons. The electrons are given and emitted from the end face of the collector region.

[Examples] Hereinafter, the present invention will be described in detail based on Examples.

FIG. 1 is a sectional configuration diagram showing an embodiment of the present invention using an n-type (or n ⁺ -type) GaAs substrate. In the figure, 1 is n
A type (or n ⁺ type) GaAs substrate 2 is an N type Al _x Ga _(1-x) As layer which acts as an emitter. Here, x represents a mixing ratio of Al, and has a value of 0 <x ≦ 1. Moreover, capital “N” represents an N-type region having a wide band gap. Reference numeral 3 is an inactive layer formed by injecting oxygen into the N-type Al _x Ga _(1-x) As layer.

Reference numeral 4 is a graded layer in which the mixed crystal ratio x of Al contained in the emitter layer 2, Al _x Ga _(1-x) As, is gradually decreased to continuously change to GaAs.

Reference numeral 5 is a p-type GaAs layer which acts as a base. Here, the lower case "p" represents a p-type region having a narrow band gap. It is also possible to control the size of the band gap by adding Al instead of the p-type GaAs layer to form a p-type Al _z Ga _(1-z) As layer (0 ≦ z <x). is there.

6 is n-type GaAs which acts as a collector. Here, the lower case "n" represents an n-type region having a narrow bandgap, like "p" described above. Note that n-type
It is also possible to use an n-type Al _t Ga _(1-t) As layer (0 ≦ t ≦ 1) instead of GaAs.

7 is n ⁺ for obtaining ohmic contact with the collector electrode
Type GaAs layer.

Reference numeral 8 denotes a cesium oxide (Cs-O) layer adhered to or diffused on the surface of the collector layer 6, which acts as an electron emission surface. Instead of this Cs-O layer, an alkali metal such as Cs,
It is also possible to attach or diffuse a material containing at least one of Cu, Ag, Au, Sb, Bi, Se, As, P, Te, Si and O.

Reference numeral 9 is a protective layer (insulating layer) formed of SiO ₂ or the like, 10 is an emitter electrode, 11 is a base electrode, 12 is a collector electrode, and 13 is an outside for accelerating electrons emitted from the collector layer surface. It is an acceleration electrode.

In this embodiment, MBE (Molec) is formed on an n-type (or n ⁺ ) GaAs substrate.
uler Beam Fpitaxy) device or MOCVD (Metalorganic
Chemical Vapor Deposition) equipment, etc. for N-type AlGaA
After forming the s-layer 2, the oxygen ion-implanted inactive portion 3 is formed by the ion-implantation apparatus, and the inclined layer 4, the p-type GaAs layer 5, and the n-type
Epitaxial growth of the GaAs layer 6 and the n ⁺ -type GaAs layer 7 is sequentially performed, and then a region for attaching the base electrode 11 is formed by etching. After that, the SiO ₂ layer (protective layer) and the electrodes 10 to 12 are formed, and the Cs—O diffusion layer 8 is formed, and the fabrication of this example is completed.

Au-Ge, Au-Ge-Ni, etc. are used as the n-type GaAs electrodes 10 and 12, and Au-Sn, Ag-Zn, and so on are used as the p-type GaAs electrode 11.
It is preferable to use Au-Be, Au-Zn or the like.

Next, the operating principle of this embodiment will be described with reference to the energy band diagram shown in FIG.

In Fig. 2, the solid line is the energy level [eV] during thermal equilibrium, and the dotted line is the energy level [eV] during bias application.
V] is shown. The emitter layer is a wide bandgap material in order to increase the efficiency of current injection into the base. Al _x Ga
_(1-x) As is used. In this embodiment, the mixed crystal ratio of Al x
Makes it possible to obtain a good heterojunction and
Although X = 0.3 was set in consideration of the influences of −band and X-band, the value is not limited to this value.

Furthermore, the doping amount of the emitter layer 2 is high (5 × 10 ¹⁷
~ 1 × 10 ¹⁹ cm ^-3 ), many carriers are base layer 5
To be injected into. With such a doping amount, a degenerate state occurs, and the Fermi level is located above the conduction band.

Since the electrode 10 of the emitter layer is provided on the back surface of the n-type GaAs substrate 1, it is preferable that it is highly doped so as to reduce the voltage drop in the substrate as much as possible.

Since the graded layer 4 is inserted between the emitter layer 2 and the base layer 5, the Al mixed crystal ratio x gradually decreases, and the base layer 5
At the boundary between and, x = 0. By inserting such a graded layer 4, spikes or the like do not occur at the hetero interface between the emitter layer 2 and the base layer 5, as shown in FIG. In this way, there are no spikes or other barriers,
Many carriers are injected into the base layer 5, and the injection efficiency is improved.

The base layer 5 is a p-type which is a narrow band gap material.
A GaAs layer is used. The doping amount of the base layer 5 is 5 × 10 ¹⁸ cm ⁻³ to reduce the resistance, and the thickness of the base layer is 300 Å to reduce the scattering in the base region.

An n-type GaAs collector layer 6 and an n ⁺ -type GaAs layer 7 are grown on the p-type GaAs base layer 5. Since Cs-O is diffused (or adhered) to the surface of the n ⁺ type GaAs layer 7, the work function of the collector layer surface is as low as about 1.4 eV. As mentioned above, this surface layer includes {alkali metals other than Cs + (Sb, Bi, Se, As, P, Te, Cu, Ag, Au) +
O)} etc. can also be used.

The collector layer 6 is highly doped (1) so that the contact with the collector electrode becomes ohmic and the resistance becomes low.
× 10 ¹⁸ / cm ^-3 ). Further, the doping amount of the n ⁺ type GaAs layer 7 is about 1 × 10 ¹⁹ / cm ^-3 .

Although the total film thickness of the n-type GaAs layer 6 and the n ⁺ -type GaAs layer 7 is 1000 Å, it is not limited to this value. That is,
If the ohmic contact with the electrode is good, it is desirable that the thickness of this layer be thinner. A high-quality and uniform film is formed on each of these layers by growing it using an MBE apparatus or a MOCVD apparatus.

Next, the bias application will be described (see the dotted line in FIG. 2). When a forward bias voltage is applied between the emitter and the base, a reverse bias voltage is applied between the base and the collector, and a positive bias is applied to the collector for the external acceleration electrode, carriers injected from the emitter to the base ( Electron) is accelerated by the electric field between the base and collector, and Cs−
O and the like are released from the diffused surface. The emitted electrons gain more kinetic energy from the external electric field formed by the acceleration electrode 15.

In this embodiment, since the graded layer is provided between the emitter layer and the base layer, a barrier such as a spike does not occur between the two layers. Therefore, the amount of carriers injected from the emitter layer to the base layer increases, the number of carriers accelerated by the reverse bias between the base and collector also increases, and the electron emission efficiency improves.

FIG. 3 is a sectional configuration diagram showing a second embodiment using a semi-insulating substrate. This second embodiment is shown in FIG.
An element similar to that of the example is manufactured by an ion implantation technique.

In FIG. 3, 21 is a semi-insulating GaAs substrate, 22 is an n ⁺ GaAs layer for obtaining ohmic contact with the emitter electrode 10, and 2
Is an N-type Al _x Ga _(1-x ) As (0 <x ≦ 1) emitter layer, 4 is a graded layer in which the mixed crystal ratio of Al is gradually decreased as the distance from the emitter layer 2 increases, and 5 is a p-type GaAs base Layer, 6 is n-type GaAs
A collector layer, 7 is an n ⁺ type GaAs layer for obtaining ohmic contact with the collector electrode 12, and 8 is a layer obtained by diffusing (or adhering) Cs-O or the like in order to lower the work function.

In this embodiment, the n ⁺ GaAs layer 22, N is formed on the semi-insulating GaAs substrate 21.
Type Al _x Ga _(1-x) As layer 2, graded layer 4, p-type GaAs layer 5, n-type GaAs layer 6, n ⁺
After forming the p-type GaAs layer 7, the p-type GaAs base electrode is formed.
A p ⁺ region 23 in which Be is ion-implanted and a region 24 in which B is ion-implanted are formed for insulation between base-emitters and element isolation. Further, a SiO ₂ protective layer 9 is formed, and a collector electrode 12 and a base electrode 11 are produced. For the emitter electrode 10, a hole is dug to reach the n ⁺ type GaAs layer 22, and an electrode of Au-Ge / Au or the like is formed there.

Finally, the external accelerating electrode 13 is attached and Cs-O is diffused to complete the production of this example. In the second embodiment,
Unlike the first embodiment described above, the p-type GaAs base layer 5
Not only is it difficult to perform difficult processes such as etching (see FIG. 1), but also the device surface is flat.

The operation principle and the like of the second embodiment are the same as those of the first embodiment, and therefore the description thereof is omitted.

Although the first and second embodiments described so far are configured by using GaAs which is one of the III-V group compound semiconductors, the material is not limited to such a material and, for example, InGaAsP / InP-based materials can be used. It is also possible to use. Examples using these materials are summarized in Table 1 below.

[Effects of the Invention] As described in detail above, according to the present invention, the effects listed below can be obtained.

Since the band gap between the emitter and the base is different (Npn structure) and the graded layer is inserted between the emitter and the base, the amount of carriers injected from the emitter to the base increases.

Further, the carriers injected into the base are accelerated by the electric field, so that the kinetic energy can be increased.

As a result, the electron emission efficiency is significantly improved.

Since the emitter region and the base region can be formed as an epitaxial film of about several tens of liters using an MBE device or a MOCVD device, a high quality and uniform layer structure can be easily formed.

Moreover, since the thickness of each layer can be reduced, the driving voltage can be reduced.

Since an electron beam generator (device) can be manufactured using a semiconductor material, it is easy to arrange a plurality of electron beam generators on the same substrate or to combine with a device having another function. . As a result, it is possible to increase the degree of integration of semiconductor devices.

According to the embodiment of the present invention, the following effects can be obtained in addition to the effects of the above invention.

When the present invention is implemented using the ion implantation technique,
Processes such as etching become unnecessary, the surface of the element becomes flat, and other devices can be formed on the same substrate to increase the degree of integration.

[Brief description of drawings]

FIG. 1 is a sectional configuration diagram showing a first embodiment of the present invention, FIG. 2 is an energy band diagram showing an energy state of the first embodiment, and FIG. 3 is a sectional configuration showing a second embodiment of the present invention. It is a figure. 1 ... n-type GaAs substrate, 2 ... N-type Al _x Ga _(1-x) As layer, 3 ... N-type Al _x Ga _(1-x) As oxygen injection inactive layer, 4 ... gradient layer, 5 ... p-type GaAs layer (base), 6 ... n-type GaAs layer, 8 ... Cs-O diffusion layer, 9 ... SiO ₂ insulating layer, 10 ... emitter electrode, 11 ... base electrode, 12 …… Collector electrode, 13 …… External acceleration electrode.

Claims (5)

[Claims] 1. A heterobipolar structure comprising an emitter region having a first bandgap, a base region having a second bandgap narrower than the first bandgap, and a collector region having an electron emission surface. To
A gradient layer in which the mixed crystal ratio of the predetermined material is gradually changing in the thickness direction is inserted between the emitter region and the base region, and electrons are injected from the emitter region to the base region, A solid-state electron beam generator characterized in that a reverse bias voltage is applied between the base region and the collector region so that the electrons are emitted from the electron emission surface. 2. An n-type or n ⁺ -type GaAs substrate or semi-insulating material
N-type Al _x Ga having a first band gap on a GaAs substrate
_{A (1-x} ) As layer (where 0 <x ≦ 1) is formed to serve as the emitter region, and a p-type Al _z Ga _(1-z) As layer having a second band gap (here, 0 <x ≦ 1) is formed. ≦ z <x) is formed as the base region, and an n-type Al _t Ga _(1-t) As layer (where 0 ≦ t ≦ 1) is used as the collector region. A solid-state electron beam generator according to claim 1. 3. A solid-state electron beam generator according to claim 1, wherein a material having an alkali metal component is diffused or adhered to the electron emission surface of the collector region. 4. The solid electron beam according to claim 2, wherein a layer in which the mixed crystal ratio x of Al _x Ga _(1-x) As is gradually changed is used as the gradient layer. Generator. 5. The N-type Al _x Ga.sub. _(1-x) As layer (where 0 <x
The solid-state electron beam generator according to claim 2, wherein oxygen is injected into a predetermined region of ≦ 1) to form an inactive region.