JPH07107670B2 - Disk cache device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a disk cache device for transferring data stored in a disk device.

(Prior Art) A disk cache device is provided between a host computer and a disk device in order to shorten the access time of the host computer to the disk device.

FIG. 2 is a block diagram showing a schematic configuration of a conventional disk cache device.

The disk cache device 10 is connected to a disk control device 13 provided between the host computer 11 and the disk device 12. The disk cache device 10 includes a cache memory 1 and a disk cache control device 14 that controls the cache memory 1.

The cache memory 1 stores a copy of part of the data stored in the disk device 12. The storage unit is a block of the disk device 12, that is, a unit amount of data that is collectively accessed.

When a read command including a disk address is given from the host computer 11, the disk cache control device 14 searches the cache memory 1 for a copy of a block including the corresponding disk address.

When it exists (hereinafter referred to as “hit”), the disk cache control device 14 reads the data from the cache memory 1 and sends it to the host computer 11.

If it does not exist (hereinafter referred to as "miss hit"),
The disk cache controller 14 is a disk controller 13
Tell that to. As a result, the disk controller 13
Reads out the data of the block including the corresponding disk address from the disk device 12 and sends it to the disk cache device 10, and also takes out the requested data from the host computer 11 from the block and sends it to the host computer 11. Then, the disk cache device 10 allocates the sent data to one block in the cache memory 1 and stores it.

In the conventional disk cache control device 14, when executing the above-mentioned operation, a copy of data of which block on the disk device 12 exists in the cache memory 1, and it is stored in the cache memory 1 at which address. A management table 2 of the cache memory 1 as shown in FIG.

FIG. 3 is a block diagram showing the configuration of a conventional disk cache device.

In FIG. 3, the disk device 12 is, as described above,
It is managed by dividing it into blocks of a certain size. The cache memory 1 is divided into the same size as the blocks in the disk device 12, and is addressed by memory addresses A ₀ ′ to A _n ′.

The management table 2 stores V bits and block addresses for each block of the cache memory 1. The V bit is a flag indicating whether or not a copy of the data on the disk device 12 exists in the cache memory 1 (“1” if it exists, and “0” otherwise). Further, the block address is the upper portion of the disk address on the disk device 12 of the corresponding block when a copy of the data on the disk device 12 exists in the cache memory 1 (the disk address diagonal line shown in FIG. 3). Part) is taken out and stored.

If there is a request from the host computer 11 to read the data in a block, the disk cache control device 14 determines whether or not the block exists in the cache memory 1 by using the management table 2 Start searching for. This search is performed by sequentially updating the table address counter 7.

In FIG. 3, first, the table address A ₀ at the head of the management table 2 is searched, and whether or not the V bit is “1” is determined by the comparison means 4 ′. If "0", since the disk address is invalid, and outputs the table address counter + 1 signals in the table address counter 7, thereby table address counter 7 proceeds to the next table address A _1. In the case of "1", the disk address is requested from the host computer 11 and the disk address register 6
It is determined whether or not it matches the search target disk address stored in. If they match, it means that the data corresponding to the search target disk address has hit the cache memory, and therefore the counter update stop signal is output to the table address counter 7 via the AND circuit 8. As a result, the table address counter 7 is stopped and the search of the management table is completed. On the other hand, if the disk addresses do not match, the table address counter signal +1 is output and the table address counter 7 advances to the next table address A ₁ . After that, the same procedure was repeated sequentially to detect hits / misses.

(Problems to be Solved by the Invention) However, in the disk cache device as described above, the head table address A ₀ of the management table 2 is set.
There is a problem that the search time becomes long because the search is sequentially performed from. In particular, in the case of a mishit, the data has to be read from the disk device 12 by the disk controller 13 after searching n + 1 times the size of the management table 2. Therefore, there is a problem that the access time of the disk device becomes long.

The present invention has been made in view of the above points, and an object of the present invention is to provide a disk cache device that reduces the time spent for hit or miss hit determination and enables efficient search. is there.

(Means for Solving the Problems) A disk cache device of the present invention divides data stored in the disk device into a large number of blocks, and transfers the data to each block, and a cache memory for each block. A management table that stores the disk address corresponding to the data of each block, and disk address information that represents the size relationship of each disk address for two or more disk addresses that are stored in the management table and that have consecutive table addresses. Disk address information storage means for storing, and for reading the data corresponding to the disk address to be searched,
When searching the management table in the order of the table addresses, comparing means for obtaining a magnitude relationship between the disk address to be searched and the disk address stored in the table address being searched, and a comparison result by the comparing means and the disk address information. And at least a table address control means for determining the size relationship between the disk address stored in the next table address and the search target disk address, and skipping the at least the next table address to update the table address. It is characterized by that.

(Operation) In the above device, when searching the management table in the order of table addresses, not only whether or not the disk address to be searched matches the disk address being searched,
The magnitude relationship between the search target disk address and the disk address being searched is determined. Whether or not the disk address stored in the next and subsequent table addresses is larger or smaller than the disk address being searched, in correspondence with the disk address stored in the table address being searched in the management table The disc address information indicating the is stored. With this disk address information, when the size relationship between the search target disk address, the disk address being searched, and the next and subsequent disk addresses is in descending order, and in the decreasing order, the next and subsequent disk addresses are It can be determined that it cannot match the disk address of the search target.
In this case, a predetermined number of disk addresses after the next are skipped without being searched, and the next disk address is searched. This shortens the search time of the management table.

(Embodiment) FIG. 1 is a block diagram showing an embodiment of a disk cache device of the present invention.

The apparatus shown in FIG. 1 comprises a cache memory 1, a management table 2, a disk address information storage means 3, and a comparison means 4.
And table address control means 5 and the like.

The cache memory 1 is similar to the conventional one and is composed of a random access memory or the like. In the cache memory 1, the data stored in the disk device 12 is divided into a large number of blocks and is transcribed for each block.

The management table 2 is also similar to the conventional one and is composed of a random access memory or the like. In this management table 2,
The disk address is stored in association with the data of each block on the cache memory 1, and the V bit indicating whether the disk address is valid or invalid is stored.

The disk address information storage means 3 is for storing the following disk address information P. The disk address information P is information indicating the magnitude relationship of each disk address for two or more disk addresses having consecutive table addresses. The disc address information P in the illustrated example represents the magnitude relation between two consecutive disc addresses. That is, the illustrated disk address information P
Is composed of 1-bit information. When the value is "1", it means that the disk address of the next table address is large, and when the value is "0", it means that the disk address of the next table address is small. . These values are set regardless of whether the value of the V bit is "1" or "0". The disk address information storage means 3 for storing the disk address information P has a table address A _{0 of the} management table 2.
It is provided corresponding to ~ A _n .

The comparison means 4 is composed of a comparator, and compares the search target disk address stored in the disk address register 6 with the disk address of the table address designated by the table address counter 7 in the management table 2. The comparing means 4 sets the signal A = B to a high level when both disk addresses match. Signal A
= B is at the high level and the V bit is 1, the output of the AND circuit 8 becomes at the high level and the updating of the table address counter is stopped. At this time, the data corresponding to the table address indicated by the table address counter 7 is read from the cache memory 1. In this way, the data corresponding to the disk address to be searched is read.

Further, the comparison means 4 compares the search target disk address stored in the disk address register 6 with the management table 2
Of the table address designated by the table address counter 7 in FIG.
To high level. These signals A> B or signal A
<B is input to the table address control means 5.

The table address control means 5 is for controlling the update of the table address of the table address counter 7 based on the comparison result of the comparison means 4 and the disk address information P. The table address control means 5 first determines the magnitude relationship between at least the disk address stored in the next table address and the search target disk address. In the illustrated example, only the size relationship between the disk address stored in the next table address and the search target disk address is determined. That is, when the disk address stored in the current table address is larger than the search target disk address and the disk address information P is "1", the disk address stored in the next table address is larger than the search target disk address. . If the disk address stored in the current table address is smaller than the search target disk address and the disk address information P is "0", the disk address stored in the next table address is smaller than the search target disk address. . Therefore, in these cases, since the disk address stored in the next table address cannot match the search target disk address, the table address counter 7 is updated to 2 and the next table address is skipped. As a result, for the disk address stored in the next table address, the comparing means 4 does not compare all the bits. Therefore, the search time of the management table 2 is shortened.

On the other hand, when the disk address stored in the current table address is larger than the search target disk address and the disk address information P is “0”, the disk address stored in the next table address and the search target disk address are The size relationship is unknown. Even when the disk address stored in the current table address is smaller than the search target disk address and the disk address information P is "1", the disk address stored in the next table address and the search target disk address are The size relationship is unknown. Therefore, in these cases, the table address counter 7 is updated by 1 as usual.

Next, the operation of the apparatus configured as described above will be described.

FIG. 4 is an explanatory diagram of the search means of the management table of FIG.

In the illustrated management table 2, table addresses A _{0 to} A
Disk addresses 300, 500, 100, 50, 10, 600, 200 are stored in ₆ , respectively. Therefore, the disk address information P is 1,0,0, for the table addresses A _{0 to} A ₅ , respectively.
It becomes 0,1,0. The disk address of the table address A ₂ is invalid and the V bit is 0.

The search of the management table 2 is always performed from the table address A ₀ . The operation pattern when searching the management table 2 includes the following five types of patterns. It is assumed that A = the disk address stored in the table address indicated by the table address counter, and B = the search target disk address.

If A = B and V = 1, it means a hit and the search is completed.

If A> B and P = 0, the table address is updated by 1.

If A> B and P = 1, the table address is updated by 2.

If A <B and P = 0, the table address is updated by 2.

If A <B and P = 1, the table address is updated by 1.

Now, it is assumed that the host computer 11 has designated the reading of data at the disk address 200X (X is an address within a block). First, the table address A ₀ operates in a pattern, skips the table address A ₁ and proceeds to the table address A ₂ . Then, the table address A _2, and operate in pattern, the process goes to the table address A ₄ to skip table address A _3. Then, at table address A ₄ , it operates on the pattern and proceeds to table address A ₅ .
Then, at table address A ₆ , it works with the pattern,
Go to table address A ₆ . And the table address
At A ₆ , it is detected that the search target disk address 200 is hit, and the search is completed.

If the search target disk address is a mishit,
A search is performed up to the table address A _n, and an overflow signal is output from the table address counter 7 in FIG.

The disk cache device of the present invention is not limited to the above embodiments.

That is, in the above-described embodiment, the disc address information P is set to 1 bit and only the magnitude relation between the adjacent disc addresses is represented. , It is also possible to represent the magnitude relationship of a plurality of consecutive three or more disk addresses. In this case, not only one skip when searching for a disk address but also two or more skips may occur. Thereby, the search time of the management table can be further shortened.

(Effects of the Invention) Since the disk cache device of the present invention having the above-described configuration is capable of simultaneously searching the next and subsequent disk addresses based on the disk address information, it is possible to shorten the search time of the management table of the cache memory. . Therefore, it is possible to shorten the time for determining the hit / miss hit of the data in the cache memory, and it is possible to significantly reduce the access time of the disk device.

[Brief description of drawings]

1 is a block diagram showing a configuration of a disk cache device of the present invention, FIG. 2 is a block diagram showing a schematic configuration of a conventional disk cache device, FIG. 3 is a block diagram showing a configuration of a conventional disk cache device, FIG. 4 is an explanatory diagram of a search procedure of the management table of FIG. 1 ... Cache memory, 2 ... Management table, 3 ...
Disc address information storage means, 4 ... comparison means, 5 ...
... address control means, 6 ... disk address register, 7 ... table address counter, 8 ... AND circuit.

Claims (1)

[Claims] 1. A cache memory that divides data stored in a disk device into a large number of blocks, and transfers the data to each block, and a disk address corresponding to the data of each block on the cache memory. A management table to be stored, a disk address information storage unit that stores disk address information indicating the size relationship of each disk address for two or more disk addresses stored in the management table and having consecutive table addresses, and a search target Comparing means for determining the size relationship between the disk address to be searched and the disk address stored in the table address being searched when the management table is searched in the table address order in order to read the data corresponding to the disk address. , Comparison by the comparison means A table that determines the size relationship between the disk address stored in at least the next table address and the disk address to be searched based on the result and the disk address information, and skips the at least the next table address to update the table address. A disk cache device comprising address control means.