JPH07106424A - Layout editor - Google Patents

Abstract

PURPOSE:To decide automatically whether a wiring is spread over a wide range on a chip and to make a layout designer recognize the results. CONSTITUTION:The layout editor comprises means 3 for retrieving the interconnection of elements recognized by an element recognizing means 2, means 4 for calculating the length of interconnection thus retrieved and retrieving a specified length of interconnection based on the calculation results, and means 10 for presenting an emphasized wiring of specific length on a display 11.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a layout editor device used for layout design of a semiconductor integrated circuit, and more particularly, by allowing a designer to recognize a connection state of elements such as transistors, resistors and capacitors on a layout, The present invention relates to a layout editor device that improves the characteristics of a circuit.

[0002]

2. Description of the Related Art FIG. 8 is a front view showing a conventional general layout editor device. In FIG. 8, reference numeral 19 is for inputting / editing layout figures such as elements such as transistors, resistors, capacitors and wirings. A mouse, 11 is a display for displaying the input layout graphic, and 18 is a keyboard for inputting alphanumeric characters.

FIG. 9 shows a transistor 15 as the above element.
, Collector 15a, base 15b, emitter 15
It consists of c. In addition, FIG. 10 shows a resistor 16 as another element.
And has a pair of electrodes 16a and 16b. further,
FIG. 11 shows a capacitor 17 as another element, which has a pair of electrodes 17a and 17b.

Next, the operation will be described. In the layout design, elements such as transistors, resistors, and capacitors have terminals. Therefore, first, each element is arranged and the layout figure is created by connecting the terminals of the elements with wiring. For example, a transistor as shown in FIG. 9 is arranged on the display 11 of the layout editor device, and the wiring 14 is mutually connected to each terminal of the base 15b, the emitter 15c, and the collector 15a of the transistor 15 based on the connection information of the circuit diagram. Then, the layout figure as shown in FIG. 12 is created.

FIG. 12 shows that the terminals of the bases 15b of the three transistors 15 are connected to the same wiring. In addition, all the elements in the circuit diagram should be placed and wired together.
FIG. 13 shows the state of the entire chip that has completed steps a and 14b. In FIG. 13, what is arranged in the periphery is
A plurality of pads 13 for inputting or outputting electric signals from the pins of the IC 41.

[0006]

Since the conventional layout editor device is constructed as described above, it is only possible to input / edit a graphic and perform element recognition by graphic operation.
There is a problem in that the layout designer does not give a hint to the layout designer about the connected wiring state, and the layout designer has to visually check the input layout graphic by plotting it.

The invention of claim 1 has been made to solve the above-mentioned problems, and automatically detects whether or not the wiring provided on the chip extends over a wide area. It is an object of the present invention to obtain a layout editor device that allows a layout designer to recognize.

According to the second aspect of the present invention, by judging whether or not the operating conditions of the elements to be connected are the same for each wiring provided on the chip, if they are not the same, alert the designer. It is an object of the present invention to obtain a layout editor device that can satisfy the characteristics intended by the designer.

[0009]

A layout editor device according to the invention of claim 1 is a graphic input / editing means for inputting / editing a layout graphic, and a graphic operation for the layout graphic, and an element to be laid out. And an element recognition means for recognizing the terminal of the element, a wiring search means for searching the wiring connected to the terminal of the recognized element, a wiring length of the searched wiring, and specifying from the calculation result. Wiring length processing means for searching for a long wiring is provided, and the wiring highlighting means highlights the searched wiring of the specified length on the display.

A layout editor device according to a second aspect of the present invention is provided with a wiring check means for designating an operating condition of an element connected to a wiring and determining whether or not the operating condition is the same on one wiring. The wiring highlighting means highlights the checked and non-identical wirings on the display.

[0011]

According to the first aspect of the invention, the layout editor device searches for a wire connected to a terminal of an element arranged in the layout, automatically finds the wire length, and displays the wire having a long wire length on the display. By emphasizing by coloring or the like, it is possible to allow the designer to confirm the wiring provided over a wide range on the layout and to shorten the layout design time.

According to the second aspect of the present invention, the layout editor device automatically determines whether or not the operation state of the elements on the layout is the same as the wiring connected to the terminals of the elements arranged in the layout. The layout design time is shortened compared to the case where the wiring is made to be judged and the wirings in different operating states are highlighted on the display to visually confirm it in the past.

[0013]

EXAMPLES Example 1. An embodiment of the present invention will be described below with reference to the drawings. In FIG. 1, reference numeral 1 is a graphic input / editing means for inputting / editing a layout graphic using a mouse, a keyboard and a display, and 2 is a graphic operation such as AND, OR and NOT for the input layout graphic,
It is an element recognition means for recognizing elements such as transistors, resistors and capacitors and terminals of these elements.

Reference numeral 3 is a wiring retrieval means for retrieving a wiring connected to a terminal of a designated element, and 4 is a wiring length calculation means 6 for obtaining a wiring length of the wiring and a result of the wiring length calculation, for example, the most specific length, Specified length wiring search means 7 for long wiring
The wiring length processing means 5 and 5 are element condition designating means 8
And an element condition determining means 9 for determining whether or not the operating conditions of the element such as transistor saturation are the same on one wiring. In this embodiment, the layout editor device is provided with both the wiring length processing means 4 and the wiring checking means 5 as shown in FIG. 1, but it may have one of them. Reference numeral 10 denotes a wiring highlighting unit that highlights the wiring that has been subjected to the wiring length processing or the wiring check on the display 11 by coloring or the like.

Next, the operation will be described. First, FIG.
Transistor 15 and resistor 1 as shown in FIGS.
6, the layout figure of the capacitor 17 is input using the figure input / editing means of the layout editor, and then the figure recognition of the layout figure input by the element recognizing means 2 is performed, and each element and these elements are combined by the figure combination. Recognize the terminal area of.

When the terminal position of each element is determined in this way, the wiring search means 3 next searches for the wiring connected to the terminal of the element. For example, in the power supply circuit A as shown in FIG. 2, the wiring 20b connected to the base terminal 20a of the transistor 20 extends over a wide area on the chip layout, or a constant current source called a current mirror as shown in FIG. If it is connected to the base terminal 21a of the B transistor 21, it will be affected by the voltage drop of the GND line 21b and the temperature distribution in the chip, which is not preferable for the circuit operation.

For example, as shown in FIG. 12, there is a problem when the wiring 14 connected to the base terminal 15b of the transistor 15 extends over a wide range like the wiring 14b shown in FIG. Therefore, when the base terminal 15b of the transistor is designated in the wiring searching means 3, this transistor 15
All the wirings 14 connected to the base terminal 15b of the above are listed.

Next, as shown in FIG. 4, in the wiring length processing means 4, the wirings listed by the wiring searching means 3 are connected to the wirings 32a to which the base terminals 31 are connected and the base terminals 31 are apexes. 32b is expressed using a graph indicated by a solid line or a broken line. That is, as shown in the flow chart of FIG. 6, the wiring length calculating means 6 lists the terminals of the elements to be connected for each wiring (step ST2).
2) Find the distance between two terminals for all combinations that select two of the base terminals included in each wiring (step ST23). Next, it is determined whether or not there is another combination of two terminals from the listed (step ST24), and the one with the longest distance is set as the wiring distance (step ST25).

In the example of FIG. 4, the distance between the terminal 31a and the terminal 31b is the longest, and the wiring 32a shown by the solid line is longer than the wiring 32b shown by the broken line. 32a is taken as the longest wiring. When obtaining the wiring length, the distance including the closed loop as shown in FIG. 5 is not calculated. For example, the longest distance from the terminal 33 to the terminal 39 is 33-34-35-37-38-36.
It is the sum of the distances of -39. Finally, the wiring highlighted by the specific length wiring searching means 7 is recognized by the wiring highlighting means 10 in the layout, and highlighting such as flushing and coloring is performed on the display 11 on the wiring. And alert the designer.

Conventionally, it has been a very time-consuming task with the high integration of the circuit because the designer visually confirms which wiring covers a wide range on the layout. The layout can be checked automatically.

On the other hand, with respect to the wirings listed by the wiring searching means 3, the wiring checking means 5 specifies the element operating conditions. For example, a plurality of stages of constant current circuits shown in FIG. 3 are connected to one base terminal 21a, a current is supplied from a wiring connected to the base terminal 21a, and some constant currents therein are saturated (constant). When the voltage between the collector and emitter of the current transistor approaches 0), not only the current amplification factor decreases, but also the base current increases, and as a result, the current value of the other constant current circuit goes wrong and the target design value is I can't get it.

Therefore, in the element condition designating means 8, as shown in the flow chart of FIG. 7, the saturation state of the transistor as the operating condition is designated (step ST26), and the one in which the transistor is saturated is selected. The element condition judging means 9 checks whether or not an unsaturated transistor is connected to the wiring connected to the transistor (step ST28). The element condition designating means 8 may be designated one by one by the designer, or by using the result of the circuit simulation, the collector of the transistor,
The transistor may be automatically specified by determining whether the voltage between the emitters is close to (or the same as) 0. Then, when it is determined that the saturated transistor and the non-saturated transistor are connected to the wiring as a result of the check by the element condition determining means 9, the wiring is listed (step ST29), and the wiring is listed. This is highlighted on the display 11 by the highlighting means 10.

[0023]

As described above, according to the first aspect of the invention, the graphic input / editing means for inputting / editing the layout graphic, the graphic operation for the layout graphic, the element to be laid out and the layout target element An element recognition means for recognizing the terminal of the element, a wiring search means for searching the wiring connected to the recognized terminal of the element, a wiring length of the searched wiring is calculated, and a specific length is calculated from the calculation result. And a wiring length processing means for searching the wiring, and the wiring length highlighting means is configured to highlight the searched wiring of the specific length on the display. Can automatically detect whether or not the
There is an effect that the layout designer can recognize the detection result to improve the efficiency of layout design.

According to a second aspect of the present invention, there is provided wiring check means for designating an operating condition of an element connected to the wiring and determining whether or not the operating condition is the same on one wiring. Since the wiring highlighting means is configured to highlight the checked wiring on the display, it is necessary to inform the layout designer that the operating conditions of the connected elements are not the same for each wiring applied on the chip. It is possible to obtain what can be recognized and realize a layout design that satisfies the intended characteristics.

[Brief description of drawings]

FIG. 1 is a block diagram showing a layout editor device according to an embodiment of the present invention.

FIG. 2 is a circuit diagram showing a power supply circuit having a wiring to be searched in the present invention.

FIG. 3 is a circuit diagram showing a constant current source having a wiring to be searched in the present invention.

FIG. 4 is an explanatory view showing, in the form of a graph, a wiring connecting the base terminals searched by the present invention.

FIG. 5 is an explanatory view showing another wiring connecting the base terminals searched by the present invention by a graph display.

FIG. 6 is a flowchart showing an operation flow of a wiring length processing means in FIG.

FIG. 7 is a flowchart showing a flow of operations of the wiring check means in FIG.

FIG. 8 is an external view showing a conventional layout editor device.

FIG. 9 is a layout diagram showing a general transistor.

FIG. 10 is a layout diagram showing a general resistance.

FIG. 11 is a layout diagram showing a general capacitor.

FIG. 12 is a layout diagram in which three transistors are connected.

FIG. 13 is a layout diagram showing a chip in which a large number of elements are arranged.

[Explanation of symbols]

 1 Graphic Input / Editing Means 2 Element Recognition Means 3 Wiring Search Means 4 Wiring Length Processing Means 5 Wiring Check Means 10 Wiring Highlighting Means 11 Display

Claims (2)

[Claims] 1. A graphic input / editing means for inputting / editing a layout graphic, and an element recognition means for recognizing an element to be laid out and a terminal of the element by performing graphic calculation on the layout graphic. And a wiring length processing means for calculating the wiring length of the searched wiring and searching for a wiring of a specific length from the calculation result, and a wiring searching means for searching the wiring connected to the terminal of the device. A layout editor device comprising: wiring highlighting means for highlighting a wire of a specific length on a display. 2. A graphic input / editing means for inputting / editing a layout graphic, an element recognizing means for recognizing an element to be laid out and terminals of the element by performing a graphic operation on the layout graphic. A wiring search means for searching a wiring connected to the terminal of the device, and an operating condition of the device connected to the searched wiring,
A layout editor device comprising: wiring checking means for judging whether or not the operating conditions are the same on one wiring; and wiring highlighting means for highlighting the wiring checked wiring on a display.