JPH07104378B2 - Network analyzer - Google Patents

Description

TECHNICAL FIELD The present invention relates to a network analyzer for measuring various characteristics related to transmission of an object to be measured, and more particularly to a network analyzer capable of performing stable measurement.

[Prior Art] FIG. 5 is a block diagram showing a conventional network analyzer.

This network analyzer has two completely independent channels. These two channels consist of a through route 51 for directly transmitting the test signal source 50 to the subsequent stage, and a measurement route 52 to which the DUT 60 is connected. Each channel has an RF input circuit 53, 54 and a storage means. It has 55,56. The values measured by the RF input circuit 53 are stored in the storage means 55 and 56.

Therefore, if the characteristics of the RF input circuits of the through route 51 and the measurement route 52 are the same, the characteristics of the DUT can be accurately obtained by subtracting the values of the respective routes by the data processing unit 57. .

[Problems to be Solved by the Invention] In the above-mentioned conventional technique, an element (especially IF
The change of the filter) with respect to temperature varies, and even in the measurement with the two-channel configuration, there is an influence of offset fluctuation due to the aging of the measurement system, and it is difficult to maintain accurate measurement for a long time.

An object of the present invention is to provide a network analyzer that can correct the fluctuation of the measured value due to the passage of time and can process the correction quickly even if the RF input circuit has one channel.

[Means for Solving the Problems] In achieving the above object, the inventor has paid attention to the following points.

Since the error due to the passage of time mainly occurs after conversion to the IF section, that is, after conversion to a certain constant frequency, it is irrelevant to the frequency applied to the device under test. Therefore, the error due to the passage of time can be removed only by correcting the fluctuation with respect to the arbitrary frequency f0.

Specifically, a test signal source 1 that outputs a frequency-swept signal, a through route 2c that directly transmits the signal from the test signal source, and a measurement route 2d that transmits the signal via the DUT 11. A switching means 2 for switching the signal, an RF input circuit 3 for receiving the signal transmitted from the switching means in tune by following the frequency sweep change of the test signal, and thereafter detecting and outputting the detected signal, and the switching means. Is set to the measurement route, and the switching means is set to the through route within the measurement state in which the measurement is performed by sweeping the test signal source and the blanking time T'during the sweep period of the measurement state. A control means 4 for switching and controlling a calibration state in which a test signal source is set to a fixed frequency f0 and performing calibration, and a first storage means 7g for storing an initial value T0 output from the RF input circuit in the calibration state. , The measurement Second storage means 7f for storing the value Tk output from the RF input circuit through the through route when the state is switched to the calibration state again after a predetermined time has passed, and stored in the first and second storage means. Computation means 7e for obtaining the correction value ΔTk by calculating the difference between the value Tk and T0 being stored, and a correction for correcting and outputting the measurement value output by the RF input circuit with the correction value in the subsequent measurement state. Means 7d are provided.

[Operation] According to the network analyzer having the above-described configuration, the RF input circuit 3 can be configured by a single circuit because the switching means 2 in the preceding stage switches between the through route 2c and the measurement route 2d.

The switching means 2 is switched by the control means 4 to switch between the measurement state and the calibration state. And
Initial value T0 measured by the through route in the initial calibration state
Is stored in the first storage means 7g, and after the measurement state has passed for a predetermined time, the measurement value Tk in the through route is obtained again in the calibration state. ΔTk (= Tk−T0) can be obtained by calculation. By setting this correction value ΔTk in the correction means 7d, it is possible to correct the offset value of the subsequent measurement value with the correction value ΔTk and output it to the display unit. And
By performing the correction operation every predetermined period, it is possible to accurately measure the object to be measured in a state where the offset fluctuation is always corrected.

[Embodiment] FIG. 1 is a block diagram showing an embodiment of the network analyzer of the present invention.

The test signal source 1 is connected to a switching means 2 provided with an input terminal of a network analyzer. In this test signal source, frequency signals of f1 and f2 are generated from two local signal sources 1a and 1b, respectively, and are output from the terminal 1d as signals of (f1 ± f2) by the mixer 1c. Further, the signal f1 is output from the terminal 1e.

The switching means 2 uses the switches 2a and 2b for the through route 2c.
Alternatively, one of the measurement routes 2d is switched.
The device under test 11 such as a circuit element is connected to the measurement route 2d.

The output of the switching means 2 is input to one RF input circuit 3. The RF input circuit 3 has a mixer 3 after the attenuator ATT.
a is provided. The mixer 3a receives the input signal (f1 ± f2)
Generates and outputs the difference from the signal f1 output from the terminal 1e of the test signal source 1, and outputs the signal by the 1F filter 3b.
Only f2 is supplied to the latter stage. Further, the mixer 3c mixes the signal f3 of the local signal source 3d with the signal f2 and outputs (f2 ± f3). This signal is (f2-f3) by 1F filter 3e
Only the signal is output and is digitally output from the terminal 3h through the detection circuit 3f and the A / D converter 3g.

The output of the terminal 3h is displayed on the display unit 8 as a measured value, and an offset correction means 7 for correcting the above-mentioned offset is provided in the middle of the route.

The offset correction means 7 stores the measured value of the terminal 3h 2
First memory 7a, second memory 7b, these first and second memories
Data processing means 7c for calculating and outputting data from the stored values in the memories 7a, 7b, and correction means 7d for correcting the corrected data with the correction value ΔT and outputting it to the display section 8.

Further, the measured value at the terminal 3h is input to the first and second storage means 7g and 7f. The calculation means 7e uses the output value of the terminal 3h (actually buffered in the second storage means 7) and the storage value of the first storage means 7g to output the correction value ΔTk output from the correction means 7d.
Is calculated and output.

Then, the control means 4 controls the operation of each of these components.

For the test signal source 1, the local signal source 1a is controlled. The local signal source 1a outputs a sweep frequency in the measurement state, and outputs a predetermined fixed frequency in the configuration state.

With respect to the switching means 2, the switching of the switches 2a and 2b is controlled so that the route is either through or measurement.

For the male set correcting means 7, the data processing means 7c,
It controls the operation timing of each component of the memories 7a, 7b and the arithmetic means 7e.

Further, the control means 4 obtains the timing of the control operation of each component for the offset correction by the timer 4a. This timing will be described later.

Next, the male set correction operation of the network analyzer having the above configuration will be described with reference to the flowcharts of FIGS. 2 (a) and 2 (b).

At the time of initializing, such as when the power is turned on, the control means 4 performs an initial operation (SP1 to SP3). At this time, the DUT 11 is not connected to the measurement route 2d, but the terminal of the DUT is directly connected (SP
1). In this state, the switches 2a and 2b of the switching means 2 are switched to the measurement route 2d side, and the measured value S0 obtained from the terminal 3h
(F) is stored in the first memory 7a (SP2).

At this time, at the same time, the switches 2a and 2b of the switching means 2 are switched to the through route 2c side, and the value is measured by the through route 2c.
T0 (f0) is measured and stored in the first storage means 7g (SP3). Here, f0 indicates the output frequency of the terminal 1d when the local signal source 1a is set to a predetermined fixed frequency by the control means 4. The fixed frequency f0 may be supplied to the through route 2c of the switching means 2 from the outside.

Below, correction operation for offset fluctuation (SP4 to SP11)
Move to.

After a predetermined sweep k of the sweep-controlled local signal source 1a (for example, after replacing the DUT 11), the timing is adjusted by the timer 4a and the measurement is performed by the through route 2c (SP4).

Then, the calculating means 7e displays the measured value Tk output from the terminal 3h.
(F0) is measured, T0 (f0) stored in the first storage means 7g is read, and ΔTk = Tk (f0) -T0 (f0) is obtained (SP5).

This ΔTk is set in the correction means 7d and the past correction value ΔT
Are erased (SP6). At the start of measurement, Tk (f0) = T0 (f
Since 0), ΔTk = 0 is set.

Next, the switches 2a and 2b are switched to the measurement route side 2 by the switching means 2.
The measurement value of the device under test 11 is measured by the measurement route 2d after switching to d (SP7). Also, the measured value at this time Xh (f)
Is stored in the second memory 7b (SP8).

Next, the data processing means 7c reads S0 (f) stored in the first memory 7a, calculates Lk (f) = Xh (f) -S0 (f) (SP9), and corrects means 7d. Send to. This Lk
(F) is a value obtained by correcting the frequency characteristic of the measurement route, but is a measurement value in which the offset variation is not taken into consideration. The characteristic diagram is shown in FIG.

Then, the correction unit 7d, in order to correct the offset variation,
Measured value corrected by correction value ΔTk Lk ′ (f) = Lk (f) −ΔTk = Xk (f) −S0 (f) −ΔTk is calculated (SP10) and Lk ′ (f) is shown in FIG. 4 (b). () Is output to the display unit 8 (SP11).

For the next predetermined sweep k times, the operations from SP7 to SP11 are repeated.

FIG. 3 shows a test signal source 1 controlled by the control means 4.
3 is a frequency sweep diagram of FIG. Here, T is one sweep time, and T'is a blanking time.

The offset variation correction operation (SP4 to SP11) is performed by the timer 4a at each predetermined sweep k, and as shown in FIG. 3, the blanking time T during the sweep cycle T is The predetermined frequency f0 is output within ′.

This is irrelevant to the frequency applied to the device under test, because the error due to the passage of time mainly occurs after changing to the IF units 3e, 3f, 3g, that is, a certain constant frequency (f2-f3). Therefore, the error due to the passage of time can be removed only by correcting the fluctuation with respect to the arbitrary frequency f0.

By the above operation, the offset fluctuation is always corrected every predetermined sweep k, and an accurate measured value can be obtained.

Also, when the DUT is replaced after each sweep and a new measurement is performed, if the offset fluctuation correction operation is performed for each sweep, each DUT can be accurately measured under the same conditions. be able to.

Further, the detection circuit 3f may be a phase comparator that compares the phase with the internal reference signal (f2-f3).

[Effect of the Invention] According to the network analyzer of the present invention, even if the RF input circuit has only one channel, it is possible to correct the offset fluctuation due to the passage of time, and obtain an accurate measured value.

Further, since the offset variation correction operation can be performed every predetermined sweep of the measurement signal source during continuous measurement of the measured object, the offset variation can always be canceled.

[Brief description of drawings]

FIG. 1 is a block diagram showing a network analyzer of the present invention, FIGS. 2 (a) and 2 (b) are flowcharts showing the operation of each network analyzer, and FIG. 3 is an example of frequency setting of a signal source for measurement. Figure, Figure 4 (a),
(B) is a diagram showing measured values of the DUT displayed on the display unit before and after the offset variation correction operation, and FIG. 5 is a block diagram showing a conventional network analyzer, respectively. is there. 1 ... Test signal source, 2 ... switching means, 2a, 2b ... switch, 2c ... through route, 2d ... measurement route, 3 ...
RF input circuit, 4 ... Control means, 7 ... Offset correction means, 7a ... First memory, 7b ... Second memory, 7c.
Data processing means, 7d ... correcting means, 7e ... computing means, 7f
...... Second storage means, 7g ...... First storage means, 8 ...... Display unit, 11 ...... DUT.

Claims (1)

[Claims] 1. A test signal source (1) that outputs a frequency-swept signal, a through route (2c) that directly transmits a signal from the test signal source, and a device under test (11). A switching means (2) for switching between a measurement route (2d) to be transmitted, and a signal transmitted from the switching means, which is synchronously received by following a frequency sweep change of the test signal, and thereafter detected and outputs a detected signal. An RF input circuit (3) for setting, a measurement state in which the switching means is set to the measurement route, and the test signal source is swept to perform measurement, and a blanking time (T 'during the sweep cycle of the measurement state). ), The switching means is set to the through route, the test signal source is set to a fixed frequency (f0), and the control state is switched to a calibration state for performing calibration. Initial value output by the input circuit ( T0)
And a second storage means (7g) for storing a value (Tk) output from the RF input circuit through the through route when the calibration state is switched to the calibration state after a predetermined time has passed in the measurement state. A storage means (7f), a calculation means (7e) for calculating a difference between the values (Tk) and (T0) stored in the first and second storage means to obtain a correction value (ΔTk), and thereafter Compensation means (7d) for compensating the measurement value output by the RF input circuit with the compensation value and outputting it in the measurement state of
And a network analyzer characterized in that.