JPH0698204A - Two-dimensional adaptive noise reduction device - Google Patents

Abstract

PURPOSE:To provide a two-dimensional adaptive noise reduction device which can reduce the noises in a simple circuit constitution and with the reduced signal deterioration. CONSTITUTION:A two-dimensional adaptive noise reduction device is provided with a delay element 205 which produces a delayed signal 202 by delaying an input signal 201 by a time equal to (1H-t) where 1H means a single horizontal scanning period. The signal 202, a delayed signal 203 obtained by delaying the signal 202 by the time (t), and a delayed signal 204 obtained by delaying the signal 203 by the time (t) are inputted to the corresponding subtractor circuits 208, 209 and 210 respectively. The difference signals produced by the circuits 208-210 are inputted to a deciding circuit 223 through the corresponding LPF 214, 215 and 216 and ABS circuits 217, 218 and 219 respectively. The circuit 223 decides the presence or absence of the correlation among those difference signals and then produces a control signal based on the decision result to control the switching action of a switch 213.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a two-dimensional adaptive noise reduction device used in a video signal recording / reproducing device.

[0002]

2. Description of the Related Art Generally, a noise reduction device for reducing noise is used in a video signal recording / reproducing device. This noise reduction device is described in Japanese Patent Publication No. 61-42907.

This noise reduction device will be described with reference to the drawings. FIG. 5 is a block diagram showing the configuration of a conventional noise reduction device.

The noise reduction device, as shown in FIG. 5, includes a delay element 105 that takes in the input signal 101. The input signal 101 is input to the delay element 105, and the subtraction circuits 108, 109 and 110 and the addition circuit 12 are input.
Type in 7.

The delay element 105 converts the input signal 101 into {1
It is delayed by H (1 horizontal scanning period) -t} time, and this delay signal 102 is input to the delay element 106, the subtraction circuit 108 and the switch 114.

The delay element 106 further delays the delay signal 102 input thereto by t time, and the delay signal 10
3 is a delay element 107, a subtraction circuit 109 and a switch 1
Enter in 15. Like the delay element 106, the delay element 107 further delays the input delay signal 103 by t hours, and the delay signal 104 is input to the subtraction circuit 110 and the switch 116.

Each of the subtraction circuits 108, 109, 110 subtracts the input signal 101 from the delayed signals 102, 103, 104, and output difference signals 111, 11 indicating the subtracted values.
2 and 113 respectively correspond to the corresponding absolute value circuits (hereinafter, A
117, 118, 119 (referred to as BS circuit).
The ABS circuits 117, 118, 119 calculate the absolute values of the values indicated by the corresponding difference signals 111, 112, 113, and output the signals indicating the absolute values, respectively.

The output signals of the ABS circuits 117, 118 and 119 are supplied to the corresponding comparators 120, 121 and 121, respectively.
Input to 122. The comparators 120, 121, 122 are A
The absolute values indicated by the output signals of the BS circuits 117, 118, 119 are compared with the reference voltage, and a signal indicating the result of the comparison is output.

The output signals of the comparators 120, 121 and 122 are input to the switches 114, 115 and 116 and the control circuit 128. Switches 114, 115, 116
Performs an on / off operation based on the output signals of the corresponding comparators 120, 121, 122, and delay signal 1 corresponding to the on / off operation
02, 103, 104 are output.

The delay signals 102, 103 and 104 output from the switches 114, 115 and 116 are added by the adder circuit 1.
27, and the adder circuit 127 adds the input signals of the input signal 101 and the delay signals 102, 103, 104.

The output signal of the adder circuit 127 is the variable amplifier 1
29, and the variable amplifier 129 performs an amplification process in which the amplification factor for the input signal is set to 1 / N. In addition,
N is an integer obtained by adding 1 to the number of switches that have made an ON operation among the switches 114, 115 and 116.

The amplification factor of the variable amplifier 129 is set based on a control signal from the control circuit 128. Control circuit 128
Generates a control signal for controlling the amplification factor of the variable amplifier 129 based on the outputs of the comparators 120, 121, 122.

Next, the operation of the above noise reduction device will be described with reference to the drawings. FIG. 6 is a diagram for explaining the operation of the noise reduction device of FIG.

Referring to FIG. 6, the input signal at a certain time is x, the delayed signals are y0, y1 and y2, and the operation of the noise reduction device will be described using these signals. The delay signal y0 is a delay signal delayed by {1 horizontal scanning period-t} time with respect to the input signal x,
The delay signal y1 is a delay signal one horizontal scanning period before the input signal x, and the delay signal y2 is a delay signal delayed by {1 horizontal scanning period + t} time with respect to the input signal x.

First, the input signal x is delayed by the delay elements 105 and 10.
6 and 107, and the delayed signals y0, y1 and y2 obtained by this processing are subtracted by the subtraction circuits 108, 109 and
110, the ABS circuits 117, 118, 119 and the comparators 120, 121, 122 in order. Subtraction circuits 108, 109, 110, ABS circuits 117, 118,
The absolute values A0, A1, A2 of the differences between the input signal x and the delayed signals y0, y1, y2 are obtained by the processing of the 119 and the comparators 120, 121, 122, and the absolute values A0, A1, A2 and Depending on the result of comparison with the reference level, the correlation between the input signal x and the delayed signal y0, the input signal x
Between the input signal x and the delayed signal y2
A determination is made as to whether or not there is a correlation with.

When each absolute value (A0, A1, A2) is smaller than the reference level, that is, when it is determined that there is a correlation, the corresponding switches 114, 115 and 116 perform the ON operation, and the adder circuit 127 causes the input signal to enter. A delayed signal having a correlation to this is added to x.

The signal output from the adder circuit 127 is input to the variable amplifier 129, and the variable amplifier 129 is added to the adder circuit 1.
The signal from 27 is averaged. Noise can be reduced by this averaging process.

In the above-described processing, since the vertical correlation and the diagonal correlation are taken into consideration, it is possible to reduce the deterioration of the signal at the time of noise reduction. For example, switch 1
As shown in Table 1, the comparators 14, 115, and 116 are
The adder circuit 127 operates based on the logic corresponding to the result of the comparison of 20, 121, and 122, and the adder circuit 127 sets 0 according to the pattern.
3 types of delayed signals are given.

[0019]

[Table 1] However, in the above noise reduction device, it is necessary to change the gain of the variable amplifier 129 according to the number of switches that perform the on / off operation, which complicates the circuit configuration.

[0020]

As described above, in the conventional noise reduction device, it is necessary to change the gain of the variable amplifier according to the number of delayed signals having a correlation with the input signal, which complicates the circuit configuration. Become.

An object of the present invention is to provide a two-dimensional adaptive noise reduction device capable of reducing noise with less signal deterioration with a simple circuit configuration.

[0022]

SUMMARY OF THE INVENTION A two-dimensional adaptive noise reduction apparatus according to the present invention includes a delay means for generating a plurality of delay signals having different delay times with respect to a current signal, the current signal and the delay signal. Correlation discriminating means for discriminating the presence or absence of correlation with a signal, selecting means for selecting a predetermined delay signal from the delay signals according to the discrimination result of the correlation discriminating means, and delay selected by the selecting means. A difference means for taking a difference between the signal and the current signal and outputting the difference signal; and a subtraction means for subtracting the difference signal from the difference means from the current signal

[0023]

[Operation] In the two-dimensional adaptive noise reduction device of the present invention, the correlation discriminating means discriminates whether or not there is a correlation between the current signal and the delayed signal, and the selecting means responds to the discrimination result of the correlation discriminating means. Noise is reduced by selecting a predetermined delay signal from the delay signals and performing difference processing and subtraction processing on the selected delay signal and the current signal.

Since noise is reduced by performing difference processing and subtraction processing on the delayed signal selected by the selecting means and the current signal, each delay signal having a correlation with the current signal is used as in the conventional case. Moreover, it is not necessary to perform the selection and the variable processing of the gain according to the number of the selected delay signals, and the circuit configuration can be simplified.

Further, since the presence / absence of correlation between a plurality of delayed signals and the current signal is detected and the delayed signal determined to have this correlation is used, it is possible to reduce noise with little signal deterioration.

[0026]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of a two-dimensional adaptive noise reduction device of the present invention.

The two-dimensional adaptive noise reduction device is
As shown in FIG. 1, a delay element 205 that takes in the input signal 201 is provided. The input signal 201 is input to the delay element 205 and the subtraction circuits 208, 209, 210 and the subtraction circuit 211.

The delay element 205 outputs the input signal 201 to {1
The delay signal 202 is delayed by H (1 horizontal scanning period) -t} time, and is input to the delay element 206, the subtraction circuit 208, and the input contact 213a of the switch 213.

The delay element 206 further delays the delay signal 202 input thereto by t hours and outputs the delay signal 20.
3 is a delay element 207, a subtraction circuit 209 and a switch 2
13 is input to the input contact 213b.

Similar to the delay element 206, the delay element 207 delays the input delay signal 203 by t time, and the delay signal 204 is added to the subtraction circuit 210 and the switch 213.
Input to the input contact 213c.

The subtraction circuits 208, 209 and 210 subtract the input signal 201 and the delayed signals 202, 203 and 204, and the output differential signals are input to the corresponding LPFs (low pass filters) 214, 215 and 216. .

The low frequency component signals from the LPFs 214, 215 and 216 are input to ABS circuits 217, 218 and 219. Each ABS circuit 217, 218, 219 corresponds to L
Signals 220, 221, 22 showing the absolute values of the signals from the PFs 214, 215, 216 are calculated.
The output signals 220, 221, and 222 of the ABS circuits 217, 218, and 219 that output 2 are input to the determination circuit 223. The determination circuit 223 outputs the output signal 22.
A control signal for controlling the switching operation of the switch 213 is generated with reference to a preset logic based on 0, 221, 222. The signal output from the output contact 213d of the switch 213 is input to the subtractor 211,
The subtractor 211 takes the difference between the input signal 201 and the output signal from the switch 213 and outputs a difference signal.

The differential signal from the subtractor 211 is input to the LIM (limiter) 224. The LIM 224 limits the amplitude of the input differential signal to a set value and then outputs it.

The signal whose amplitude is limited by the LIM 224 is input to the subtractor 212. The subtractor 212 receives the input signal 201
And the output signal of the LIM 224 are subtracted to output a difference signal.

Next, the operation of the two-dimensional adaptive noise reduction device will be described with reference to the drawings. FIG. 2 is a diagram for explaining the operation of the two-dimensional adaptive noise reduction device of FIG.

Referring to FIG. 2, the input signal at a certain point of time is x, the delayed signals are y0, y1 and y2, and the operation of the noise reduction device will be described using these signals. The delay signal y0 is a delay signal delayed by {1 horizontal scanning period-t} time with respect to the input signal x,
The delay signal y1 is a delay signal one horizontal scanning period before the input signal x, and the delay signal y2 is a delay signal delayed by {1 horizontal scanning period + t} time with respect to the input signal x.

First, the input signal x is input to the delay elements 205 and 20.
6, 207 are sequentially processed, and the delay signals y0, y1, y2 obtained by this processing are subtracted by the subtraction circuits 208, 209,
210, and each of the subtraction circuits 208, 209, 210 outputs x-yo, x-y1, and x-y2 by subtraction processing.

The outputs x-yo, x-y1 and x-y2 of the subtraction circuits 208, 209 and 210 correspond to the corresponding LPF 21.
4, 215, 216 and the corresponding absolute value circuit (hereinafter,
Input to 217, 218, 219, called ABS circuit,
The ABS circuits 217, 218 and 219 are x-yo and xy.
Absolute values A0, A1, A for 1 and xy2 respectively
Output 2 respectively.

Each of the absolute values A0, A1 and A2 is input to the discrimination circuit 223. In the discrimination circuit 223, the absolute value A
Based on 0, A1 and A2, it is determined whether or not the correlation between the input signal x and the delayed signal y0, the correlation between the input signal x and the delayed signal y1 and the correlation between the input signal x and the delayed signal y2.

When the absolute value A0 and the absolute value A1 have no correlation and the absolute value A2 has a correlation, as shown in Table 1, the determination circuit 223 indicates that the pattern has a correlation in the diagonally rightward and downward direction. A determination is made and a control signal instructing the selection of the input contact 213c is output to the switch 213. The switch 213 selects the input contact 213c based on the control signal from the determination circuit 223 and outputs the delay signal y2.

The delay signal y2 from the switch 213 is input to the subtractor 211. The subtracter 211 takes the difference between the input signal x and the delayed signal y2 and outputs the difference signal of (x-y2).

The difference signal from the subtractor 211 is the LIM22.
4 and the LIM 224 outputs the difference signal after limiting the amplitude of this difference signal. The difference signal whose amplitude is limited is input to the subtractor 212.

The subtracter 212 subtracts the difference signal (x-y2) from the input signal x and outputs the signal subjected to this subtraction processing.

Therefore, the noise can be reduced while suppressing the deterioration of the signal in the diagonally right direction.

Next, when the absolute value A1 and the absolute value A2 have no correlation and the absolute value A0 has a correlation, as shown in Table 1, the judgment is that there is a correlation in the diagonally downward left direction with respect to the picture. , And a control signal instructing selection of the input contact 213a is output to the switch 213. Switch 213
Is the input contact 21 based on the control signal from the determination circuit 223.
3a is selected and the delayed signal y0 is output.

The delay signal y0 from the switch 213 is input to the subtractor 211. The subtractor 211 outputs the difference signal (x−y
0) is output. The difference signal from the subtractor 211 is the LIM
After being subjected to amplitude limitation at 224, input to the subtractor 212,
The subtracter 212 outputs a signal obtained by subtracting the difference signal (x-y0) from the input signal x.

Therefore, the noise can be reduced while suppressing the deterioration of the signal in the diagonal left direction.

In other cases, as shown in Table 2, the judgment indicates that there is a correlation in the vertical direction with respect to the picture, and the switch 213 outputs the delay signal y1.

The delay signal y1 from the switch 213 is input to the subtractor 211. The subtractor 211 outputs the difference signal (x−y
1) is output. The difference signal from the subtractor 211 is the LIM
After being subjected to amplitude limitation at 224, input to the subtractor 212,
The subtracter 212 outputs a signal obtained by subtracting the difference signal (x-y1) from the input signal x.

Therefore, the noise can be reduced while suppressing the deterioration of the signal in the substantially vertical direction.

[0052]

[Table 2] As described above, the noise is reduced by using the signal having the correlation in the vertical direction and the diagonal direction in the left / right direction. Therefore, the noise can be reduced while suppressing the deterioration of the signal in the vertical direction and the diagonal direction in the left / right direction.

Next, another two-dimensional adaptive noise reduction device will be described with reference to the drawings. FIG. 3 is a block diagram showing another embodiment of the two-dimensional adaptive noise reduction device of the present invention.

The two-dimensional adaptive noise reduction device is
As shown in FIG. 3, an IC 301 (integrated circuit) that forms a luminance comb filter in cooperation with one horizontal period delay line is provided. The IC 301 has a terminal 302 for outputting the signal 201 to the outside and a terminal 3 for inputting the signal from the outside.
03, and a subtractor 304 that takes the difference between the signal 201 and the signal taken in from the terminal 303 and outputs the difference signal,
LI that limits the amplitude of the difference signal from the subtractor 304
A signal from the LIM 305 based on the detection signal from the decorrelation detection circuit 306 that detects the correlation between the M (limiter) 305 and the differential signal and outputs a detection signal indicating the result of this detection. A switch 307 that performs a selection operation with respect to, and a subtracter 30 that takes the difference between the signal 201 and the output of the switch 307 and outputs this difference signal.
8 and.

The input signal from the terminal of the IC is the delay element 20.
5 and the subtraction circuits 208, 209, 210
To enter.

The delay signal 202 from the delay element 205 is input to the delay element 206, the subtraction circuit 208 and the input contact 213a of the switch 213. The delay signal 203 from the delay element 206 is input to the delay element 207, the subtraction circuit 209, and the input contact 213b of the switch 213. The delay signal 204 from the delay element 207 is input to the subtraction circuit 210 and the input contact 213c of the switch 213.

In each of the subtraction circuits 208, 209 and 210,
The input signal 201 and the delayed signals 202, 203, and 204 are subtracted, and each output difference signal corresponds to the corresponding LPF 214,
ABS circuits 217, 218, 21 via 215, 216
Enter in 9.

The output signals 220, 221, 222 of the ABS circuits 217, 218, 219 are input to the discriminating circuit 223. The determination circuit 223 outputs the output signal 22.
A control signal for controlling the switching operation of the switch 213 is generated with reference to a preset logic based on 0, 221, 222. The signal output from the output contact 213d of the switch 213 is the terminal 303 of the IC 301.
To enter.

Next, the operation of this noise reduction device will be described.

First, the difference signal between the signal 201 output from the terminal 302 of the IC 301 and the delay signal delayed by the delay elements 205, 206 and 207 for a predetermined time is LPF2.
It is input to the ABS circuits 217, 218, 219 via 14 and the ABS circuits 217, 218, 219 generate absolute values A0, A1, A2 corresponding to the differential signals, respectively.

The absolute values A0, A1 and A2 are determined by the discrimination circuit 22.
3 and the discriminating circuit 223 inputs the absolute values A0, A1, A
Based on 2, the control signal for instructing the switching operation of the switch 213 is generated.

The switch 213 performs a switching operation based on the control signal from the discrimination circuit 223, and a predetermined delay signal is output by this switching operation.

The delayed signal from the switch 213 is the IC 30
1 to the terminal 303. The delayed signal taken into the terminal 303 is input to the subtractor 304, and the subtractor 304 outputs the difference signal between the signal 201 and this delayed signal. The difference signal of the subtractor 304 is input to the LIM 305 and the decorrelation detector 306. The LIM 305 limits the amplitude of the input differential signal, and the signal with the limited amplitude is input to the input terminal of the switch 307.

The decorrelation detector 306 detects the presence / absence of correlation in the difference signal from the subtractor 304, and outputs a detection signal indicating the result of this detection to the switch 307. Switch 307
Performs a selection operation based on this detection signal.

When there is no correlation in the difference signal from the subtractor 304, the switch 307 turns off and the subtractor 308 outputs the signal 201. On the other hand, when the difference signal from the subtractor 304 has a correlation, the switch 307 is turned on and the subtractor 308 outputs the signal 201.

As described above, the noise is reduced by using the signals having the correlation in the vertical direction and the diagonal direction to the left and right, so that the noise can be reduced while suppressing the deterioration of the signal in the vertical direction and the diagonal direction to the left and right.

Further, the two-dimensional adaptive noise reduction device can be realized in cooperation with the IC 301 for forming the conventional luminance comb filter, and the circuit structure can be simplified.

In this embodiment, the processing between two lines has been described, but the processing can be performed between three lines as shown in FIG.

[0069]

As described above, according to the two-dimensional adaptive noise reduction apparatus of the present invention, it is possible to reduce noise with less signal deterioration with a simple circuit configuration.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a two-dimensional adaptive noise reduction device of the present invention.

FIG. 2 is a diagram showing a relationship between an input signal and a delay signal used for explaining the operation of the two-dimensional adaptive noise reduction device of FIG.

FIG. 3 is a block diagram showing another embodiment of the two-dimensional adaptive noise reduction device of the present invention.

FIG. 4 is a diagram showing another example of the relationship between an input signal and its delayed signal.

FIG. 5 is a block diagram showing a conventional noise reduction device.

6 is a diagram showing a relationship between an input signal and a delay signal used for explaining the operation of the noise reduction device of FIG.

[Explanation of symbols]

205, 206, 207 ... Delay element, 208, 20
9, 210, 211, 212, 304, 305, 308
... Subtractor, 213 ... Switch, 217, 21
8, 219 ... Absolute value circuit, 223 ... Discrimination circuit, 224, 305 ... Limiter, 306 ... Non-correlation detection circuit.

Claims (4)

[Claims] 1. A delay means for generating a plurality of delayed signals having different delay times from each other with respect to a current signal, a correlation determining means for determining whether or not there is a correlation between the current signal and the delayed signal, and the correlation. Selection means for selecting a predetermined delay signal from the delay signals according to the result of the determination by the determination means, and a difference between the delay signal selected by the selection means and the current signal, and the difference signal A two-dimensional adaptive noise reduction device, comprising: a difference means for outputting and a subtraction means for subtracting the difference signal from the difference means from the current signal. 2. The delay means includes at least one of a delay signal after one horizontal cycle period and a delay signal before one horizontal cycle period before the present signal, and a delay signal before and after t time from this signal. The two-dimensional adaptive noise reduction device according to claim 1, wherein the two are respectively generated. 3. The correlation discriminating means obtains a difference between the current signal and the delayed signal and outputs the difference signal, and a high frequency component for passing a low frequency component of the difference signal from the difference means. Frequency component removing means, absolute value calculating means for calculating the absolute value of the output from the frequency component removing means, and comparing each of the absolute values with a preset reference value, the result of the comparison the current 2. The two-dimensional adaptive noise reduction apparatus according to claim 1, further comprising: a determining unit that determines whether or not there is a correlation between the signal of 1) and the corresponding delayed signal. 4. The first delay signal of at least one of the delay signal after one horizontal cycle period and the delay signal before one horizontal cycle period, and a delay time t time before the first delay signal. 2 delay signals and a third delay signal after time t from the first delay signal are generated, and the relationship between the current signal and the first delay signal and the current signal and the third delay signal are generated. When the relationship with the delay signal is uncorrelated and the first condition that the present signal and the second delay signal are in correlation is satisfied, the selecting means causes the selecting means to output the second delay signal. The relationship between the current signal and the first delay signal and the relationship between the current signal and the second delay signal are uncorrelated, and the current signal and the third delay signal are When the second condition that the and are correlated is satisfied, The selecting means selects the third delayed signal, and when the third condition different from the first condition and the second condition is satisfied, the selecting means selects the first delayed signal. The two-dimensional adaptive noise reduction device described.