JPH0693247B2 - Image display device - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an overlay display of an image display device for displaying binary or multi-valued image data.

Bitmap displays have come to be used as display devices for better man-machine interfaces than conventional technologies.
Many are displaying not only characters but also image data. Regarding the image display, in order to realize a better user interface, a pointer display, a cursor display, a ROI setting display, etc. may be displayed (overlay display) in the image display area.
In conventional overlay display, for example, in IP8500 of DEANZA SYSTEMS, which is a general-purpose image processing system, there is a memory for overlay in addition to the memory for displaying multi-tone images, and the data of graphic or character is stored in the memory. Is written and displayed as an overlay on the image data ("IP8500 Series Image Array Processor Programming Manual" (IP8500 SERIES
IMAGE ARRAY PROCESSOR PROGRAMMING MANUAL))).
However, if the background image is white, that is, the brightness is not so different from that of the overlay display data, the overlay display is difficult to see. In the cursor display, which is one of the overlay displays of the binary image display device, a cursor mask pattern for masking the background data with a pattern including the cursor pattern is prepared in addition to the cursor pattern, and the mask pattern and the background After performing a raster operation (logical sum, logical product, etc.) with the data, the exclusive logical sum raster operation with the display cursor is performed, and the pattern is transferred to the image memory for cursor display,
The cursor is displayed as an overlay. Also, regarding overlay display of characters and the like, there is one in which data for masking the background data in a pattern including the characters and the like is prepared in advance in order to make the characters and the like easy to see (Japanese Patent Laid-Open No. Sho 60).
-149083).

Problems to be Solved by the Invention In the above-mentioned conventional examples, none of the above-mentioned conventional methods clearly shows a reliable means for generating mask data for making the overlay display more clear. That is, in the conventional method, an appropriate mask pattern is prepared for the pattern. As described above, the conventional example has a problem in that it is impossible to generate an appropriate mask pattern for a complicated or unexpected pattern. In addition, for example, if you want to create a mask pattern that masks the background data so that the overlay pattern is easy to see, you need to transfer the overlay pattern to the mask pattern memory and fill in the complicated parts and closed areas. Without it, it is not possible to create a mask pattern that uses the background data as a mask to display the overlay display more clearly. The processing is complicated and takes time.

Means for Solving the Problems In order to solve the above-mentioned problems, the present invention applies m times to an overlay pattern after applying n (n ≧ 2, an integer) thick-lined picture element propagation image calculation means. The thin lined picture element propagation image calculation means is applied and the obtained data is used as mask pattern data.

By the above means, the mask pattern for masking the background image data in order to clarify the overlay display is
A pattern that includes an overlay display pattern and one that fills the concave portion with a small curvature formed by that pattern.By masking the background image data with this mask pattern, the overlay display can be clearly displayed in the image display. Can be displayed. Further, since the overlay display pattern is simply passed through the thick and thin line picture element propagation image calculation means, a mask pattern can be obtained at a very high speed.

EXAMPLE A block diagram of an example of the present invention is shown in FIG. 1, in which 1 is pattern data for overlay display, 2 is an image operation circuit for thick-line picture element propagation of n stages, and 3 is m. An image calculation circuit for propagating thin-line picture elements in stages, and 4 is pattern data of an overlay mask. FIG. 2 is a detailed explanatory diagram of the image operation circuit for thick-lined picture element propagation of n stages in FIG. In the figure, the shift register is composed of three columns, and the length of each is l, and l indicates the length of the memory block storing the pattern to be processed. For example, the pattern to be processed is the fifth pattern. In case of (a) in the figure,
l is 16. Also, the input image data enters the input section of the shift register at the upper left of the figure, the output data of the first column becomes the input data of the second column, and the output data of the second column is 3
The input data of the column and the data to be processed are serially transferred by the shift register. The OR circuit is a circuit that takes the logical sum of the pattern pixel data at the positions 1, 2, 3, 4, 5, 6, 7, 8, and 9 in the shift register group. FIG. 3 is a detailed explanatory diagram of the reduced image element propagation image operation circuit of FIG.

In the figure, the shift register and the input of the pattern data are the same as those of the shift register of FIG. 2, and the data to be processed are serially transferred by the shift register. AND circuit is one of the shift register group
This is a circuit that takes the logical product of the pattern pixel data at the positions 2, 3, 4, 5, 6, 7, 8, and 9. FIG. 4 is a logical block diagram of an embodiment of a display unit that realizes overlay display according to an embodiment of the present invention. In the figure, 11 is a memory for storing image data to be displayed (k-bit gradation), and 12 is a data number for overlay display on the image data. 13 is overlay mask data for masking the image data number in order to clarify the display of the overlay data number. An AND circuit 14 takes a logical product of the gradation bit from the image data 31 and the overlay mask data 13. Reference numeral 15 is an OR circuit that takes the logical sum of the output of the AND circuit 34 and the overlay display data. Reference numeral 16 is the combined display image data. In the actual circuit,
The image data, overlay data, and overlay mask data are stored in the memory respectively and read out in synchronization with the synchronization signals (vertical synchronization and horizontal synchronization) suitable for the display device. It is output to the display screen through the circuit.

FIG. 5 shows an embodiment of overlay mask pattern generation according to the present invention. In the figure, (a) is the pattern data, and the circled part is the overlay display data. (B) is the image calculation of the thickened pixel element propagation performed once, and the circled part is the original pattern. This is data, and the ● part is the part added by the process. (C) is obtained by subjecting (b) to the image calculation of picture element propagation with thicker line. The part of the circle is the original pattern data, and the part of the circle is the part added by the process. (D) is obtained by subjecting (c) to the image calculation of the thin-lined picture element propagation, and the part of ○ is the original pattern data, and the part of ● is other data, and the thickening process is performed twice. After that, the data added after the thinning process is performed once is shown. (E) is a display screen based on the original pattern and the mask data generated by the present invention. The background data displays "white". Also, the numbers in the figure indicate rows and the alphabets indicate columns. In FIG. 1, the mask pattern generation according to the present invention is performed n times (n ≧
2) In the present embodiment, this can be realized by performing these processings twice, and then the thinning calculation processing m times (m <n) and once in the present embodiment.

The processing for thickening and thinning in FIGS. 1 and 2 will be described in more detail with reference to FIGS. 2 and 3. FIG. 2 shows a thick-lined picture element propagation image operation circuit, which is a circuit for performing thickening processing in the vicinity of 8 pixels, that is, a circuit for thickening pixels in the overlay display pattern and pixels in the 8 nearby areas. FIG. 3 shows an image operation circuit for thinning pixel propagation, which is a circuit for performing thinning processing on pixels in eight neighboring pixels, that is, a circuit for thinning pixels in eight neighboring pixels of the overlay display pattern. . This will be described with reference to the embodiments shown in FIGS. 2, 3, and 5. For example, if the overlay display pattern and the mask pattern generated from the overlay display pattern have a 16 × 16 structure, and if the overlay display pattern is (a) in FIG.
The pattern data is serially input from the a-th dot in the column in the order of a, b, c, ... To the processing circuit, and the thickening process is performed in the first process, so the pattern data is input to the shift register in FIG. As a result, the pattern data is sequentially transferred to the shift register. In the process of being transferred, the logical sum of the data at the positions 1,2,3,4,5,6,7,8,9 of the shift register group in the figure is at the position 5 By using the mask data corresponding to the pixels of the pattern data, thickening processing is performed on the pattern data. By sequentially performing this processing, a thick-lined picture element propagation image-computed object is created. In the thinning processing circuit in FIG. 3, the shift register unit is the same as that shown in FIG. 2, and the pattern data or the data that has passed through the processing circuit is input to the shift register unit, and the shift register unit is serially connected. It is transferred to the department. In the process of being transferred, it corresponds to the pixel of the pattern data at the position of the logical product 5 of the position data of the shift register units 1, 2, 3, 4, 5, 6, 7, 8, 9 in the figure. Thinning processing is performed by using the mask data. By sequentially performing this processing, a thin-lined picture element propagation image operation is made on the data.

In one embodiment of the present invention, the pattern data is first subjected to the thickening process twice, so that the portion having a small curvature of the pattern shown in FIG. 5A, “8” in FIG.
As you can see in (b), the space inside the number is 1
Even though it is not lost once, it is completely crushed after two times as shown in (c). Even if the pattern of (c) is subjected to a thinning process, a portion having a small curvature, in this case, the inner space remains as it is, and only the outer portion is thinned (d). In such a series of processing, the mask pattern becomes a pattern in which the intricate portion disappears and the portion is crushed. That is, since the background of that portion is masked, the complicated portion of the pattern to be overlay-displayed clearly appears, for example, as shown in FIG. 5 (e). In the embodiment of the present invention, the thickening and thinning processing of 8 neighborhoods is performed, but the thickening and thinning processing of 4 neighborhoods may be used. Further, in the present embodiment, the thickening processing is performed twice and then the thinning processing is performed once. However, if the curvature of the portion to be crushed is large, the thickening circuit should be a circuit having a larger thickening rate, or This can be dealt with by performing the one-pixel thickening process as in the present embodiment a plurality of times. Also, by controlling the number of thinning processes, if the magnifications of the thickening and thinning processes are the same,
Since the thickening ratio of the mask pattern can be controlled by (the number of thickening processes-the number of thinning processes), a mask pattern having a desired size can be obtained. The image calculation circuit as described above is already realized by the conventional image processing circuit,
It can be easily converted to hardware. That is, an image arithmetic circuit for performing the above-described thickening and thinning processing is provided between the memory for storing the pattern to be processed and the memory for storing the processed mask pattern, and the transfer between the memories is performed. Therefore, the mask pattern according to the present invention can be generated. As described above, for the pattern to be overlay-displayed, the thick line image calculation processing is performed n times (n ≧ 2), and then the thin line calculation processing is performed m times (m <n), and these processings are performed continuously. By doing so, it is possible to create an appropriate mask pattern that fills a portion with a small curvature of the pattern, that is, a complicated portion at a high speed. There is no need to have it, and when generating the mask pattern,
There is no need to use a computer such as a microcomputer.
Therefore, the memory capacity and the amount of hardware are small, and the overlay display can be appropriately performed. Further, the size of the mask pattern and the like can be controlled by controlling the number of steps of thickening and thinning.

Effects of the Invention The present invention has the following effects.

(1) A mask pattern for an arbitrary overlay pattern is filled at a high speed with a small amount of curvature, so that a pattern that makes it easy to see the overlay display can be appropriately generated.

(2) It is possible to generate a particularly effective mask pattern when overlaying a complicated pattern such as characters.

(3) Since the mask pattern can be generated at high speed, it is not necessary to have it in a memory such as a ROM in advance.

[Brief description of drawings]

FIG. 1 is a block diagram of pattern generation of an image display device according to an embodiment of the present invention, FIG. 2 is a block diagram of image calculation of picture element propagation for thickening of the device, and FIG. 3 is thinning of the device. FIG. 4 is a block diagram of an image calculation of picture element propagation, FIG. 4 is a block diagram showing an example of a block unit of a display device including an overlay display unit in the same device, and FIG. 5 is a diagram showing an example of mask pattern generation according to the present invention. is there. 1 ... Overlay data, 2 ... N-thick line-thick line-pixel-propagation image calculation circuit, 3 ... m-thick line-throw image-element propagation image calculation circuit, 4 ... Overlay mask data, 11 ...
… Image data, 12 …… Overlay display data, 13 ……
Overlay mask data, 14 …… AND circuit, 15 …… OR
Circuit, 16 ... Display image data.

Claims (1)

[Claims] 1. A thickening image processing means for performing n times (n ≧ 2, n is an integer) an image calculation of a thickening process having a propagation range of at least one picture element on overlay pattern data, and the thickening process. A thin line image calculation processing unit for creating mask pattern data by performing thin line image calculation having the same propagation range as the thick line image processing m times (n> m, m is an integer) on the output of the image processing unit. A mask means for masking the display image data of a portion for displaying the overlay pattern data by the mask pattern data, and display image data masked by the mask means,
An image display device having an overlay display function having a composite display unit for combining the overlay pattern data.