JPH0691449B2 - Level judgment circuit - Google Patents

Description

Description: TECHNICAL FIELD The present invention has a level determination input terminal and is for turning on / off the operation of other circuits such as a bias circuit according to the level of an input signal supplied to this input terminal. Level decision circuit, especially linear IC and interface driver
The present invention relates to a level determination circuit suitable for use in a chip enable circuit of an IC or a so-called standby circuit of various electronic devices.

[Background technology]

One of the technological trends in semiconductor integrated circuit technology is power saving. For example, when expanding the memory capacity with a read-only memory that uses bipolar transistors, etc., multiple ROM chips are connected in parallel, each chip is equipped with a chip enable circuit, and the chips can be operated only when necessary. There is a technique for reducing the overall power consumption by controlling so as to put it into a state. This chip enable circuit (also called the chip select circuit) is not limited to by-bola memory, but is also used for digital ICs such as TTL and linear ICs such as interface driver ICs.

In the enable circuit of this chip or circuit block, the voltage level of the control signal applied to the enable terminal is judged by the level judgment circuit, and if it is above (or below) the predetermined level, the IC chip or circuit block etc. can be operated. It is designed to generate an enable signal.

However, the bipolar transistor that constitutes the level judgment circuit generally has a negative temperature coefficient, and when the temperature around the IC or the temperature inside the IC package changes, the threshold voltage (V _TH ) of the level judgment circuit is changed. Will change. As a result, an error may occur in the level determination operation. For example, taking an interface driver IC that can interface with TTL (transistor transistor logic) as an example, if the threshold voltage of the level judgment circuit provided in the input stage fluctuates, TT
When the output level of L is high level, the enable signal is not generated, and the whole system malfunctions. The present inventor, in view of this problem,
We examined the use of a differential amplifier to eliminate the temperature characteristics of the level decision circuit.

However, it has been found that this method has a drawback in that a constant current for operating the differential amplifier must be constantly supplied and power consumption increases. Such problems have been clarified by the present inventor.

[Object of the Invention]

An object of the present invention is a level determination circuit having a level determination input terminal and capable of turning on / off the operation of another circuit such as a bias circuit according to the level of an input signal supplied from this input terminal, Another object of the present invention is to provide a level determination circuit which consumes less power and has a threshold voltage that does not have temperature characteristics and operates stably.

The above and other objects and novel characteristics of the present invention are
It will be apparent from the description of this specification and the accompanying drawings.

[Outline of Invention]

The outline of the invention disclosed in the present application is briefly described as follows.

The current densities of the currents flowing through the transistors Q ₁ and Q ₂ are made different so that the difference ΔV _BE between the base-emitter voltage of the two transistors has a positive temperature coefficient, which allows other circuits such as a bias circuit. the operation of the negative threshold voltage level determining transistor Q ₃ to the temperature coefficient as viewed from the compensated level determination input terminal (pin 1) of the on / off is to level determination of the transistors Q3, the ambient temperature of the IC of It achieves the object of the invention of keeping it constant regardless.

[Embodiment 1] Next, referring to FIG. 1, a first embodiment of a level determination circuit to which the present invention is applied will be described. The level determination circuit shown in FIG. 1 is assumed to be composed of a semiconductor integrated circuit (hereinafter referred to as IC). The circles surrounding the numbers are the external connection terminals of the IC.

Hereinafter, the temperature compensation operation of the level determination circuit will be sequentially described.
In the description, a real number is used for convenience of description, but this is one embodiment of the present invention and is not limited to this value.

The specific circuit operation will be described below in order with reference to FIG. In the level judgment circuit 1, the input signal is input to the 1st terminal.
V _IN is supplied, and + V _CC power is supplied to the 2nd terminal.
When the + V _CC power supply is supplied, a current I ₁ flows through a resistor R ₁ transistor Q ₁ formed by a so-called pinch resistor. The current amount of I ₁ is set to 100 μA, for example, depending on the selection of the resistance value of the resistor R ₁ and the characteristics of the transistor Q ₁ . The emitter area SE of the transistor Q ₁ is set to 20 μm ² , for example. And the transistor Q ₂ is the transistor
Although it is biased by the base-emitter voltage V _{BE1 of} Q ₁ , its emitter area SE is the same as that of the transistor Q ₁ . In addition, the resistance R ₂ formed by the so-called pinch resistance when forming an IC is the current flowing through the transistor Q _2.
I ₂ is selected to have a resistance value of 10 μA.

That is, the currents I ₁ and I ₂ are I ₁ : I ₂ = 10: 1. V _BE1 has the following relationship.

In the above equations, K is the Boltzmann constant, T is the absolute temperature, q is the charge, and I _S1 and I _S2 are the saturation currents.

Then, when the difference ΔV _BE between V _BE1 and V _BE2 is _calculated from the above equation 2, Since the emitter areas of the transistors Q ₁ and Q ₂ are the same, if I _S1 = I _S2 , Becomes

On the other hand, since V _{BE1 of the} transistor Q ₁ is directly applied to the base of the transistor Q ₂ as shown in the figure, V _BE1 = V _BE2 + R ₂ ·
It becomes I ₂ . R ₂ and I ₂ are the voltage drop across the resistor R ₂ .
Therefore, the resistance value of the resistor R ₂ is Becomes

That is, the resistance R ₂ is set to 6 KΩ and the transistors Q ₁ and Q ₂ are set.
When the area of each emitter is made the same, the current ratio of the currents I ₁ and I ₂ becomes I ₁ : I ₂ = 10: 1.

On the other hand, a current having a current density 10 times that of the transistor Q ₂ flows through the transistor Q ₁ . Current density is smaller temperature coefficient is small, the temperature coefficient of V _BE1 of the present inventors transistor Q ₁ Studies of about 0.21mV / ℃ smaller than the temperature coefficients of V _BE2 of the transistor Q _2. In other words, the negative temperature characteristic of V _BE1 of the transistor Q ₂ is, the transistor Q ₁
Absolutely greater than the negative temperature characteristic of V _BE1 .

The threshold voltage V _IN seen from the 1st terminal is Required by. In order to investigate the temperature characteristic of the threshold voltage V _IN obtained by the equation (3), partial differentiation of both sides of the equation (2) by the temperature T is performed. Becomes

In the equation (3), R ₂ = 6 KΩ, Becomes

(4) determining the resistance of the resistor R ₃ from the equation becomes R ₃ = 60 k-ohms.

That is, the currents I ₁ and I ₂ are I ₁ : I ₂ = 10: 1, and the resistors R ₂ and R _{3 are}
Can be set to 6KΩ and 60KΩ respectively, the temperature coefficient of the threshold voltage V _IN can be made zero.

By the way, the resistance value of the resistor R ₁ is calculated as follows.

And V _CC = 10V, V _BE1 = 077V, and I ₁ is set to 100 μA, so R ₁
= 93KΩ is obtained.

As described above, the resistance values of the resistors R ₁ , R ₂ , R _{3 and} the current values of the currents I ₁ , I ₂ are determined.

Then, the threshold voltage V _IN when each circuit constant is selected is Becomes

In the level determination circuit 1 configured as described above, when the circuit constant is selected, the negative temperature characteristic of V _BE3 of the transistor Q ₃ is completely compensated by the positive temperature characteristic of the voltage across the resistor R _3. . Therefore, even if the temperature around the IC or inside the IC package changes, the threshold voltage seen from the input terminal 1 does not change, and the level of the input signal can be accurately determined. In this embodiment, as shown in FIG.
When Q ₃ turns on, the bias circuit 2 operates and the bias voltage is obtained from the No. terminal.

Example-2 Next, a second example of the present invention will be described with reference to FIG. In this embodiment, the level judgment circuit 1 described above is applied to the enable circuit, which is shown as a circuit block 1 in FIG.

Enable signal CE is supplied to the pin 1, the voltage level of the threshold voltage 1.3V or more, that becomes high level, the transistor Q ₃ is turned on. Then, a base current is supplied to the transistor Q _4, which are turned on. As a result, V _CC power is supplied to the inverters 11, 12, and 13 via the second terminal and the transistor Q ₄ .

After the enable signal CE is supplied, the input signals V _A , V _B , and V _C are supplied to the third terminal, the fifth terminal, and the seventh terminal, respectively. At this time, the inverters 11, 12, and 13 are It is already ready for stable operation. Therefore, from the 4th terminal, 6th terminal and 8th terminal, the input signals V _A , V _B , V _C
Output signals V _X , V _Y , and V _Z corresponding to are obtained.

When the level determination circuit 1 is applied as the enable circuit as described above, the level determination of the enable signal CE is accurately performed over a wide temperature range because the threshold voltage 1.3V has no temperature characteristic. Therefore, even if, for example, an error occurs in the enable signal CE and the voltage drops to around the threshold voltage of 1.3 V, a malfunction that determines this as a low level does not occur.

On the other hand, the enable signal CE has a threshold voltage of 1.3V.
Below, that is, in the case of low level, the transistor Q ₃ is turned off. Therefore, no base current is supplied to the transistor Q _4, the transistor Q ₄ are turned off, the supply of + V _CC supply for the inverter 11, 12 and 13 is cut off.

What should be noted here is that not only the + V _CC power supply is not supplied inside the IC at this time, but the current consumption of the level determination circuit 1 is only the current I ₁ (100 μA). That is, the power consumption of the entire IC is small enough to be regarded as almost 0, and the power consumption reduction, which is one of the purposes of the present application, is achieved.

Further, the present invention has another effect. That is, FIG.
This is an effect based on the fact that the resistor R ₁ in FIG. 2 is composed of a pinch resistor. That is, the current I ₁ is kept almost constant even if the power supply voltage V _CC fluctuates. A device cross-sectional view of the pinch resistor R ₁ is shown in FIG. 3, in which the terminal P ₁ is connected to V _CC and the terminal P ₂ is connected to the collector of the transistor Q ₁ . Considering, for example, when V _CC becomes large, the PN junction composed of the n ⁺ type diffusion layer 3 and the P type diffusion layer 4 is further reverse biased, and the pinch resistance R ₁
Since the resistance value of V _CC increases, the fluctuation of V _CC will be compensated. Therefore, the current I ₁ is maintained at a substantially constant value regardless of V _CC , and as a result, the current density of the current flowing through the transistor Q ₁ does not change. Therefore, even if V _CC fluctuates, the threshold voltage of the level judgment circuit set to the above circuit constant does not fluctuate, and accurate level judgment operation can be performed.

[Embodiment 3] A third embodiment of the present invention will be described with reference to FIG.

The feature of this embodiment is that a threshold voltage adjusting pinch resistor R ₄ connected to the base of the transistor Q ₃ is provided. Therefore, the transistor seen from the 1st terminal by the control voltage supplied to the 5th terminal
The threshold voltage of Q ₃ can be set arbitrarily.

〔effect〕

(1) At the input terminal of the transistor to which the input signal is supplied,
By providing a temperature compensation circuit having a characteristic inverse to the temperature characteristic of the base-emitter voltage V _BE of this transistor, the temperature characteristic of V _BE of the transistor is canceled out, so that the threshold voltage with a temperature coefficient of zero is set. The effect of gaining is obtained.

(2) When the input signal is below the threshold voltage,
Since the transistor to which the input signal is supplied is in the non-operating state, the effect of reducing power consumption can be obtained.

(3) A level determination circuit that is hardly affected by fluctuations in the power supply voltage can be obtained.

(4) By adding the pinch resistor R ₄ , an effect that the threshold voltage having no temperature characteristic can be arbitrarily set is obtained.

[Field of application]

In the above description, the case where the invention made by the present inventor is mainly applied to the on / off of the bias voltage or the enable signal which is the field of application in the background has been described, but the invention is not limited thereto.

For example, it can be used for checking the electromotive force of a battery.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a first embodiment of a level judgment circuit to which the present invention is applied, and FIG. 2 is a circuit diagram of an enable circuit using the level judgment circuit of the present invention. FIG. 3 is a sectional view showing a structure of a pinch resistor formed in a semiconductor substrate, and FIG. 4 is a circuit diagram of a level judgment circuit and an enable circuit according to still another embodiment of the present invention. 1 ... Level determination circuit, Q ₁ , Q ₂ , Q ₃ , Q ₄ ... Transistor,
R ₁ , R ₂ , R ₃ ... resistance, I ₁ , I ₂ ... current, V _BE1 , V _BE2 . V _BE3 ...
Base-emitter voltage, 11, 12, 13 ... Inverter, CE ...
Enable signal.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (56) Reference JP-A-58-100531 (JP, A) JP-A-57-91008 (JP, A) JP-A-50-122185 (JP, A)

Claims (1)

[Claims] 1. A level judgment circuit having a level judgment input terminal and a level judgment transistor for turning on / off the operation of another circuit according to the level of an input signal supplied from this input terminal to a base / emitter. A first transistor (Q1) having a collector and a base connected together and an emitter connected to a reference potential, and a second transistor (Q2) having a base biased by a base-emitter voltage of the first transistor. ), A base of the second transistor (Q2) is biased by the collector of the second transistor (Q2), and a collector of the second transistor (Q2) is connected to another circuit, and a collector and a power supply potential of the first transistor (Q1). Is connected in series between the first resistor (R1) and a bias current (I1) flowing in the first transistor (Q1).
1) is connected in series between the emitter of the second transistor (Q2) and the reference potential, and the base-emitter voltage (VBE1) of the first transistor (Q1) and the second transistor (Q2) are connected in series. ) Base-emitter voltage (VBE2)
Second resistor (R2) for flowing a current (I2) corresponding to the difference (VBE1-VBE2) into the second transistor (Q2), the level determination input terminal and the collector of the second transistor (Q2). A third resistor (R3) connected in series between the first transistor (Q1) and the second transistor (Q2) having the same emitter area. The current density of Q1) is made larger than that of the second transistor (Q2), and
Due to the voltage drop (R3 · I2) generated in the third resistor (R3) by the current (I2) flowing in the transistor (Q2) of
By canceling the temperature dependence of the base-emitter voltage of the third transistor (Q3) viewed from the level determination input terminal and using the first resistor (R1) as a pinch resistor, The level determination circuit is characterized in that the bias current (I1) given to the transistor (Q1) of is maintained substantially constant with respect to the fluctuation of the power supply voltage (Vcc).