JPH0690671B2 - I / O device access method - Google Patents

Description

The present invention relates to an input / output device access method for a computer system that employs a direct storage access method, and an object of the present invention is to provide an input / output device access method capable of high-speed input / output processing. A physical I / O instruction is issued to the channel device in response to an I / O request, an interrupt from the channel device refers to the interrupt vector table, and control is passed to the interrupt processing routine of the relevant level, and the device management table is set in the interrupt processing routine. In the access method of the input / output device of the computer system which adopts the direct storage access method in which the interrupt processing unit is activated by reference, the interrupt processing unit currently executes the address of the interrupt processing routine of the corresponding level in the interrupt vector table. Channel device When the input / output processing is completed, the address of the corresponding level in the interrupt vector table is restored to the address of the original interrupt processing routine by the interrupt from the control section, and the input / output processing is completed.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an access method for an input / output device of a computer system that employs a direct storage access method.

When trying to use a computer system efficiently,
The problem is the imbalance between the operation time and the operation time of input / output devices such as floppy disks. The input / output operations are mechanically slow compared to the processing speed of the central processor unit (hereafter referred to as the CPU), which is extremely slow. As a result, if there is an input / output instruction during program execution, CP
Because U is idle, a system that uses a direct memory access method that is provided with a channel device that is functionally independent of the CPU is widely used. When the CPU instructs the channel device to start the I / O operation, other instructions are fetched and executed until there is an I / O completion interrupt from the channel device, so the CPU does not idle and efficient processing Can be done.

Also, in a real-time system such as a dispatch control system of firefighting equipment and a seat reservation system that immediately receives data that has occurred in a distant place and sends back the result, the request for response time (response time) is strict, There is a demand for more efficient and faster input / output processing such as processing after interruption from the channel device.

2. Description of the Related Art FIG. 2 shows a conventional method of accessing an input / output device of a computer system which employs a direct storage access method.

When the application program 10 uses the I / O device 12, the OS
An input / output request 18 is issued to the input / output execution unit 16 via the schedule management unit 14 that manages the schedule of each task (operating system). The I / O execution unit 16 checks the status of the I / O device 12 in response to the issued I / O request 18, and if the I / O device 12 is in use by another task, it holds it and is ready to use it. For example, the physical I / O command 20 is issued to the channel device 22 that controls the I / O device 12, and the I / O operation is started.

The channel device 22 transfers data between the input / output device and the main storage device in a predetermined unit (512,1024 in a floppy disk or the like).
When the transfer is completed, the interrupt signal 24 is sent to the CPU, and the address 28 of the interrupt processing routine 26 corresponding to each interrupt level is stored. Control is passed to the interrupt processing routine 26 of the relevant level by referring to the interrupt vector table 30 (arrow 32).

In the interrupt processing routine 26, the interrupt processing unit 34 is activated by referring to the device management table that stores the address of the interrupt register and the address of the interrupt processing unit for each input / output device or grouped input / output device. (Arrow 3
6). The interrupt processing unit 34 performs processing 37 for the interrupt such as clearing the interrupt register, checks whether the input / output for the input / output request 18 of the application program 10 is completed, and if it is completed, completes the input / output. The input / output execution unit 16 in the waiting state is notified of the completion (arrow 38). Next, control is returned to the interrupt processing routine 26 (arrow 40), and the interrupt processing routine 26 is returned to the schedule management unit 14 (arrow 42). The schedule management unit 14 checks the priorities of this input / output process and other tasks waiting to be executed, and if the priority of the input / output process is high, the control is passed again to the input / output execution unit 16.

The I / O execution unit 16 checks whether or not I / O completion has been notified, and if so, notifies the application program of completion (arrow 44). If I / O completion has not been notified, a physical I / O instruction is issued again. 20 is issued to the channel device 22, and the input / output request from the application program 10 is made through the same processing steps.
By repeating these processes until the input / output to / from 18 is completed, the input / output process is executed.

Problems to be Solved by the Invention However, in the access method of the input / output device of the computer system that adopts the conventional direct storage access method as described above, it takes time to perform the process in the interrupt processing routine such as the reference of the device management table, There was a problem that input / output processing was slow.

The present invention has been made in view of the above points,
It is an object of the invention to provide an access method for an input / output device capable of high-speed input / output processing.

Means for Solving the Problems FIG. 1 is a principle diagram of an access method of an input / output device of a computer system adopting the direct storage access method of the present invention.

When the application program 50 uses the I / O device 52,
The input / output request 58 is issued to the input / output execution unit 56 via the schedule management unit 54 that manages the schedule of each task. The I / O execution unit 56 checks the status of the I / O device 52 in response to the issued I / O request 58, and if the I / O device 52 is being used by another task, waits for this to be used. For example, the physical input / output instruction 60 is issued to the channel device 62 that controls the input / output device 52 to start the input / output operation.

The channel device 62 transfers data between the input / output device and the main storage device in a predetermined unit (512,1024 in a floppy disk or the like).
Bytes, etc. are transferred as 1 character in terminals or line printers, etc., and when the transfer is completed, the interrupt signal 64 is sent to the CPU.
To the interrupt processing routine 66 corresponding to each level of the interrupt and the address 68 of the interrupt processing routine 66 is stored, and control is passed to the interrupt processing routine 66 of the corresponding level (arrow 72). Interrupt processing routine 66
Then, the interrupt processing unit 74 corresponding to the input / output device is referenced by referring to the device management table in which the address of the interrupt register, the address of the interrupt processing unit, etc. are stored for each input / output device or for each grouped input / output device. Start (Arrow 7
6). In the interrupt processing unit 74, first, the interrupt vector table 7
Address 68 of interrupt processing routine 66 of the corresponding level of 0
To the start address of the interrupt processing unit 74 currently being executed (see 78), and processing for interrupts such as clearing the interrupt register (see 80) is completed, and the input / output processing for the input / output request 58 by the application program 50 is completed. If it is completed, the corresponding address 68 of the interrupt vector table 70 is restored to the original address of the interrupt processing routine 66 (see 82), and the I / O completion wait state is set. The input / output execution unit 56 is notified of the completion (arrow 84). Next, control is passed to the interrupt processing routine 66 (arrow 86), and the interrupt processing routine 66 returns to the schedule management unit 54 (arrow 88). The schedule management unit 54 checks the priorities of this input / output process and other tasks waiting to be executed, and if the priority of this input / output process is high, the control is passed again to the input / output execution unit 56.

The I / O execution unit 56 checks whether or not the I / O completion is notified, and if so, notifies the application program 50 of the completion (arrow 90). If the I / O completion is not notified, the physical I / O is again performed. Issue instruction 60 to channel device 62.

When the channel device 62 sends the interrupt signal 64 to the CPU and refers to the interrupt vector table 70, the address of the relevant level is rewritten to the start address of the interrupt processing unit 74 executed immediately before, so control is given to the interrupt processing unit 74. Passed (arrow 92). Thereafter, similar processing is repeated until the input / output processing for the input / output request 58 from the application program 50 is completed and the input / output processing is performed, thereby achieving the speedup of the input / output processing.

Effect According to the present invention, the processing is performed by the input / output request of the application program, and the interrupt processing unit rewrites the address of the corresponding level of the interrupt vector table to the start address of the interrupt processing unit currently being executed, and when the input / output is completed. Since the address is returned to the original interrupt processing routine address, the physical I / O instruction is issued by the I / O execution unit during the second and subsequent processing.
After the predetermined processing is completed in the channel device, when the control is passed by referring to the interrupt vector table, the control is directly passed to the interrupt processing unit without passing through the interrupt processing routine. Therefore, the device management table executed in the interrupt processing routine Can be omitted, and the speed of input / output processing can be improved.

EFFECTS OF THE INVENTION Since the present invention is configured as described above in detail, there is an effect that a part of the input / output processing can be skipped and the input / output processing can be speeded up.

[Brief description of drawings]

 FIG. 1 is an explanatory diagram of the principle of the present invention, and FIG. 2 is an explanatory diagram of a conventional technique. 10, 50 …… Application program, 12, 52 …… I / O device, 14, 54 …… Schedule management unit, 16, 56 …… I / O execution unit, 22, 62 …… Channel device, 26, 66 …… Interrupt Processing routine, 30, 70 ... Interrupt vector table, 34, 74 ... Interrupt processing unit.

Claims (1)

[Claims] 1. An input / output request (58) from an application program (50) issues a physical input / output instruction (60) to a channel device (62) in an input / output execution part (56), and the channel device (62). From the interrupt vector table (70), the control is passed to the interrupt processing routine (66) of the corresponding level, and the interrupt processing routine (66) refers to the device management table and the interrupt processing unit In an access method of an input / output device of a computer system that employs a direct storage access method in which (74) is activated, an interrupt processing routine (66) of a corresponding level of an interrupt vector table (70) in an interrupt processing unit (74). Address of
The interrupt processing unit (74) is rewritten to the start address of the interrupt processing unit (74) that is currently being executed, and the interrupt (64) from the channel device (62) bypasses the interrupt processing routine (66).
Control is passed directly to the interrupt vector table (70) when the I / O processing is completed.
The interrupt handling routine (6
A method for accessing an input / output device, which is characterized by restoring to the address of 6).