JPH0690220A - Receiver for spread spectrum communication - Google Patents

Abstract

PURPOSE:To suppress the deterioration in characteristic caused by the breakdown of orthogonality of a Walsh orthogonal code due to selective fading in a receiver for spread spectrum communication of direct diffusion system. CONSTITUTION:Reception data is supplied to a searcher receiver 5 and digital data receivers 6, 7. The digital data receivers 6, 7 demodulate the data by multiplying it by a PN code and a Walsh code. An interference calculation circuit 100 calculates interference quantity due to the breakdown of orthogonality of the Walsh code by the selective fading, and supplies it to viterbi processors 102, 104. The viterbi processors 102, 104 demodulate the data by eliminating the interference quantity of a delay wave included in a preceding wave and that of the preceding wave included in the delay wave by viterbi algorithm, and supplying them to a diversity circuit 9.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a spread spectrum communication receiver, and more particularly to improving the deterioration of transmission characteristics due to orthogonal collapse due to multipath fading of orthogonal codes used for channel identification or transmission data identification.

[0002]

2. Description of the Related Art A spread spectrum communication system of direct spread (DS) system (hereinafter referred to as SS system) has advantages such as resistance to interference and resistance to interference, and small capacity communication using a satellite line and It is mentioned as one of communication systems for mobile communication such as car telephones. Figure 10 shows USP
A schematic configuration of a mobile receiver of a CDMA cellular telephone system disclosed in US Pat. No. 5,103,459 is shown. On the side of the cell site (base station), the transmission data is multiplied by an orthogonal function (Walsh code) with a sequence length of 64 chips for user identification, and 1 data is multiplied by 1 sequence. _{The I} and Q channel spreading codes PN _Q are multiplied, and the respective multiplication results are phase-modulated by the in-phase axis carrier and the quadrature axis carrier and transmitted. Here, PN _I and PN _Q are both PN codes having a sequence length of 32768, and one data is multiplied by 64 chips. That is, the number of data transmitted in one PN sequence period is 51.
There are 2 data. The chip rates of the PN code and the Walsh code are the same. Further, PN _I and PN _Q have a spread spectrum function, and the Walsh code is used for channel identification of each user. This mobile device C
The DMA telephone system includes an antenna 1 and is connected to an analog receiver 3 and a power amplifier 4 via a diplexer 2. The antenna 1 receives the SS signal from the base station (cell site) and supplies the reception signal to the analog receiver 3 via the diplexer 2. The analog receiver 3 includes a down converter, converts the supplied reception signal into an IF signal, and further converts it into a digital signal with an A / D converter. IF converted to digital signal
Signals are searcher receiver 5, digital receivers 6, 7
Is supplied to.

When the SS signal reaches the receiving device (mounted on the mobile device) through a plurality of paths, a difference occurs in the reception time of each signal. The digital data receivers 6 and 7 can select which path signal is to be tracked and received. With two data receivers, as shown in FIG. 10, two separate paths would be tracked in parallel.

On the other hand, based on the control signal from the control processor 8, the searcher receiver 5 scans the time domain near the reference time of the received pilot signal in order to detect the multipath pilot signal of the same cell site.
Then, the searcher receiver 5 compares the intensities of the received signals with each other and outputs the intensity signal to the control processor 8 to instruct the strongest signal.

Then, the control processor 8 supplies a control signal to the digital data receivers 6 and 7 to cause the respective receivers to process different strongest signals.

The digital data receivers 6 and 7 include PN generators, and PNs for I channel and Q channel.
Codes PN _I, the PN _Q occurs. The timing of generation and the sequence control signal are supplied from the control processor 8. The digital data receivers 6 and 7 are Wal.
It also includes an sh generator, and generates a pre-allocated Walsh code based on the timing signal and the selection signal from the control processor 8. Then, the above P
N _I, PN _Q and Walsh codes are supplied to the EX-OR gate, is multiplied PN _I ', PN _Q' becomes.

These PN _I ′ and PN _Q ′ are supplied to the correlator and the I channel supplied from the analog receiver 3,
The correlation with the received signal of the Q channel is calculated and output to the accumulator. The accumulator accumulates the input signal for one symbol or 64 chips and outputs it to the phase rotator. A pilot phase signal is also supplied from the control processor 8. The phase of the received symbol is rotated corresponding to the phase of the pilot signal determined by the searcher receiver 5 and the control processor 8, and the output from the phase rotator is the diversity and decoder circuit 9
Is supplied to and added.

On the other hand, a communication method from a mobile station to a cell site (base station) is efficient by transmitting a 64-base orthogonal signal by a Walsh code according to transmission data in addition to a spread code such as a PN code. Information transmission. Therefore, at the cell site, when demodulating data, P
In addition to the N code, the Walsh code is also solved to determine which Walsh code was transmitted, and demodulates the transmission data.

The conventional receiver for a mobile device has the above-mentioned configuration, and the principle of demodulation in the digital data receivers 6 and 7 will be described in more detail below. Note that here, the data is multiplied by a Walsh code with a sequence length of 8 to obtain a sequence length of 1
A case where 6 PN codes are multiplied by 8 chips for 1 data will be described. However, the Walsh code and the PN code have the same purpose as the above-mentioned conventional example.

FIG. 11 shows an example of a PN code, data, and a Walsh code assigned to each channel. In FIG. 11, eight chips form one symbol, and the BPSK data is at the Hi level (or +1),
It takes one of the Low level (-1). Note that FIG.
In FIG. 1, for convenience, the Hi level (+1) is described as 1, and the Low level (−1) is described as 0. The same PN code is used in all channels, for example, the code 11110101 is used in one symbol. on the other hand,
Each channel has one Walsh selected from W _{0 to} W _7.
A code is assigned. Here, each Walsh code forms an orthogonal sequence, and when the timings match, ΣW _i , _k · W _j , _k = 8 (i = j) = 0 (i ≠ j). Here, W _i , _k is the _k-th Walsh code number i
Shows the tip. For example, as can be seen from FIG. 11, W ₂ , _k
If (K = 1, 8) is listed, it is (11001100).

In each channel, the data is multiplied by the PN code and the Walsh code and transmitted from the cell site.
That is, the transmission signal at time k of channel i is d _i
PN _k W _i , _k , and the transmission signal of one symbol of channel i is Σd _i PN _k W _i , _k · rect (t−kT _c ).
Becomes Note that T _c is the chip timing, di is the transmission data, and PN _k is the chip number of the PN code to be multiplied by d _i .

[0012] In this way, P is added to the data d from the cell site.
Since the N code and the Walsh code are transmitted in a multiplied form, the digital data receiver of the receiving apparatus can demodulate the data by multiplying the received signal by PN _i and further correlating it with W _j. . That is, when the demodulation operation is performed at the same timing, Σd _i PN _k W _i , _k · PN _k W _j , _k = d _i ΣW _i , _k · W _j , _k = 8 d _i (i = j) = 0 ( i ≠ j).

[0013]

As described above, although data can be accurately demodulated at the same timing, as described above, the receiving apparatus receives signals through a plurality of paths due to multipath fading. In order to arrive, there will be a preceding wave or a delayed wave in each data receiver. Since the preceding wave and the delayed wave have different signal timings from each other, a component other than the signal timing at the time of data demodulation becomes an interference component, which is one of the causes of signal deterioration.

FIG. 12 shows the received signal at the time of data demodulation, PN.
The relationship between the code and the Walsh code is shown. Here, it is assumed that the Walsh code, W _1, is assigned to this receiving device. As a result of multiplication by the PN code and the Walsh code, when the cell site sends an SS signal (00111010) as shown in FIG. In this case, a delayed signal (E) delayed by 2 chips will also be received. Data demodulation is performed by multiplying and adding the PN code and the Walsh code W ₁ at the same timing (timing of the signal shown in (D)) as described above, and the desired signal is the signal (D). It will be obtained by multiplying (F) ((1 + 1 +
1 + 1 + 1 + 1 + 1 + 1) = 8).

However, since the 2-chip delay signal shown in (E) exists, a signal obtained by multiplying and adding the signal (E) and the signal (F) in addition to the desired signal ((1+
1-1-1 + 1-1 + 1 + 1) = 2) is also included, and this delayed signal component becomes an interference signal and deteriorates the signal quality.

The problem described above is a problem that occurs because the orthogonality of the Walsh code is established only when products are multiplied and added at the data timing point, and the orthogonality is not established for the delayed wave. Therefore, the same problem occurs in the receiving device at the cell site. That is, on the cell site side, the Walsh code is used for identifying transmission information, but when data demodulation is performed at the timing of the preceding wave, orthogonality is not established for the delayed wave, resulting in interference. This will deteriorate the transmission characteristics of the signal.

The present invention has been made in view of the above problems of the prior art, and its object is an orthogonal code (Walsh code) used for channel identification or data identification.
Is to provide a receiving apparatus for spread spectrum communication capable of effectively suppressing characteristic deterioration caused by orthogonal collapse due to multipath fading.

[0018]

In order to achieve the above object, a spread spectrum communication receiver according to claim 1 is provided with:
The signal transmitted from the base station, which has been spread spectrum by the direct spreading method by the pseudo noise code and has orthogonality for each channel by the Walsh code, is demodulated by a plurality of data demodulation circuits, and the signal from each data demodulation circuit In a spread spectrum communication receiver for diversity combining,
From the signal demodulated by the data demodulation circuit using the Viterbi algorithm, the interference amount calculation means for calculating the amount of interference between the Walsh code at the data demodulation timing of each of the data demodulation circuits and the Walsh code at the timing of the preceding wave or the delayed wave. And a processing unit for removing the interference amount.

Further, in order to achieve the above object, the spread spectrum communication receiver according to the second aspect spreads the spectrum by a direct spread method with a pseudo noise code, and further, W
In a spread spectrum communication receiving device for demodulating a signal transmitted from a base station with orthogonality for each channel by an Alsh code in a plurality of data demodulation circuits and performing diversity combining of the signals from each data demodulation circuit, Walsh at the data demodulation timing of each data demodulation circuit
Wal at the timing of the sign and the preceding wave or the delayed wave
It is characterized by comprising an interference amount calculating means for calculating the interference amount by the sh code and a processing means for removing the interference amount from the diversity combined signal using a Viterbi algorithm.

Further, in order to achieve the above object, the spread spectrum communication receiver according to claim 3 is spread spectrum by a direct spread method with a pseudo noise code, and is further multiplied by a Walsh code according to transmission data. Demodulate the signal transmitted from the mobile station with multiple data demodulation circuits,
In a spread spectrum communication receiver that diversity-combines signals from each data demodulation circuit, interference amount calculation means for calculating the amount of interference between Walsh codes at data demodulation timing in each data demodulation circuit and demodulated by the data demodulation circuit. And a processing means for removing the interference amount from the received signal.

[0021]

In the case of a so-called forward link in which a signal is supplied from the cell site to the mobile station, as described above, the cell site transmits a data-modulated signal and a pilot signal that is not data-modulated. .
Then, the pilot signal is synchronized to demodulate the data, but under the above-mentioned selective fading (fading in which a delayed wave exists), when the data demodulation is performed at the timing of the direct wave, the delayed wave becomes an interference component, Conversely, when data demodulation is performed at the timing of the delayed wave, the preceding wave becomes the interference component.

Therefore, the interference of the delayed wave with respect to the preceding wave or the interference of the preceding wave with respect to the delayed wave is calculated from the time difference between the preceding wave and the delayed wave, the amplitude ratio, and the carrier phase difference, and the reception candidate sequence is calculated from this interference amount. . Then, the square of the difference between the reception candidate sequence and the reception symbol data is used as a branch metric to apply the Viterbi algorithm, and the transmission data is demodulated from the surviving path to effectively suppress the influence of interference and improve the signal quality. .

In the case of a so-called reverse link in which a signal is supplied from a mobile station to a cell site, a plurality of (for example, 64) Walsh function sequences are Walsh function sequences.
Since it changes for each code period, it is difficult to calculate the reception candidate sequence as described above. Therefore, the interference amount of only the data timing of interest is calculated, and the same Wals
Signal quality is improved by removing interference between h codes.

[0024]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A preferred embodiment of an SS communication receiving apparatus according to the present invention will be described below with reference to the drawings.

First Embodiment FIG. 1 is a block diagram showing the arrangement of a receiving apparatus according to this embodiment. Similar to FIG. 10, the antenna 1 receives a signal and supplies the received signal to the analog receiver 3 via the diplexer 2. The analog receiver 3 receives the received signal through a digital IF.
It is converted into a signal and supplied to the searcher receiver 5 and the digital data receivers 6 and 7. In the digital receivers 6 and 7, as described above, the PN code and the W assigned to the own station are used.
The ash code is multiplied and added over the data timing interval, and the addition result is output as a demodulation symbol. Then, the demodulated symbols are supplied to the control processor 8 and the Viterbi processors 102 and 104. Here, according to the control signal from the control processor 8, the data receiver 6 performs symbol demodulation at the timing of the preceding wave, and the digital data receiver 7 performs the symbol demodulation at the timing of the delayed wave.

As described above, the control processor 8 supplies the control signals to the digital data receiver 6 and the digital data receiver 7 to perform symbol demodulation at predetermined timings. In this embodiment, the interference amount is further calculated. A parameter (amplitude ratio, carrier phase difference, delay time difference) indicating a relative relationship between the preceding wave and the delayed wave, a spread signal used for communication, and a Walsh code are output to the circuit 100. Interference amount calculation circuit 100
Is, for example, a DSP (digital signal processor) or C
It is composed of PU and the like. The operation will be described below using mathematical expressions and flowcharts. Here, Wal
The code length of the sh code is 64 and the code length of the PN code is 3276.
In 8 the Walsh code corresponds to one cycle (6
4 chips), PN code is 64 chips, data modulation, W
BPSK for both multiplication and spread of alsh code
Although the case of (2-layer PSK) modulation is shown, even if one of the modulation schemes is a modulation scheme such as QPSK (4-layer PSK), Wals having different code lengths is used.
Even when the h code and the PN code are used, the interference amount can be calculated in the same manner.

It is assumed that the i-th transmission data is d _i and the j-th chip of the i-th Walsh code is W _i , _j . In the case of the forward link, the Walsh code is fixed during communication regardless of the number i. In addition, if the amplitude ratio of the amplitude ratio of the preceding wave and the delayed wave is ρ, the carrier phase difference is φ, and the delay time difference is ΔT + δ (where T is the chip interval,
δ <T), the received signal r _i (t) for the i-th data seen at the timing of the preceding wave is

[Equation 1] Becomes Where rect _c (t) is 1 when 0 ≦ t ≦ T,
In other cases, it is a function that becomes 0, and rect _s (t)
Is a function that becomes 1 when 0 ≦ t ≦ 64T and 0 otherwise. Also, j is mod [32768, {mod (51
2, i) +1}]. Here, mod indicates a modulo function. This received signal r is received by the digital data receiver 6.
_{When i} (t) and the PN code are multiplied at the timing of the preceding wave,

[Equation 2] Becomes Further, if the assigned Walsh function W _i is multiplied and the result is added over the data timing interval, the symbol f (t) other than the noise is

[Equation 3] Becomes In the equation, the first term is the desired signal component relating to the transmission data i, the second and third terms are the interference components due to the delayed wave, and the second term is the PN code multiplied by d _i-1 of the delayed wave, W
The interference component due to the Alsh code, the third term is d of the delayed wave.
It is an interference component resulting from the PN code and the Walsh code multiplied by _i . Here, in the second and third terms, from the information (delay time difference, signal strength) given from the searcher receiver to the control processor, and the information (signal strength, carrier phase difference) given from each data receiver to the control processor, etc. , The relative parameters (ρ, φ, Δ, δ) regarding the preceding wave and the delayed wave are easily estimated by the control processor, and the Walsh code and the PN code are known, so that d _i in the second term, d _i-
If ₁ is known, f (t) excluding noise can be completely known. That is, in the interference amount calculation circuit, the part of the second term excluding d _i and d _i-1 is individually calculated in the second and third terms and output to the Viterbi processor 102.

Similarly, the digital data receiver 7
When the demodulation is performed at the timing of the delayed wave, the demodulation output (demodulation symbol) other than noise of the digital data receiver 7
g (t) is

[Equation 4] Becomes In the equation, the first term is the desired signal component relating to the transmission data d _i , the second and third terms are the interference components due to the preceding wave, and the second term is the PN code multiplied by d _{i + 1} of the preceding wave. ,
The interference component due to the Walsh code, the third term is the PN code multiplied by d _i of the preceding wave, and the interference component due to the Walsh code. Similar to the case of the digital data receiver that demodulates at the timing of the preceding wave, the relative parameters regarding the preceding wave and the delayed wave are given from the control processor, and the spread code and the Walsh code are also known. In the circuit, the second term d _i , d
_The part excluding _{i + 1} is calculated separately in the first half and the second half, and is output to the Viterbi processor 104.

The Viterbi processor 102 uses the parameters relating to the interference amount obtained by the interference amount calculation circuit to calculate d _i ,
A candidate signal sequence is generated by assuming d _i−1 , and the signal sequence is determined with maximum likelihood while comparing this with the demodulated symbol given from the digital data receiver. That is, the Viterbi algorithm is applied with the square of the difference between the demodulated symbol and the candidate sequence as a branch metric, and the transmission data is demodulated from the final survivor path, thereby effectively removing the influence of interference and the result of the diversity circuit. Output to 9.

The Viterbi processor 104 performs the same operation.

The operations of the Viterbi processors 102 and 104 will be described below in detail with reference to the flowcharts.

As is well known, the Viterbi algorithm is an algorithm for performing decoding by omitting redundant calculation as much as possible by obtaining a path having a minimum metric for each state at each time point. The basic operation of this Viterbi decoding is composed of the following three steps.

[0033] (1) point in time from each state S _i at the time t _i t
Compute branch metrics for all branches of _{i + 1} to state S _j .

(2) Time t _i for all branches
Add the metric of the surviving path of the state S _i and the branch metric described above.

(3) For each state S _j at time t _{i + 1} , the sums obtained in (2) are compared with respect to all the paths of S _j , and the pair of the surviving path and the branch that gives the minimum value is obtained. , The path connecting the survival path and the branch is the survival path of S _j .

If this basic operation is performed at each time point starting from time 0, one path with the smallest metric leading to each state will survive at any time point. Hereinafter, the Viterbi algorithm in this embodiment will be specifically described with reference to the flowcharts of FIGS. In FIG. 3, first, i = 1 is set, r ₁ is received by the digital data receiver 6 (S101), and branch metrics μ ₀ (1) and μ ₀ (0) are calculated (S10).
2). The branch metrics μ ₀ (1) and μ ₀ (0) are

[Equation 5]

[Equation 6] Calculated by After the branch metric is obtained,
Using this branch metric, the path metric J
₀ (1) and J ₀ (0) are calculated (S103). In this case, the path metric becomes equal to the branch metric obtained in S102.

Next, i is incremented by 1 (S1
04), similarly, the signal r _i is received and the branch metric μ and the path metric j are sequentially calculated (S105, S1).
06). The branch metric μ is

[Equation 7] Calculated by Here, I _i-1 corresponds to d _i-1 and I _i corresponds to d _i . Then, the path metrics j _1,1 and j _0,1 are compared, and if j _1,1 is smaller, then j _1,1 is selected as the _surviving path, and if not, j _0,1
Is selected (S107). Next, j _1,0 and j _0,0 are compared, and if j _1,0 is smaller, j is set as the surviving path.
_{If 1,0} is selected, otherwise, j _0,0 is selected (S110). Then, the selected survivor paths are stored in the path metrics J _i-1 (0) and J _{i- 1} (1) (S108 to S109, S111 to S11).
2).

By performing such an operation up to the final number N, the path metrics J _N-1 (0) and J _N-1 (1) are compared in size (S114). If J _N-1 (0) is smaller, this J _N-1 (0) path becomes the final path (S11
5), otherwise, the path of J _{N- 1} (1) is the final path (S116). The point corresponding to the node of the path thus determined is the demodulated data, and the demodulated data can be supplied to the diversity circuit 9 to perform accurate data demodulation.

Note that FIG. 2 conceptually shows the operation of FIGS. 3 and 4 using a trellis diagram. 2A shows the initial stage, and FIG. 2B shows the stage at an arbitrary time. In the figure, each node shows the state at each time,
The upper part shows the state (data) 1 and the lower part shows the state (data) 0. The left, center, and right points in the figure (B) indicate the times corresponding to the i-2, i-1, and i demodulated symbols, respectively. A transition from a node to a node is a branch, and the certainty of the transition is a branch metric μ. A continuous branch from the initial state to a certain node is a path, and the certainty of the path from the initial state to a certain node is given by the sum of the corresponding branch metrics, which is the path metric J. In this embodiment, consecutive transmission data are independent of each other, and from the equation 1, one demodulation symbol is affected by the same symbol and the symbol preceding by one in the delayed wave. Becomes That is, it is necessary to perform processing by assuming four transitions from state 1 to state 1, state 1 to state 0, state 0 to state 1, and state 0 to state 0 each time the demodulated symbol is given from the data receiver. is there. J _j-1 (1) and J _i-1 (0) represent the probabilities that the i-th data is 1,0 respectively from the initial stage. Further, the calculation of the _i− 1th path metric J _i−1 is completed when the i−1th demodulated symbol is received. Now consider the processing when the i-th demodulated symbol is received. When the i-th demodulated symbol is received, the (i-1, i) -th data is (1, 1), (0, 1), (1, 0), using the result from the interference amount calculator.
Likelihood of (0,0), that is, branch metrics μ _i (1,1), μ _i (0,1), μ _i (1,0),
μ _i (0,0) can be calculated. The i-th data is 1 because the (i-1, i) -th data is (1, 1),
Since it is either (0, 1), which is more likely is calculated. Probability J _i-1 (1), J _i-1 that the data up to the i-1th is 1,0 respectively
The (i-1, i) th data is (1, 1) in (0),
Probability of transition like (0,1) μ _i (1,
1), μ _i (0, 1) respectively added value J _1,1 , J _0,
1 may be compared Which is more probable. Then, the more probable one is left as the surviving path, and the corresponding path metric is J _i-1 (1). The same applies to J _i-1 (0). If J _1,1 is selected, it is determined that 1 is sent to the i−1th data if the i−2nd data is 1 in the case of FIG. After that, such an operation is repeated, and when the final data is sent, J _i-1 (0) and J _i-1 (1) are compared to determine one final surviving path. . When the path is determined, the state that the path has passed is output as demodulation data.

The above is the operation of the Viterbi processor 102 that processes the signal from the digital data receiver 6 using the Viterbi algorithm. The demodulated symbol from the digital data receiver 7 that demodulates data at the timing of the delayed wave is processed by the Viterbi algorithm. The operation of the Viterbi processor 104 for processing is similar to that of the Viterbi processor 102, and operation flowcharts are shown in FIGS. 5 and 6. The difference from the Viterbi processor 102 described above is that
Branch metric ν

[Equation 8]

[Equation 9]

[Equation 10] The branch metric ν is used to calculate the path metric K (S201 to S21).
7).

The outputs of the Viterbi processors 102 and 104 thus obtained are combined in the diversity combining circuit to further improve the reception characteristics. The diversity combining method is basically selective combining because the data is demodulated at the output of the Viterbi processor.
The method of selective synthesis is to select the output with the larger received power supplied from the searcher receiver, or to select the Viterbi processor output that is more probable based on the final metric, or for each data at each time point. There is a method of comparing the metrics of and selecting according to the magnitude of the metric at each time point. For the last method,
The Viterbi processor output is selected for each data unit. Further, a method of selecting by multiplying the metric by the received power given from the searcher receiver may be adopted.

Although not shown in this embodiment, there is also a method of outputting fixed data each time it is fixed during the calculation of the bus metric in order to reduce the decoding delay due to the Viterbi algorithm. By using such a method, it is possible to reduce the decoding delay. Also,
In this case, since the times determined by the two Viterbi processors do not necessarily match, it is possible to provide a decoding synchronization circuit and perform the diversity selection processing from the data determined by both Viterbi processors.

The Viterbi algorithm is described in detail, for example, in "Hideki Imai," Code Theory ", edited by The Institute of Electronics, Information and Communication Engineers, Corona Publishing Co., Chapter 12".

In the embodiment described above, the signals from the digital data receivers 6 and 7 are input to the Viterbi processor 1.
02, 104, and further to the diversity circuit 9 for data demodulation, the signals from the digital data receivers 6 and 7 are directly supplied to the diversity circuit 9 as in the conventional case, and both signals are combined. After that, the data may be supplied to the Viterbi processor to perform data demodulation that effectively removes the influence of interference. FIG. 7 is a block diagram showing the configuration when such a demodulation method is used. The Viterbi processor 106 is provided in the latter stage of the diversity circuit 9,
The signals added by the diversity circuit 9 are supplied.
The interference amount calculation circuit 100 collectively supplies the parameters obtained from the equations 3 and 4 to the Viterbi processor 108. FIG. 8 shows an operation flowchart of the Viterbi processor 106.
Similarly to 2, 104, the branch metric and the path metric are sequentially calculated, the path is selected, and the final path is determined (S301 to S310).

The branch metric in this case is
For example, using Equation 6 and Equation 9, h ₀ (i, d _i ) = f ₀ (i, d _i ) + g ₀ (i, d _i ) h ₁ (i, d _i−1 ) = f ₁ ( i, d _i-1 ) + g ₁ (i, d _{i + 1} ) h ₂ (i, d _i ) = f ₂ (i, d _i ) + g ₂ (i, d _i ) h (i, d _{i + 1} , D _j , d _{i + 1} ) = f (i, d _i−1 , d _i ) + g ₁ (i, d _i , d _{i + 1} ), a candidate sequence is created from the addition of each. , And the square of the difference between this and the demodulated symbol after diversity combining. However, in this case, since the branch metric is 3 symbols before and after, it is necessary to note that the number of states is 4.

In the above-described embodiments, only two waves, the preceding wave and the delayed wave, are shown as the received waves by the multipath. However, even when there are three or more received waves,
The influence can be effectively removed by calculating the interference amount by a similar method and applying the Viterbi algorithm.

Also, based on the signal strength given from the surface-receiver, the signal having the highest strength out of three or more is used.
If the receiving apparatus according to the present invention is used for one received wave, the influence of interference can be effectively reduced.

Second Embodiment In the above-described first embodiment, the case where the signal is transmitted from the cell site to the mobile station and the SS signal is received on the mobile station side is shown. The process of detecting and removing the influence of the interference amount and performing accurate data demodulation can be applied to the case where a signal is sent from the mobile station to the cell site and the data is demodulated on the cell site side. However, in this case, there are 64 types of Wal on the receiving side of the cell site.
Since the sh function changes for each data timing, enormous calculation (64 × 64 branch metrics) is required to calculate a continuous reception candidate sequence of two symbols, which is not practical. Therefore, when receiving on the cell site side, the interference amount of only the Walsh symbol at the timing is calculated without considering the Walsh symbols before and after,
Data determination may be performed after reducing only the amount of interference between the same Walsh symbols in advance. In this case, when the delay time is smaller than the Walsh symbol time length, most of the interference amount is affected by the overlapped portion of the same symbol, so the removal effect is large. Further, in the case of performing diversity, mutual interference between the same symbols is removed, and interference due to the remaining front and rear symbols is randomly added, so that a further effect can be expected. FIG. 9 shows a schematic configuration of the receiving device on the cell site side. A digital SS signal (converted to a baseband by the analog receiver) from an antenna and an analog receiver (not shown) is multiplied by the PN code in the multiplier 200 and then supplied to the FHT unit 202. FHT device 20
In 2, fast Hadamard transform is performed and a signal for each Walsh code is output. And these output signals are
It is supplied to the maximum value detector 204 to detect the maximum value and further supplied to the diversity circuit. In this embodiment, when the signal is supplied to the maximum value detector 204, the interference amount removing circuit 203 causes the interference amount. Is reduced in advance and supplied. Here, the interference amount removing circuit 203 includes an adder / subtractor for each Walsh correlation signal, and removes the interference amount calculated by the interference amount calculating circuit 206 from the output of the FHT unit 202. Further, the interference amount removing circuit is provided with relative parameters of the two received waves from the processor.

Below, the received signal r is received by the interference amount calculation circuit 206.
A method of calculating the interference amount from (t) will be described in the case where the Walsh code length is 64 and the chip rates of the Walsh code and the PN code are equal. Note that, here, a case where synchronous detection is performed will be described.

In the reverse link, since the Walsh code corresponds to the information data, there is no d _i , and W
_{For i, j} , different Walsh codes are transmitted depending on i. First, consider the case where demodulation is performed at the data timing of the preceding wave. The i-th Wal seen at the timing of the preceding wave
The received signal r _i (t) for the sh symbol is

[Equation 11] If the PN code is multiplied by the multiplier 200,

[Equation 12] Becomes Therefore, when FHT is performed by the FHT unit 202, the output corresponding to each Walsh function is

[Equation 13] Becomes Here, W _{ref, n} (ref = 1 to 64) is a 64 Walsh function prepared on the receiving side, and ref is W
This is the ash function number.

Here, the first term on the right side of the above equation is the desired component, and this desired component desired

[Equation 14] Becomes That is, the FHT corresponding to the transmitted Walsh symbol
The desired signal component exists only in the output port of. Right side second
The term and the third term are terms representing interference, and the interference component undesire at the FHT output port from which the desired signal is output.
d is

[Equation 15] Becomes Of the interference components undesired, the term representing the mutual interference of the Walsh codes W _{i of} interest to this embodiment is the third term. Therefore, this interference amount can be calculated using the amplitude ratio ρ of the preceding wave and the delayed wave and the carrier phase difference φ detected by the searcher receiver, and this interference amount may be supplied to the interference amount removing circuit 203.

Next, when demodulating at the data timing of the delayed wave, the i-th Wals seen at the timing of the delayed wave
The received signal r _i (t) for h symbols is

[Equation 16] Therefore, when multiplied by the PN code,

[Equation 17] Becomes Then, as in the case of performing demodulation at the data timing of the preceding wave, when the FHT unit 202 performs FHT, a desired signal component is output FHT (Walsh)
(Corresponding to function i) The output g (t) of the output port is

[Equation 18] Becomes The first term on the right side of the above equation is the desired component desired, and the second and third terms on the right side are interference components undesired.
d. Then, the second term of the interference component undesired is the Walsh code W _{i of} interest in this embodiment.
This is a term indicating mutual interference, and the amplitude ratio ρ and carrier phase difference φ
This interference amount can be calculated using, and is supplied to the interference amount removing circuit 203 to remove the interference amount from the data demodulation signal.

As described above, in the present invention, it is possible to effectively suppress the deterioration of transmission quality by effectively removing the interference component under the selective fading situation.

[0054]

As described above, the receiving apparatus for spread spectrum communication according to the present invention effectively suppresses characteristic deterioration caused by orthogonal collapse due to selective fading of Walsh orthogonal code. Is possible.

[Brief description of drawings]

FIG. 1 is a configuration block diagram of a receiving device according to an embodiment of the present invention.

FIG. 2 is an explanatory diagram of a Viterbi algorithm according to the same embodiment.

FIG. 3 is an operation flowchart of the Viterbi processor in the embodiment.

FIG. 4 is an operation flowchart of the Viterbi processor in the embodiment.

FIG. 5 is an operation flowchart of the Viterbi processor in the embodiment.

FIG. 6 is an operation flowchart of the Viterbi processor in the embodiment.

FIG. 7 is a configuration block diagram of a receiving device according to another embodiment of the present invention.

FIG. 8 is an operation flowchart of the Viterbi processor in the embodiment.

FIG. 9 is a configuration block diagram of a receiver in another embodiment (reverse link) of the present invention.

FIG. 10 is a configuration block diagram of a conventional receiving device.

FIG. 11 is an explanatory diagram of the principle of data demodulation.

FIG. 12 is an explanatory diagram of the principle of data demodulation.

[Explanation of symbols]

 1 Antenna 5 Searcher Receiver 6, 7 Digital Data Receiver 8 Control Processor 100 Interference Calculator 102, 104 Viterbi Processor

[Procedure amendment]

[Submission date] September 8, 1993

[Procedure Amendment 1]

[Document name to be amended] Statement

[Correction target item name] 0012

[Correction method] Change

[Correction content]

[0012] In this way, P is added to the data d from the cell site.
Since the N code and the Walsh code are transmitted in a multiplied form, the digital data receiver of the receiving apparatus can demodulate the data by multiplying the received signal by PN _k and by correlating with W _j. . That is, when the demodulation operation is performed at the same timing, Σd _i PN _k W _i , _k · PN _k W _j , _k = d _i ΣW _i , _k · W _j , _k = 8 d _i (i = j) = 0 ( i ≠ j).

[Procedure Amendment 2]

[Document name to be amended] Statement

[Name of item to be corrected] 0027

[Correction method] Change

[Correction content]

It is assumed that the i-th transmission data is d _i and the j-th chip of the i-th Walsh code is W _i , _j . In the case of the forward link, the Walsh code is fixed during communication regardless of the number i. In addition, if the amplitude ratio of the amplitude ratio of the preceding wave and the delayed wave is represented by ρ, the carrier phase difference is represented by φ, and the delay time difference is represented by ΔT + δ (where T is the chip interval,
δ <T), the received signal r _i (t) for the i-th data seen at the timing of the preceding wave is

[Equation 1] Becomes Where rect _c (t) is 1 when 0 ≦ t ≦ T,
In other cases, it is a function that becomes 0, and rect _s (t)
Is a function that becomes 1 when 0 ≦ t ≦ 64T and 0 otherwise. Also, j is mod [32768, {mod (51
2, i) +1}]. Here, mod indicates a modulo function. This received signal r is received by the digital data receiver 6.
_{When i} (t) and the PN code are multiplied at the timing of the preceding wave,

[Equation 2] Becomes Further, if the assigned Walsh function W _i is multiplied and the result is added over the data timing interval, the symbol f (t) other than the noise is

[Equation 3] Becomes In the equation, the first term is the desired signal component relating to the transmission data i, the second and third terms are the interference components due to the delayed wave, and the second term is the PN code multiplied by d _i-1 of the delayed wave, W
The interference component due to the Alsh code, the third term is d of the delayed wave.
It is an interference component resulting from the PN code and the Walsh code multiplied by _i . Here, in the second and third terms, from the information (delay time difference, signal strength) given from the searcher receiver to the control processor, and the information (signal strength, carrier phase difference) given from each data receiver to the control processor, etc. , The relative parameters (ρ, φ, Δ, δ) regarding the preceding wave and the delayed wave are easily estimated by the control processor, and the Walsh code and the PN code are known, so that d _i in the second term, d _i-
If ₁ is known, f (t) excluding noise can be completely known. That is, in the interference amount calculation circuit, the part of the second term excluding d _i and d _i-1 is individually calculated in the second and third terms and output to the Viterbi processor 102.

[Procedure 3]

[Document name to be amended] Statement

[Correction target item name] 0040

[Correction method] Change

[Correction content]

The above is the operation of the Viterbi processor 102 that processes the signal from the digital data receiver 6 using the Viterbi algorithm. The demodulated symbol from the digital data receiver 7 that demodulates data at the timing of the delayed wave is processed by the Viterbi algorithm. The operation of the Viterbi processor 104 for processing is similar to that of the Viterbi processor 102, and operation flowcharts are shown in FIGS. 5 and 6. The difference from the Viterbi processor 102 described above is that
Branch metric ν

[Equation 8]

[Equation 9]

[Equation 10] The branch metric ν is used to calculate the path metric K (S201 to S21).
7).

[Procedure amendment 4]

[Document name to be amended] Statement

[Correction target item name] 0047

[Correction method] Change

[Correction content]

Further, based on the signal intensity given from Sir char receiver, for two received waves having a large intensity from three or more, the use of the receiving apparatus according to the present invention, also, the influence of interference It can be effectively reduced.

[Procedure Amendment 5]

[Document name to be corrected] Drawing

[Name of item to be corrected] Fig. 11

[Correction method] Change

[Correction content]

FIG. 11

[Procedure correction 6]

[Document name to be corrected] Drawing

[Name of item to be corrected] Fig. 12

[Correction method] Change

[Correction content]

[Fig. 12]

Claims (3)

[Claims] 1. A plurality of data demodulation circuits demodulate a signal transmitted from a base station, which is spread spectrum by a pseudo-noise code by a direct spread method and has orthogonality for each channel by a Walsh code. In a spread spectrum communication receiver for diversity combining signals from a demodulation circuit, an interference amount calculation means for calculating an interference amount by a Walsh code at a data demodulation timing of each data demodulation circuit and a Walsh code at a timing of a preceding wave or a delayed wave. And a processing unit that removes the interference amount from the signal demodulated by the data demodulation circuit using a Viterbi algorithm, and a receiver for spread spectrum communication. 2. A plurality of data demodulation circuits demodulate the signals transmitted from the base station with the orthogonal spread for each channel by the Walsh code by the spread spectrum method by the pseudo-noise code, and each data is demodulated. In a spread spectrum communication receiver for diversity combining signals from a demodulation circuit, an interference amount calculation means for calculating an interference amount by a Walsh code at a data demodulation timing of each data demodulation circuit and a Walsh code at a timing of a preceding wave or a delayed wave. And a processing unit for removing the interference amount from the diversity-combined signal using a Viterbi algorithm. 3. A Walsh according to transmission data, which is spread spectrum by a direct spread method by a pseudo noise code.
In the spread spectrum communication receiver that demodulates the signal multiplied by the code and transmitted from the mobile station with a plurality of data demodulation circuits, and performs diversity combining of the signals from each data demodulation circuit, the data demodulation timing of each data demodulation circuit Wa
A receiver for spread spectrum communication, comprising: an interference amount calculating means for calculating an interference amount between lsh codes; and a processing means for removing the interference amount from a signal demodulated by the data demodulation circuit.