JPH0690020A - Light emitting diode - Google Patents

Light emitting diode

Info

Publication number
JPH0690020A
JPH0690020A JP17576892A JP17576892A JPH0690020A JP H0690020 A JPH0690020 A JP H0690020A JP 17576892 A JP17576892 A JP 17576892A JP 17576892 A JP17576892 A JP 17576892A JP H0690020 A JPH0690020 A JP H0690020A
Authority
JP
Japan
Prior art keywords
layer
light emitting
emitting diode
resistivity
resistance layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17576892A
Other languages
Japanese (ja)
Inventor
Kenji Ochiai
健治 落合
Yasuo Hosokawa
泰男 細川
Mineo Okuyama
峯夫 奥山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Holdings Corp
Original Assignee
Showa Denko KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Showa Denko KK filed Critical Showa Denko KK
Priority to JP17576892A priority Critical patent/JPH0690020A/en
Publication of JPH0690020A publication Critical patent/JPH0690020A/en
Pending legal-status Critical Current

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  • Electrodes Of Semiconductors (AREA)

Abstract

PURPOSE:To make the current from an upper electrode diffuse over the entire light emitting layer by providing both a high resistance layer whose electric resistance is high and a low resistance layer whose electric resistance is low on an epitaxial growth emitting layer, mounted on a chemical compound semiconductor substrate. CONSTITUTION:A light emitting layer 2 is formed on a chemical compound semiconductor substrate 1, and on the top of that, a high resistance layer 3 with high resistance is formed. Then, adjoining to the high resistance layer 3, a low resistance layer 4 with low resistance is formed. Then an upper electrode 5 and lower electrode 6 are provided. With this, the electric current at an electrode part of light emitting diode can be diffused for wider light emitting area, even for the epitaxial wafer with which a thicker growth film is difficult to be obtained, such as an organic metal vapor growth method. Since an upper electrode can be miniaturized, application range is enlarged even with lamps.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は化合物半導体を使用した
発光ダイオードに関し、特に電流を半導体表面全面に拡
散させ、発光効率を向上させた発光ダイオードに関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light emitting diode using a compound semiconductor, and more particularly to a light emitting diode in which a current is diffused over the entire surface of a semiconductor to improve the luminous efficiency.

【0002】[0002]

【従来の技術】化合物半導体のエピタキシャル成長層を
利用した発光ダイオードは広く使用されている。半導体
基板上にエピタキシャル成長させて発光ダイオードを作
成する場合、発光ダイオードチップの表裏に電極を取り
付けて電流の供給口としている、一般に上部電極(基板
と反対側)は発光ダイオードチップ上にそのチップの表
面積の1/5〜1/4程度の面積を持った、丸や四角な
どの適当な形を有するオーミック電極が形成され、下部
電極(基板側)は底部全面または格子状等の模様でチッ
プ底面全面に電極が形成されている(特開昭56−42
390)。
2. Description of the Related Art A light emitting diode using an epitaxial growth layer of a compound semiconductor is widely used. When making a light emitting diode by epitaxial growth on a semiconductor substrate, electrodes are attached to the front and back of the light emitting diode chip to serve as current supply ports. Generally, the upper electrode (the side opposite to the substrate) is the surface area of the chip on the light emitting diode chip. A ohmic electrode having an appropriate shape such as a circle or a square having an area of about 1/5 to 1/4 of that of the lower electrode (substrate side) is formed on the entire bottom surface or the entire bottom surface of the chip in a grid pattern. An electrode is formed on the surface (Japanese Patent Laid-Open No. 56-42).
390).

【0003】この場合、上部電極は電流をチップ全体に
拡散させるという観点からは大きい方が好ましく、発光
した光を外部に取り出すという観点からは電極の面積は
小さい方が好ましい。上部電極は以上のことを考慮して
適当な大きさに設計されている。又発光領域を広げる目
的で上部電極からの電流を発光層全体に拡散させる為
に、発光層上層の厚さを厚くとることが提唱されている
(特開平3−171679参照)。
In this case, the upper electrode is preferably large from the viewpoint of diffusing a current over the entire chip, and the electrode area is preferably small from the viewpoint of extracting emitted light to the outside. The upper electrode is designed to have an appropriate size in consideration of the above. It has also been proposed to increase the thickness of the upper layer of the light emitting layer in order to diffuse the current from the upper electrode throughout the light emitting layer in order to widen the light emitting region (see Japanese Patent Laid-Open No. 3-171679).

【0004】[0004]

【発明が解決しようとする課題】GaAs基板上にIn
GaP混晶の活性層を用いたAlInGaP/InGa
P/AlInGaPダブルヘテロ構造の発光層を有する
発光ダイオードは、高い輝度が得られるこから注目され
ているが、発光層上部層が薄い場合は電流が横方向へ拡
がらず、電極直下の発光しか得られず発光領域が狭い欠
点がある。また、一般に混晶薄膜は液相エピタキシャル
成長(LPE成長法)又は有機金属気相成長法(MOC
VD成長法)によって作られるが、最近この分野で急速
に開発が進められているMOCVD成長法は、LPE成
長法に比べ精密な結晶成長ができる反面厚い膜の成長に
は時間が掛り、生産性を考えた場合は事実上使用が困難
であるといえる。
Problems to be Solved by the Invention In on a GaAs substrate
AlInGaP / InGa using GaP mixed crystal active layer
A light emitting diode having a light emitting layer having a P / AlInGaP double hetero structure has been attracting attention because it can obtain high brightness. However, when the upper layer of the light emitting layer is thin, the current does not spread in the lateral direction and only the light emission just below the electrode is emitted. There is a drawback that the light emitting region is narrow because it cannot be obtained. Generally, a mixed crystal thin film is formed by liquid phase epitaxial growth (LPE growth method) or metal-organic vapor phase epitaxy method (MOC).
The MOCVD growth method, which has been recently developed rapidly in this field, allows more precise crystal growth than the LPE growth method, but it takes time to grow a thick film and productivity is increased. When considering, it can be said that it is practically difficult to use.

【0005】その為このMOCVD成長法で得られた結
晶性に優れたエピタキシャル成長膜を使用した発光ダイ
オードは、厚い電流拡散層が利用できず上部電極からの
電流が発光ダイオードの発光層全体に拡散しないため、
電極の周辺部しか発光しないという欠点があった。
Therefore, in the light emitting diode using the epitaxially grown film excellent in crystallinity obtained by this MOCVD growth method, the thick current diffusion layer cannot be used and the current from the upper electrode does not diffuse to the entire light emitting layer of the light emitting diode. For,
There is a drawback that only the peripheral portion of the electrode emits light.

【0006】[0006]

【課題を解決するための手段】本発明では、化合物半導
体基板上にエピタキシャル成長発光層を積載した発光ダ
イオードにおいて、発光層の上に電気抵抗の高い高抵抗
層と電気抵抗の低い低抵抗層とを具備させて、上部電極
からの電流が発光層全体に拡散するようにした。
According to the present invention, in a light emitting diode having an epitaxially grown light emitting layer stacked on a compound semiconductor substrate, a high resistance layer having high electric resistance and a low resistance layer having low electric resistance are provided on the light emitting layer. It is provided so that the current from the upper electrode diffuses throughout the light emitting layer.

【0007】本発明の発光ダイオードの代表的構造を図
1に示す。図1において1は化合物半導体基板、2は発
光層、3は高抵抗層、4は低抵抗層、5は上部電極、6
は下部電極である。
A typical structure of the light emitting diode of the present invention is shown in FIG. In FIG. 1, 1 is a compound semiconductor substrate, 2 is a light emitting layer, 3 is a high resistance layer, 4 is a low resistance layer, 5 is an upper electrode, and 6
Is the lower electrode.

【0008】化合物半導体基板1はGaP,GaAs,
InP等が利用できる。発光層2は単純なp−n接合、
シングルヘテロ構造、ダブルヘテロ構造等何でも利用で
きる。使用する結晶は目的とする発光波長に合せてGa
P,InGaP,AlInGaP,GaAlAs,Ga
AsP等種々のものが選択できる。基板1と発光層2と
の間に基板の結晶欠陥の影響を避ける為、基板と同じ結
晶のエピタキシャル成長層をバッファー層として用いて
も良い。又p型とn型を逆にしても形成できることは言
うまでもないことである。
The compound semiconductor substrate 1 is made of GaP, GaAs,
InP or the like can be used. The light emitting layer 2 is a simple pn junction,
Anything such as a single hetero structure and a double hetero structure can be used. The crystal used should be Ga according to the desired emission wavelength.
P, InGaP, AlInGaP, GaAlAs, Ga
Various things such as AsP can be selected. In order to avoid the influence of crystal defects of the substrate between the substrate 1 and the light emitting layer 2, an epitaxial growth layer of the same crystal as the substrate may be used as the buffer layer. It goes without saying that the p-type and the n-type can be formed in reverse.

【0009】図1の3と4は抵抗率の異なる電流拡散層
であって、電極が形成し易やすくかつ発光した光を吸収
しないものである必要がある。電極が形成し難い場合低
抵抗層4と電極5の間にコンタクト層を設けることもあ
る。高抵抗層3は縦方向の抵抗を大きくするほど電流の
拡がり効果が良く、そのためには抵抗率を大きく膜厚を
厚くすることが考えられる。しかし、膜厚を厚くするこ
とは本発明の目的に反するので抵抗率の大きなエピタキ
シャル成長層を採用し、膜厚はなるべく薄くすることが
望ましい。又、抵抗を大きくすることは発光ダイオード
の順方向電圧を大きくすることになり不利になるので、
実用上問題にならない範囲とする必要がある。上記のこ
とを考慮し高抵抗層3の抵抗率は1〜100Ωcmとす
る。一般に半導体にキャリアーを付与するためにZn等
の不純物を低く制御して高い抵抗率を得ようとした場
合、MOCVD法等の気相成長法で実際上制御できる抵
抗率としては100Ωcm程度までである。安定生産を考
えここで目標とする抵抗率を10Ωcmとし、この高抵抗
層を厚さ1μmで 300×300 μm の大きさに形成した半
導体チップでの電気抵抗は約1Ωとなる。これは発光ダ
イオードの通常の使用電流を20mAとした時この層で
の電圧降下が0.02Vとなり実用上問題にならないレ
ベルと考えられる。更に高い抵抗率の層を形成した場合
は膜厚を薄くして高抵抗層とすることができる。
Reference numerals 3 and 4 in FIG. 1 are current diffusion layers having different resistivities, and it is necessary that the electrodes are easy to form and do not absorb the emitted light. When it is difficult to form an electrode, a contact layer may be provided between the low resistance layer 4 and the electrode 5. The higher the resistance of the high resistance layer 3 in the vertical direction, the better the current spreading effect is. Therefore, it is considered that the resistivity is increased and the film thickness is increased. However, increasing the film thickness is against the object of the present invention. Therefore, it is desirable to adopt an epitaxial growth layer having a large resistivity and make the film thickness as thin as possible. Further, increasing the resistance increases the forward voltage of the light emitting diode, which is disadvantageous.
It should be within a range that does not pose a problem in practice. Considering the above, the resistivity of the high resistance layer 3 is set to 1 to 100 Ωcm. In general, when an impurity such as Zn is controlled to be low in order to provide a carrier to a semiconductor to obtain a high resistivity, the resistivity which can be actually controlled by a vapor phase growth method such as MOCVD is up to about 100 Ωcm. . Considering stable production, the target resistivity is set to 10 Ωcm, and the electric resistance of a semiconductor chip formed by forming this high resistance layer in a size of 1 μm and 300 × 300 μm is about 1 Ω. This is considered to be a level at which the voltage drop in this layer is 0.02 V when the normal working current of the light emitting diode is 20 mA, which is not a problem in practical use. When a layer having a higher resistivity is formed, the film thickness can be reduced to form a high resistance layer.

【0010】次に、高抵抗層3に隣接して抵抗率の低い
低抵抗層4を設ける。低抵抗層4は横方向の抵抗を小さ
くするほど電流の広がり効果が良く、そのためには抵抗
率は低いほど、膜厚は厚いほど良いが、膜厚を厚くする
ことは本発明の特徴が薄れる。MOCVD法等で不純物
をドープして実際上得られる低い抵抗率としては、10
-1〜10-3Ωcmである。以上のように高抵抗層3は抵抗
率が高い程、低抵抗層4は抵抗率が低い程、つまり高抵
抗層3と低抵抗層4の抵抗率の比が大きい程、電流の拡
散効果は大きく膜厚は薄くすることができる。以上のこ
とを考慮し抵抗率の比を50以上とすることが望まし
い。これ以下になると電流の拡散効果が薄れ、又は膜厚
を薄くできるという利点が薄れるからである。
Next, a low resistance layer 4 having a low resistivity is provided adjacent to the high resistance layer 3. The lower the resistance in the lateral direction, the better the current spreading effect of the low resistance layer 4, and therefore, the lower the resistivity and the larger the film thickness, the better. However, increasing the film thickness diminishes the characteristics of the present invention. . The low resistivity that is actually obtained by doping impurities by MOCVD is 10
It is -1 to 10 -3 Ωcm. As described above, the higher the resistivity of the high resistance layer 3 is, the lower the resistivity of the low resistance layer 4 is, that is, the greater the ratio of the resistivity of the high resistance layer 3 to the low resistance layer 4 is, the more the current diffusion effect is The film thickness can be made large and thin. Considering the above, it is desirable to set the resistivity ratio to 50 or more. This is because if it is less than this, the effect of diffusing the current is weakened, or the advantage that the film thickness can be reduced.

【0011】高抵抗層3の膜厚は5μm以下望ましくは
2μm以下、低抵抗層4の膜厚は6μm以下望ましくは
3μm以下とし、抵抗率の比をなるべく大きく取ること
が望ましい。抵抗率の比を大きくすれば、それだけ各層
の膜厚は薄くすることができる。
The film thickness of the high resistance layer 3 is 5 μm or less, preferably 2 μm or less, and the film thickness of the low resistance layer 4 is 6 μm or less, preferably 3 μm or less, and it is desirable to make the resistivity ratio as large as possible. By increasing the resistivity ratio, the film thickness of each layer can be reduced accordingly.

【0012】電流拡散層として使用する結晶の種類とし
ては、発光層に格子整合するものを適宜選択し、発光し
た光を吸収しないものを選ぶ。例えば、発光層がAlI
nGaP(クラッド層)/InGaP(活性層)/Al
InGaP(クラッド層)のダブルヘテロ構造の場合に
は、AlInGaP,AlGaAs等を用いることがで
きる。
As the type of crystal used as the current diffusion layer, one that lattice-matches with the light emitting layer is appropriately selected, and one that does not absorb the emitted light is selected. For example, the light emitting layer is AlI
nGaP (cladding layer) / InGaP (active layer) / Al
In the case of the InGaP (cladding layer) double heterostructure, AlInGaP, AlGaAs, or the like can be used.

【0013】電流拡散層の抵抗率の制御は各層の組成を
変えてもある程度できるが、結晶中のキャリア濃度を変
えることにより簡単に行なうことができる。例えば、A
lInGaPにZnをドープしたp型結晶の場合、キャ
リア濃度が1016cm-3で抵抗率は約10Ωcm、キャリア
濃度が1019cm-3で抵抗率は約10-2Ωcmとなる。又、
AlInGaPにSeをドープしたn型結晶の場合、キ
ャリア濃度1016cm-3で抵抗率は約10Ωcm、キャリア
濃度1018cm-3で抵抗率は約10-2Ωcmとなる。
Although the resistivity of the current diffusion layer can be controlled to some extent by changing the composition of each layer, it can be easily controlled by changing the carrier concentration in the crystal. For example, A
In the case of a p-type crystal in which 1InGaP is doped with Zn, the carrier concentration is 10 16 cm -3 , the resistivity is about 10 Ωcm, and the carrier concentration is 10 19 cm -3 , the resistivity is about 10 -2 Ωcm. or,
In the case of an n-type crystal in which AlInGaP is doped with Se, the resistivity is about 10 16 cm -3 , the resistivity is about 10 Ωcm, and the carrier concentration is 10 18 cm -3 , the resistivity is about 10 -2 Ωcm.

【0014】[0014]

【作用】本発明は電流拡散層の抵抗率と厚さを制御する
ことにより、上部電極から供給された電流を発光層全域
に拡散させることとしたものである。図3及び図4は本
発明の原理を考察するためのものである。本来このよう
な構造の電気的検討を精密に行なうには、電流拡散層に
微小な電気回路が存在する場合を考え、図4なような分
布定数回路として考えるべきであるが、考察を簡単にす
るために図3のような回路を考える。ここでAは上部電
極、Bは下部電極、RH1は上部電極直下の高抵抗層(上
部電極と同じ面積とする)、RH2はRH1の外側でRH1
同じ面積の高抵抗層のリング状の部分の抵抗、RL はR
H1からRH2までの低抵抗層の等価抵抗、I1 およびI2
はそれぞれRH1およびRH2を縦に通る電流とする。図3
においてRH1とRH2は同じ抵抗値となるので、RH1およ
びRH2に比べてRL を十分小さくすれば、電流I2 はI
1 に近い値となり、上部電極からの電流は発光層全体に
拡散することになる。
According to the present invention, by controlling the resistivity and thickness of the current diffusion layer, the current supplied from the upper electrode is diffused throughout the light emitting layer. 3 and 4 are for considering the principle of the present invention. Originally, in order to make a precise electrical examination of such a structure, it is necessary to consider the case where a minute electric circuit exists in the current diffusion layer and consider it as a distributed constant circuit as shown in FIG. To do this, consider a circuit as shown in FIG. Where A is the upper electrode, B is a lower electrode, R H1 is (the same area as the upper electrode) high-resistance layer immediately below the upper electrode, R H2 is the high-resistance layer having the same area as R H1 outside of R H1 The resistance of the ring part, R L is R
Equivalent resistance of low resistance layer from H1 to R H2 , I 1 and I 2
Are currents that vertically pass through R H1 and R H2 , respectively. Figure 3
Since R H1 and R H2 have the same resistance value, the current I 2 becomes I 2 if R L is sufficiently smaller than R H1 and R H2.
The value is close to 1 , and the current from the upper electrode diffuses throughout the light emitting layer.

【0015】次に本発明について有限要素法を用いて数
値解析した結果を示す。解析モデルを簡単にするために
発光ダイオードチップを図5(C)のような円筒形の軸
対称モデルとし、低抵抗層,高抵抗層それぞれの抵抗率
と厚さを変えて数値解析した結果が図6である。ここ
で、高抵抗層より下の基板部は一様な半導体層とし抵抗
率10-1Ωcm,厚さ240μmとした。高抵抗層は全て
抵抗率10Ωcm,厚さ1μmとした。高抵抗層なしの場
合は基板と同じ抵抗率10-1Ωcmの層が1μmあるもの
とした。円筒モデルの半径は150μmとし、電極5,
6間に1Vの電圧を加えたものとした。図6において横
軸は発光ダイオードチップの中心軸からの距離、縦軸は
電流密度、Aは高抵抗層下面の電流密度、Bは基板下面
の電流密度、破線Cは上部電極端部の位置を示したもの
である。この解析結果からすると高抵抗層が無い図6,
a1〜a4の場合は曲線Aが電極端部で上に凸となり、
上部電極端部に電流が集中していることが解る。このこ
とは発光部がこの部分に限られていることを示してお
り、発光ダイオードの寿命の観点からも好ましいことで
はない。一方、高抵抗層を挿入する図6,b1〜b4の
場合曲線Aは平坦化し、この電流集中が大きく緩和され
ており図6,b4では電流がチップ全面に均一に拡がっ
ていることが解る。
Next, the results of numerical analysis of the present invention using the finite element method will be shown. In order to simplify the analysis model, the light emitting diode chip was made into a cylindrical axisymmetric model as shown in FIG. 5 (C), and the numerical analysis results were obtained by changing the resistivity and thickness of the low resistance layer and high resistance layer respectively. It is FIG. Here, the substrate portion below the high resistance layer was a uniform semiconductor layer with a resistivity of 10 -1 Ωcm and a thickness of 240 μm. All of the high resistance layers had a resistivity of 10 Ωcm and a thickness of 1 μm. When the high resistance layer was not provided, the layer having the same resistivity of 10 -1 Ωcm as the substrate was 1 μm. The radius of the cylindrical model is 150 μm, and the electrodes 5,
A voltage of 1 V was applied between the six. In FIG. 6, the horizontal axis is the distance from the central axis of the light emitting diode chip, the vertical axis is the current density, A is the current density on the lower surface of the high resistance layer, B is the current density on the lower surface of the substrate, and broken line C is the position of the upper electrode end. It is shown. From this analysis result, it can be seen in FIG.
In the case of a1 to a4, the curve A becomes convex at the electrode end,
It can be seen that the current is concentrated on the edge of the upper electrode. This means that the light emitting portion is limited to this portion, which is not preferable from the viewpoint of the life of the light emitting diode. On the other hand, in the case of inserting the high resistance layer in FIG. 6, b1 to b4, the curve A is flattened, and this current concentration is greatly alleviated. In FIG. 6 and b4, it can be seen that the current spreads uniformly over the entire surface of the chip.

【0016】[0016]

【実施例】本発明の実施例を示して具体的に説明する。
GaAs基板上にMOCVD法によりInGaPを活性
層とし、AlInGaPをクラッド層とするダブルヘテ
ロ構造と、これに隣接する電流拡散層を有するLED用
エピタキシャルウェハーを作った。各層の構成は表1の
通りである。又このウェハーの構造を図2に示す。41
は低抵抗のp−AlInGaP層、31は高抵抗のp−
AlInGaP層で、両者の抵抗率の比は200にして
ある。
EXAMPLES The present invention will be specifically described with reference to examples.
An LED epitaxial wafer having a double heterostructure having InGaP as an active layer and AlInGaP as a clad layer and a current diffusion layer adjacent to the double heterostructure was prepared on a GaAs substrate by MOCVD. The structure of each layer is as shown in Table 1. The structure of this wafer is shown in FIG. 41
Is a low resistance p-AlInGaP layer, and 31 is a high resistance p-
The AlInGaP layer has a resistivity ratio of 200.

【0017】[0017]

【表1】 [Table 1]

【0018】このエピタキシャルウェハーを使用して、
上部電極としてAuZn(7.5%)を厚さ0.5μ
m、Auを厚さ1μmで130μmφの円形に蒸着し、
下部電極としてAuGe(7.5%)を厚さ0.5μ
m、Auを厚さ1μmで全面に蒸着した後、500℃の
Ar雰囲気中で10分間アロイングして形成した後、電
極下部以外のコンタクト層とp−InGaP層をエッチ
ングで除去し、300×300μmのチップにダイシン
グして発光ダイオードとした。
Using this epitaxial wafer,
AuZn (7.5%) has a thickness of 0.5 μm as the upper electrode.
m and Au are vapor-deposited into a circle of 130 μmφ with a thickness of 1 μm,
AuGe (7.5%) as the lower electrode is 0.5μ thick
After depositing m and Au to a thickness of 1 μm on the entire surface and then forming by alloying in an Ar atmosphere at 500 ° C. for 10 minutes, the contact layer other than the electrode lower part and the p-InGaP layer are removed by etching, and 300 × 300 μm The chip was diced into a light emitting diode.

【0019】このようにして得られた発光ダイオードの
発光特性を測定した結果を表2に示す。測定に用いた装
置はテストフィクスチァーとして積分球ディフレクター
を使い、フォトダイオードでその光を検出した。発光効
率は比視感度補正されたフォトダイオードの検出電流と
発光ダイオードへの供給電流の比で示した。
Table 2 shows the measurement results of the light emitting characteristics of the light emitting diode thus obtained. The device used for the measurement used an integrating sphere deflector as a test fixture and detected the light with a photodiode. Luminous efficiency was shown by the ratio of the detection current of the photodiode whose relative luminous efficiency was corrected and the current supplied to the light emitting diode.

【0020】[0020]

【表2】 [Table 2]

【0021】比較例 比較のため上記実施例で高抵抗層31の部分を低抵抗層
41と同じ材料で置き換えた他は、実施例1と同じ構造
にして発光ダイオードを作成したものにつき、発光特性
を測定した結果を表2に併記する。
Comparative Example For comparison, a light emitting diode having the same structure as in Example 1 except that the high resistance layer 31 was replaced with the same material as the low resistance layer 41 in the above example, the light emitting characteristics were obtained. Table 2 also shows the results of the measurement.

【0022】以上の結果によれば、20mAの電流を流
した時の発光効率は、比較サンプルが2.5nA/mA
であるのに対して、本発明例では6.5nA/mAとな
った。又、発光パターンも比較例が電極周辺部だけの発
光であるのに対し、本発明のものは表面全面から発光し
ていることが確認された。
According to the above results, the luminous efficiency of the comparative sample was 2.5 nA / mA when a current of 20 mA was applied.
On the other hand, it was 6.5 nA / mA in the example of the present invention. Further, it was confirmed that the light emission pattern of the comparative example is light emission only in the peripheral portion of the electrode, whereas the light emission pattern of the present invention emits light from the entire surface.

【0023】[0023]

【発明の効果】本発明によれば、MOCVD法のような
厚い成長膜が得にくいエピタキシャルウェハーの場合で
も、発光ダイオードの電極部の電流を拡散させ、発光領
域を広く取ることができ、上部電極も小型に出来るので
ランプにした場合も用途範囲が拡大する。
According to the present invention, even in the case of an epitaxial wafer such as a MOCVD method in which a thick grown film is difficult to obtain, the current of the electrode portion of the light emitting diode can be diffused to make the light emitting region wide, and the upper electrode can be obtained. Since it can be made smaller, the range of applications is expanded even when used as a lamp.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明における電流拡散層の構造を説明する図
である。
FIG. 1 is a diagram illustrating a structure of a current spreading layer according to the present invention.

【図2】実施例のチップ構造を示す図である。FIG. 2 is a diagram showing a chip structure of an example.

【図3】本発明の原理の説明図である。FIG. 3 is an explanatory diagram of the principle of the present invention.

【図4】本発明の原理の説明図である。FIG. 4 is an explanatory diagram of the principle of the present invention.

【図5】数値解析に使ったモデル図である。FIG. 5 is a model diagram used for numerical analysis.

【図6】数値解析の結果を示す図である。FIG. 6 is a diagram showing a result of numerical analysis.

【符号の説明】 1……GaAs基板 2……発光層 3……高抵抗層 4……低抵抗層 5……上部電極 6……下部電極 71…GaAsバファー層 21…n−AlInGaP クラッド層 22…p−InGaP 活性層 23…p−AlInGaP クラッド層 31…p- −AlInGaP 高抵抗層 41…p+ −AlInGaP 低抵抗層 51…p−InGaP 層 61…GaAsコンタクト層[Explanation of symbols] 1 ... GaAs substrate 2 ... Light emitting layer 3 ... High resistance layer 4 ... Low resistance layer 5 ... Upper electrode 6 ... Lower electrode 71 ... GaAs buffer layer 21 ... n-AlInGaP clad layer 22 ... p-InGaP active layer 23 ... p-AlInGaP clad layer 31 ... p -- AlInGaP high resistance layer 41 ... p + -AlInGaP low resistance layer 51 ... p-InGaP layer 61 ... GaAs contact layer

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 化合物半導体基板上にエピタキシャル成
長発光層を積載した発光ダイオードにおいて、基板と反
対側の発光層の上に電気抵抗の高いエピタキシャル成長
層と電気抵抗の低いエピタキシャル成長層とを具備した
ことを特徴とする発光ダイオード。
1. A light emitting diode in which an epitaxially grown light emitting layer is stacked on a compound semiconductor substrate, wherein an epitaxial growth layer having a high electric resistance and an epitaxial growth layer having a low electric resistance are provided on the light emitting layer opposite to the substrate. And a light emitting diode.
【請求項2】 高電気抵抗層と低電気抵抗層の抵抗率の
比が50以上であることを特徴とする請求項1記載の発
光ダイオード。
2. The light emitting diode according to claim 1, wherein the ratio of the resistivity of the high electric resistance layer to the low electric resistance layer is 50 or more.
【請求項3】 GaAs基板上に、GaInPを活性層
としAlGaInPをクラッド層とするダブルヘテロ構
造の発光層を有し、該発光構造層の上に抵抗率1〜10
0Ω の高電気抵抗AlGaInP層と抵抗率が1〜1
×10-3Ωcmの低電気抵抗AlGaInP層とを順次積
層したことを特徴とする発光ダイオード。
3. A light emitting layer having a double hetero structure having GaInP as an active layer and AlGaInP as a cladding layer is provided on a GaAs substrate, and the resistivity of 1 to 10 is provided on the light emitting structure layer.
High electrical resistance of 0Ω AlGaInP layer and resistivity of 1 to 1
A light-emitting diode comprising a low electric resistance AlGaInP layer of × 10 −3 Ωcm sequentially stacked.
【請求項4】 高電気抵抗層の厚さが0.1〜5μm、
低電気抵抗層の厚さが0.5〜6μmであることを特徴
とする請求項1ないし請求項3記載の発光ダイオード。
4. The high electric resistance layer has a thickness of 0.1 to 5 μm,
The light emitting diode according to claim 1, wherein the low electric resistance layer has a thickness of 0.5 to 6 μm.
JP17576892A 1992-07-02 1992-07-02 Light emitting diode Pending JPH0690020A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17576892A JPH0690020A (en) 1992-07-02 1992-07-02 Light emitting diode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17576892A JPH0690020A (en) 1992-07-02 1992-07-02 Light emitting diode

Publications (1)

Publication Number Publication Date
JPH0690020A true JPH0690020A (en) 1994-03-29

Family

ID=16001924

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17576892A Pending JPH0690020A (en) 1992-07-02 1992-07-02 Light emitting diode

Country Status (1)

Country Link
JP (1) JPH0690020A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011176001A (en) * 2010-02-23 2011-09-08 Hitachi Cable Ltd Light emitting device and method of manufacturing the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011176001A (en) * 2010-02-23 2011-09-08 Hitachi Cable Ltd Light emitting device and method of manufacturing the same

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