JPH0685318A - Manufacture of light emitting diode array chip - Google Patents
Manufacture of light emitting diode array chipInfo
- Publication number
- JPH0685318A JPH0685318A JP25895292A JP25895292A JPH0685318A JP H0685318 A JPH0685318 A JP H0685318A JP 25895292 A JP25895292 A JP 25895292A JP 25895292 A JP25895292 A JP 25895292A JP H0685318 A JPH0685318 A JP H0685318A
- Authority
- JP
- Japan
- Prior art keywords
- light emitting
- diffusion
- chip
- emitting diode
- blocking film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
- B41J—TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
- B41J2/00—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
- B41J2/435—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of radiation to a printing material or impression-transfer material
- B41J2/447—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of radiation to a printing material or impression-transfer material using arrays of radiation sources
- B41J2/45—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of radiation to a printing material or impression-transfer material using arrays of radiation sources using light-emitting diode [LED] or laser arrays
Landscapes
- Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Health & Medical Sciences (AREA)
- General Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Led Devices (AREA)
- Printers Or Recording Devices Using Electromagnetic And Radiation Means (AREA)
- Dicing (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、ＬＥＤプロッター等に
使用される高解像度の発光ダイオードアレイチップを製
造する方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a high resolution light emitting diode array chip used for an LED plotter or the like.
【０００２】[0002]
【従来の技術】電子写真式のプロッターは、一定のピッ
チで複数の発光素子を基板上に形成した発光ダイオード
アレイを光源として使用している。従来の発光ダイオー
ドアレイチップは、たとえば図１に示すように、基板１
１ａ表面にｎ型ＧａＡｓＰのエピタキシャル層１１ｂを
成長させたエピタキシャルウエハ１０を使用する。エピ
タキシャル層１１ｂの上に、拡散阻止膜１２を選択拡散
マスクとして使用し熱拡散法によってｐ型半導体領域を
形成して発光部１３としている。個々の発光部１３に電
極部１４が設けられた後、エピタキシャルウエハ１０が
ダイシングによって各チップに切断される。2. Description of the Related Art An electrophotographic plotter uses, as a light source, a light emitting diode array having a plurality of light emitting elements formed on a substrate at a constant pitch. A conventional light emitting diode array chip has a substrate 1 as shown in FIG.
An epitaxial wafer 10 having an n-type GaAsP epitaxial layer 11b grown on the surface 1a is used. A p-type semiconductor region is formed on the epitaxial layer 11b by a thermal diffusion method using the diffusion blocking film 12 as a selective diffusion mask to form a light emitting portion 13. After the electrode portion 14 is provided on each light emitting portion 13, the epitaxial wafer 10 is cut into each chip by dicing.
【０００３】通常の発光ダイオードアレイは、解像度２
００〜４００ドット／インチの発光ダイオード６４〜２
５６個を一つのチップ内に集積している。最近では、印
画品質を向上させるため、更に解像度を向上させた発光
ダイオードアレイが要求されている。この点から、特に
４００ドット／インチ以上の高解像度をもった発光ダイ
オードを高い歩留りで製造できる技術が必要とされてい
る。A typical light emitting diode array has a resolution of 2
Light emitting diode 64-2 of 00-400 dots / inch
56 pieces are integrated in one chip. Recently, in order to improve print quality, a light emitting diode array having further improved resolution is required. From this point, there is a need for a technique capable of manufacturing a light emitting diode having a high resolution of 400 dots / inch or more with a high yield.
【０００４】[0004]
【発明が解決しようとする課題】従来の方法によって製
造した４００ドット／インチ以上の高解像度をもつ発光
ダイオードでは、図２（ａ）に示すようにアレイ最端発
光部に著しい発光出力の低下がみられる。この点、個々
の発光部の隣接間距離が比較的大きな４００ドット／イ
ンチ未満の解像度が低い発光ダイオードでは、図２
（ｂ）に示すように、個々の発光部は、アレイ最端で低
下することがなく、何れの発光部も等しい発光出力をも
つ。In the light emitting diode having a high resolution of 400 dots / inch or more manufactured by the conventional method, the light emitting output is remarkably lowered at the light emitting portion at the end of the array as shown in FIG. 2 (a). Seen. In this regard, in a light emitting diode having a low resolution of less than 400 dots / inch, which has a relatively large distance between adjacent light emitting portions,
As shown in (b), the individual light emitting units do not decrease at the end of the array, and all the light emitting units have the same light emission output.
【０００５】アレイ最端発光部の発光出力が図２（ａ）
に示すように低下した発光ダイオードアレイチップをプ
リンター等に使用すると、印字品質を劣化させる原因と
なる。アレイ最端発光部における発光出力低下は、解像
度を向上させるため小さなピッチで多数の発光部を配列
させるほど顕著に現れる。そのため、不良品発生率が高
く、発光ダイオードアレイチップの生産コストを上昇さ
せる原因となっている。本発明は、このような問題を解
消すべく案出されたものであり、チップ外周端部におけ
るｐ型半導体領域の形成を別途の拡散阻止膜で抑制する
ことにより、アレイ端部での発光出力低下が生じない発
光ダイオードアレイチップを高い歩留りで製造すること
を目的とする。The emission output of the light emitting portion at the end of the array is shown in FIG.
If the deteriorated LED array chip is used in a printer or the like as shown in (4), it may cause deterioration of print quality. The decrease in the light emission output at the light emitting portion at the end of the array becomes more remarkable as a large number of light emitting portions are arranged at a small pitch in order to improve the resolution. Therefore, the defective product generation rate is high, which causes an increase in the production cost of the light emitting diode array chip. The present invention has been devised to solve such a problem, and by suppressing the formation of the p-type semiconductor region at the outer peripheral edge of the chip by a separate diffusion blocking film, the light emission output at the edge of the array is suppressed. It is an object of the present invention to manufacture a light-emitting diode array chip that does not deteriorate with a high yield.
【０００６】[0006]
【課題を解決するための手段】本発明の発光ダイオード
アレイチップ製造方法は、その目的を達成するため、拡
散窓を備えた第１の拡散阻止膜でエピタキシャルウエハ
の表面を覆うと共に、最端発光部が形成される前記エピ
タキシャルウエハのチップ周辺部に前記第１の拡散阻止
膜とは材質が異なる第２の拡散阻止膜を設け、前記拡散
窓を介してエピタキシャル層に不純物を拡散させて発光
部となるｐ型半導体領域を形成することを特徴とするを
特徴とする。In order to achieve the object, a method of manufacturing a light emitting diode array chip according to the present invention covers the surface of an epitaxial wafer with a first diffusion blocking film having a diffusion window, and emits the outermost light. A second diffusion blocking film made of a material different from that of the first diffusion blocking film is provided around the chip of the epitaxial wafer in which a portion is formed, and impurities are diffused into the epitaxial layer through the diffusion window to emit light. It is characterized in that a p-type semiconductor region is formed.
【０００７】[0007]
【作 用】従来の発光ダイオードアレイにおいて、アレ
イ端部に位置する発光部の発光出力が低下する理由は、
次のように考えられる。通常、熱拡散法，イオン注入法
等によってｐ型半導体領域を形成する際、図３に示すよ
うに発光部１４だけでなく、チップ外周部１５にもｐ型
半導体領域１７が形成される。また、発光部１３のｐ型
半導体領域は、深さＸj に対して１〜１．５倍の距離Ｙ
j だけ横方向にも広がり、拡散阻止膜１２の下へも侵入
する。[Operation] In the conventional light emitting diode array, the reason why the light emission output of the light emitting section located at the end of the array is lowered is
It can be considered as follows. Usually, when the p-type semiconductor region is formed by a thermal diffusion method, an ion implantation method or the like, the p-type semiconductor region 17 is formed not only in the light emitting portion 14 but also in the chip outer peripheral portion 15 as shown in FIG. The p-type semiconductor region of the light emitting portion 13 has a distance Y that is 1 to 1.5 times the depth X j .
It spreads in the lateral direction by j , and penetrates under the diffusion blocking film 12.
【０００８】他方、ダイシングによる発光ダイオードア
レイチップの切出しは、図４に示すように高速回転して
いるダイシングブレード１８をウエハーに接触させてチ
ップ外周部１５を研削することによって行われる。その
ため、ウエハーの切断面１９には、結晶欠陥層２０が導
入される。したがって、切り出された後のウエハーにお
いて、チップ外周部１５にあるｐ型半導体領域１７は、
結晶欠陥層２０を介して基板１１ａと電気的に短絡した
状態になる。On the other hand, the cutting of the light emitting diode array chip by dicing is performed by bringing the dicing blade 18 rotating at high speed into contact with the wafer and grinding the chip outer peripheral portion 15 as shown in FIG. Therefore, the crystal defect layer 20 is introduced into the cut surface 19 of the wafer. Therefore, in the wafer after being cut out, the p-type semiconductor region 17 in the chip outer peripheral portion 15 is
The substrate 11a is electrically short-circuited via the crystal defect layer 20.
【０００９】また、発光ダイオードアレイチップの短辺
方向の端部となる切断面１９は、プリンター等に実装し
た状態では、図５に示すように隣接する発光ダイオード
アレイチップ２１，２２の継ぎ目部分２３に相当する。
この継ぎ目部分２３においても最端発光部２４，２５が
所定のピッチで配列される必要があることから、チップ
端部２６，２７は最端発光部２４，２５のごく近傍に位
置する。図６に示す最端発光部２４からチップ端部２６
までの距離Ｌは、発光ダイオードアレイの解像度、すな
わち線密度が高くなるほど短くなる。特に４００ドット
／インチ以上の解像度をもつ発光ダイオードアレイで
は、距離Ｌが極めて短いため、チップ外周部に形成され
ているｐ型半導体領域１７に最端発光部２４が接触して
しまう。Further, the cut surface 19 which is the end portion in the short side direction of the light emitting diode array chip has a joint portion 23 of the adjacent light emitting diode array chips 21 and 22 as shown in FIG. 5 when mounted on a printer or the like. Equivalent to.
Also in this joint portion 23, since the outermost light emitting portions 24 and 25 need to be arranged at a predetermined pitch, the chip end portions 26 and 27 are located very close to the outermost light emitting portions 24 and 25. From the endmost light emitting portion 24 to the tip end portion 26 shown in FIG.
The distance L to becomes shorter as the resolution of the light emitting diode array, that is, the higher the linear density becomes. Particularly in a light emitting diode array having a resolution of 400 dots / inch or more, the distance L is extremely short, so that the end light emitting portion 24 comes into contact with the p-type semiconductor region 17 formed on the outer peripheral portion of the chip.
【００１０】このような最端発光部２４，２５において
は、駆動のために注入された電流が発光に寄与すること
なく、チップ外周部に形成されているｐ型半導体領域１
７及び結晶欠陥層２０を介して基板１１ａに至る。その
結果、最端発光部２４に限って、図２（ａ）に示した発
光出力の低下がみられる。本発明においては、図７に示
すように、拡散阻止膜１２とは異なる材質でできた拡散
阻止膜２８をチップ外周部に設けることにより、発光出
力を低下させる原因となるｐ型半導体領域１７の形成を
抑制している。In such endmost light emitting portions 24 and 25, the current injected for driving does not contribute to light emission, and the p-type semiconductor region 1 formed in the outer peripheral portion of the chip.
7 and the crystal defect layer 20 to reach the substrate 11a. As a result, the light emission output shown in FIG. 2A is reduced only in the outermost light emitting section 24. In the present invention, as shown in FIG. 7, by providing a diffusion blocking film 28 made of a material different from that of the diffusion blocking film 12 on the outer peripheral portion of the chip, the p-type semiconductor region 17 that causes a decrease in light emission output is formed. It suppresses the formation.
【００１１】１種類のみの拡散阻止膜１２を使用した従
来法では、前述したようにｐ型半導体領域１７がチップ
周辺部に形成される。ｐ型半導体領域１７の形成自体
は、図８に示すようなチップ外側に張出し部１２ａを付
けた拡散阻止膜１２の使用によって防止できる。しか
し、張出し部１２ａ，１２ｂは、ダイシング工程でダイ
シングブレード１８により切断される。拡散阻止膜１２
として窒化ケイ素膜，酸化アルミニウム膜等が通常使用
されており、これら材質の拡散阻止膜１２をダイシング
ブレード１８で切断すると、発光ダイオードアレイチッ
プの端部において拡散阻止膜１２の剥離が生じる。その
ため、拡散阻止膜１２の最終的な目的であるｐ−ｎ接合
の保護作用が妨げられる。In the conventional method using only one kind of diffusion blocking film 12, the p-type semiconductor region 17 is formed in the peripheral portion of the chip as described above. The formation of the p-type semiconductor region 17 itself can be prevented by using the diffusion blocking film 12 having the protrusion 12a on the outside of the chip as shown in FIG. However, the overhang portions 12a and 12b are cut by the dicing blade 18 in the dicing process. Diffusion blocking film 12
A silicon nitride film, an aluminum oxide film or the like is usually used as the material. When the diffusion blocking film 12 made of these materials is cut by the dicing blade 18, the diffusion blocking film 12 is peeled off at the end portion of the light emitting diode array chip. Therefore, the protective purpose of the pn junction, which is the final purpose of the diffusion blocking film 12, is hindered.
【００１２】他方、２種類の拡散阻止膜１２及び２８を
使用するとき、チップ外周部におけるｐ型半導体領域１
７の形成が阻止されると共に、ダイシングによって導入
される結晶欠陥部２０を介し基板１１ａへの導通が防止
される。そのため、最端発光部２４の発光出力を低下さ
せることがなくなる。また、第２の拡散阻止膜２８を拡
散終了後に除去するとき、何れの拡散阻止膜１２，２８
もダイシングブレード１８で切断することなく、チップ
の分離を行うことができる。その結果、高解像度の発光
ダイオードアレイチップを高い歩留りで製造することが
可能となる。第２の拡散阻止膜２８は、第１の拡散阻止
膜１２と異なる材質であるため、第１の拡散阻止膜１２
に悪影響を与えることなく選択的にエッチング除去され
る。たとえば、拡散阻止膜２８の材質には、Ｗ，Ｍｏ，
Ｔｉ等の高融点金属や酸化アルミニウム等がある。拡散
阻止膜１２との関連で拡散阻止膜１２の材質を選択する
とき、拡散阻止膜１２の形状等に変化を与えることな
く、高精度に作り込まれた発光ダイオードアレイチップ
が得られる。On the other hand, when the two types of diffusion blocking films 12 and 28 are used, the p-type semiconductor region 1 in the peripheral portion of the chip is used.
The formation of 7 is prevented, and conduction to the substrate 11a is prevented through the crystal defect portion 20 introduced by dicing. Therefore, the light emission output of the endmost light emitting unit 24 is not reduced. When removing the second diffusion barrier film 28 after the diffusion is completed, which diffusion barrier film 12, 28 is to be removed?
Also, the chips can be separated without cutting with the dicing blade 18. As a result, it becomes possible to manufacture a high resolution light emitting diode array chip with a high yield. Since the second diffusion blocking film 28 is made of a material different from that of the first diffusion blocking film 12, the first diffusion blocking film 12 is formed.
Is selectively removed by etching without adversely affecting. For example, the diffusion blocking film 28 may be made of W, Mo,
There are refractory metals such as Ti and aluminum oxide. When the material of the diffusion blocking film 12 is selected in relation to the diffusion blocking film 12, it is possible to obtain a light emitting diode array chip that is built with high precision without changing the shape of the diffusion blocking film 12.
【００１３】[0013]
【実施例】エピタキシャルウエハ１０に、第１の拡散阻
止膜１２となる窒化ケイ素をプラズマＣＶＤによって形
成した後、常法に従って発光部１３及びチップ外周部１
５を形成した。解像度４００ドット／インチの発光ダイ
オードアレイを得るため、一つの発光部１３を一辺３０
μｍのほぼ正方形とし、隣接する発光部１３のピッチを
６３．５μｍに設定した。また、チップには、エピタキ
シャルウエハ１０から切り出した長さ８ｍｍ及び幅０．
５ｍｍの矩形片を使用した。第２の拡散阻止膜２８とな
るタングステン膜をＣＶＤ法によって形成した後、発光
部１３に当る部分の拡散阻止膜２８を除去した。そし
て、エピタキシャル層１１ｂに不純物を熱拡散法で拡散
させ、ｐ型半導体領域１７を設けた。その後、拡散阻止
膜２８を除去し、最端発光部２４，２５を含む個々の発
光部１３に電極１４を形成し、最後にエピタキシャルウ
エハ１０から各チップに切り出した。EXAMPLE A silicon nitride film to be a first diffusion barrier film 12 was formed on an epitaxial wafer 10 by plasma CVD, and then a light emitting portion 13 and a chip outer peripheral portion 1 were formed by a conventional method.
5 was formed. In order to obtain a light emitting diode array having a resolution of 400 dots / inch, one light emitting unit 13 is provided on one side 30
The light emitting portions 13 adjacent to each other had a substantially square shape with a pitch of 63.5 μm. The chip has a length of 8 mm and a width of 0.
A 5 mm square piece was used. After forming a tungsten film to be the second diffusion blocking film 28 by the CVD method, the diffusion blocking film 28 in the portion corresponding to the light emitting portion 13 was removed. Then, impurities are diffused into the epitaxial layer 11b by a thermal diffusion method to provide the p-type semiconductor region 17. After that, the diffusion blocking film 28 was removed, the electrodes 14 were formed on the individual light emitting portions 13 including the outermost light emitting portions 24 and 25, and finally, each chip was cut out from the epitaxial wafer 10.
【００１４】得られたチップの発光出力特性を調査し
た。調査は、４００ドット／インチの発光ダイオードア
レイチップを１００個作製したとき、最端発光部２４，
２５の発光出力が規格値に達しないものを不良として判
定し、不良品の個数、すなわち不良品発生率で評価し
た。調査結果を表１に示す。なお、拡散阻止膜２８の効
果を調査するため、それぞれの実験において拡散阻止膜
２８の厚みを変えた場合の不良品発生率をカウントし
た。また、表１では、第２の拡散阻止膜２８を使用する
ことなく作製した発光ダイオードアレイチップの評価結
果を比較例として併せ示している。The emission output characteristics of the obtained chip were investigated. The investigation was conducted when 100 light emitting diode array chips each having 400 dots / inch were manufactured.
The light emitting output of No. 25, which did not reach the standard value, was determined as defective and evaluated by the number of defective products, that is, the defective product occurrence rate. The survey results are shown in Table 1. In order to investigate the effect of the diffusion blocking film 28, the defective product occurrence rate when the thickness of the diffusion blocking film 28 was changed was counted in each experiment. In addition, Table 1 also shows, as a comparative example, the evaluation results of the light emitting diode array chip manufactured without using the second diffusion blocking film 28.
【００１５】[0015]
【表１】 [Table 1]
【００１６】表１から明らかなように、第２の拡散阻止
膜２８を設けない比較例では、約２０％以上の割合で不
良品が発生していた。これに対し、厚み１０００Åのタ
ングステン膜を拡散阻止膜２８として設けたものでは、
不良品発生率が大幅に低減していた。タングステンの膜
が５０００Å及び１００００Åと厚いものでは、ＲＵＮ
１〜４の何れにおいても不良品の発生が皆無となった。
そして、得られた発光ダイオードアレイチップは、図９
に示すようにアレイ最端部における発光出力の低下がみ
られず、優れた特性をもつものであった。As is clear from Table 1, in the comparative example in which the second diffusion barrier film 28 was not provided, defective products were generated at a rate of about 20% or more. On the other hand, in the case where a 1000 Å thick tungsten film is provided as the diffusion blocking film 28,
The defective product rate was significantly reduced. If the tungsten film is as thick as 5000Å and 10000Å, RUN
In all of 1 to 4, no defective products were generated.
The obtained LED array chip is shown in FIG.
As shown in (1), the emission output at the end of the array was not reduced, and the device had excellent characteristics.
【００１７】[0017]
【発明の効果】以上に説明したように、本発明において
は、不純物拡散用の窓部が形成された拡散阻止膜と材質
が異なる別個の拡散阻止膜をチップ外周部に設けること
によって、熱拡散工程時にｐ型半導体領域がチップ外周
部に形成されることを抑制している。そのため、ダイシ
ングによってチップの端面に導入された結晶欠陥部を介
して最端発光部が基板に導通することがなくなる。その
結果、発光部のピッチを小さくした場合にあってもアレ
イ最端部における発光出力の低下がない。また、ダイシ
ング時に何れの拡散阻止膜をもダイシングブレードで切
断することなく個々のチップに分離することができるた
め、解像度を上げるために高集積密度で発光部を形成し
た発光ダイオードアレイチップが高い歩留りで得られ
る。As described above, according to the present invention, a diffusion barrier film having a different material from that of the diffusion barrier film having the window for impurity diffusion is provided on the outer peripheral portion of the chip, so that thermal diffusion can be achieved. It is possible to prevent the p-type semiconductor region from being formed on the outer periphery of the chip during the process. Therefore, the endmost light emitting portion will not be electrically connected to the substrate through the crystal defect portion introduced into the end surface of the chip by dicing. As a result, even when the pitch of the light emitting portions is reduced, the light emission output at the end of the array does not decrease. In addition, since any diffusion blocking film can be separated into individual chips without cutting with a dicing blade during dicing, the light emitting diode array chip with the light emitting portion formed with high integration density to improve resolution has a high yield. Can be obtained at.
【図１】 従来の発光ダイオードアレイチップの平面図
（ａ）及び断面図（ｂ）FIG. 1 is a plan view (a) and a sectional view (b) of a conventional light emitting diode array chip.
【図２】 従来の発光ダイオードアレイチップの発光出
力特性FIG. 2 Light emission output characteristics of a conventional light emitting diode array chip
【図３】 従来の発光ダイオードアレイチップの横断面
図FIG. 3 is a cross-sectional view of a conventional light emitting diode array chip.
【図４】 ウエハ上のチップ配列状態FIG. 4 Chip arrangement on a wafer
【図５】 発光ダイオードアレイチップの実装状態FIG. 5: Mounting state of light emitting diode array chip
【図６】 高解像度発光ダイオードアレイチップの問題
を説明する図FIG. 6 is a diagram illustrating a problem of a high resolution light emitting diode array chip.
【図７】 本発明に従った発光ダイオードアレイチップ
の横断面図FIG. 7 is a cross-sectional view of a light emitting diode array chip according to the present invention.
【図８】 張出し部を付けた拡散阻止膜FIG. 8: Diffusion blocking film with overhang
【図９】 本発明実施例で作製された発光ダイオードア
レイチップの発光出力特性FIG. 9: Light emission output characteristics of the light emitting diode array chip manufactured in the example of the present invention
１０ エピタキシャルウエハ １１ａ 基板 １１ｂ エピタキシャル層 １２ 第１の拡散阻止
膜 １３ 発光部 １４ 電極 １５ チップ外周部 １７ チップ外周部に形成されるｐ型半導体領域 ２４，２５ 最端発光部 ２６，２７ チップ端
部 ２８ 第２の拡散阻止膜10 Epitaxial Wafer 11a Substrate 11b Epitaxial Layer 12 First Diffusion Blocking Film 13 Light Emitting Portion 14 Electrode 15 Chip Outer Edge 17 P-Type Semiconductor Region Formed on Chip Outer Edge 24, 25 End Light Emitting Edge 26, 27 Chip Edge 28 Second diffusion barrier film
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.5 識別記号 庁内整理番号 ＦＩ 技術表示箇所 Ｂ４３Ｌ 13/00 Ｊ 8705−2Ｃ Ｈ０１Ｌ 21/78 Ｌ 8617−4Ｍ ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 5 Identification code Internal reference number FI Technical display location B43L 13/00 J 8705-2C H01L 21/78 L 8617-4M
Claims (1)
タキシャルウエハの表面を覆うと共に、最端発光部が形
成される前記エピタキシャルウエハのチップ周辺部に前
記第１の拡散阻止膜とは材質が異なる第２の拡散阻止膜
を設け、前記拡散窓を介してエピタキシャル層に不純物
を拡散させ発光部となるｐ型半導体領域を形成すること
を特徴とする発光ダイオードアレイチップの製造方法。1. A first diffusion barrier film covering a surface of an epitaxial wafer with a first diffusion barrier film having a diffusion window, wherein the first diffusion barrier film is provided around a chip peripheral portion of the epitaxial wafer where an endmost light emitting portion is formed. A method for manufacturing a light emitting diode array chip, comprising providing a second diffusion blocking film made of a different material, and diffusing impurities into the epitaxial layer through the diffusion window to form a p-type semiconductor region serving as a light emitting portion.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25895292A JPH0685318A (en) | 1992-09-02 | 1992-09-02 | Manufacture of light emitting diode array chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25895292A JPH0685318A (en) | 1992-09-02 | 1992-09-02 | Manufacture of light emitting diode array chip |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0685318A true JPH0685318A (en) | 1994-03-25 |
Family
ID=17327312
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP25895292A Withdrawn JPH0685318A (en) | 1992-09-02 | 1992-09-02 | Manufacture of light emitting diode array chip |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0685318A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0871226A2 (en) * | 1997-04-11 | 1998-10-14 | Oki Electric Industry Co., Ltd. | Method of manufacturing light-receiving/emitting diode array chip |
| JP2009290242A (en) * | 2002-11-11 | 2009-12-10 | Oki Data Corp | Semiconductor device, optical print head, and image forming apparatus |
-
1992
- 1992-09-02 JP JP25895292A patent/JPH0685318A/en not_active Withdrawn
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0871226A2 (en) * | 1997-04-11 | 1998-10-14 | Oki Electric Industry Co., Ltd. | Method of manufacturing light-receiving/emitting diode array chip |
| EP0871226A3 (en) * | 1997-04-11 | 1999-05-19 | Oki Electric Industry Co., Ltd. | Method of manufacturing light-receiving/emitting diode array chip |
| US5972729A (en) * | 1997-04-11 | 1999-10-26 | Oki Electric Industry Co., Ltd. | Method of manufacturing light-receiving/emitting diode array chip |
| JP2009290242A (en) * | 2002-11-11 | 2009-12-10 | Oki Data Corp | Semiconductor device, optical print head, and image forming apparatus |
| US8395159B2 (en) | 2002-11-11 | 2013-03-12 | Oki Data Corporation | Semiconductor apparatus with thin semiconductor film |
| US8445935B2 (en) | 2002-11-11 | 2013-05-21 | Oki Data Corporation | Semiconductor apparatus with thin semiconductor film |
| US8816384B2 (en) | 2002-11-11 | 2014-08-26 | Oki Data Corporation | Semiconductor apparatus with thin semiconductor film |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A300 | Withdrawal of application because of no request for examination |
Free format text: JAPANESE INTERMEDIATE CODE: A300 Effective date: 19991102 |