JPH0683152B2 - Multipath detection circuit - Google Patents
Multipath detection circuitInfo
- Publication number
- JPH0683152B2 JPH0683152B2 JP63245012A JP24501288A JPH0683152B2 JP H0683152 B2 JPH0683152 B2 JP H0683152B2 JP 63245012 A JP63245012 A JP 63245012A JP 24501288 A JP24501288 A JP 24501288A JP H0683152 B2 JPH0683152 B2 JP H0683152B2
- Authority
- JP
- Japan
- Prior art keywords
- signal
- level
- control signal
- pass filter
- detection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Monitoring And Testing Of Transmission In General (AREA)
- Circuits Of Receivers In General (AREA)
- Stereo-Broadcasting Methods (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明はマルチパス検出回路に関し、特に主として車載
に供されるFMラジオ受信機等のマルチパス検出回路に関
する。Description: TECHNICAL FIELD The present invention relates to a multipath detection circuit, and more particularly to a multipath detection circuit for an FM radio receiver or the like which is mainly mounted on a vehicle.
従来、この種のマルチパス検出回路は、中間周波信号を
整流してなる信号強度検出信号の交流成分をさらに増
幅，整流することにより、マルチパス妨害の有無を検出
する検出信号を発生していた。Conventionally, this type of multipath detection circuit has generated a detection signal for detecting the presence or absence of multipath interference by further amplifying and rectifying the AC component of the signal strength detection signal obtained by rectifying the intermediate frequency signal. .
上述した従来のマルチパス検出回路は、中間周波信号を
整流してこの交流成分をさらに増幅，整流し検出信号と
して出力する構成となっているので、弱電界において
は、この交流成分が所望のマルチパス妨害による成分で
はなく、ホワイトノイズが支配的となる。この結果、こ
の検出信号によってFMラジオ受信機の各種コントロール
を行なうと色々な不都合が生ずるという欠点がある。The conventional multipath detection circuit described above is configured to rectify the intermediate frequency signal and further amplify and rectify this AC component to output it as a detection signal. Therefore, in a weak electric field, this AC component is the desired multipath component. White noise dominates, not the component due to path interference. As a result, there is a drawback that various inconveniences occur when various controls of the FM radio receiver are performed by the detection signal.
例えば、この検出信号でステレオ復調器の分離度調整を
自動的に制御する場合には、本来のマルチパス妨害によ
って生ずる交流成分と、ホワイトノイズによって生ずる
交流成分との区別がつかない為、中電界以上の信号レベ
ルのときであって、しかもマルチパス妨害が発生した場
合だけ前記分離度を低下させて音声信号のSN比を向上さ
せようとしても、前述のように、ホワイトノイズによっ
てマルチパス妨害がなくても弱電界で同様に期待しない
分離度低下を招くという不都合が生ずる。For example, in the case of automatically controlling the separation degree adjustment of the stereo demodulator with this detection signal, it is impossible to distinguish between the AC component caused by the original multipath interference and the AC component caused by white noise. At the above signal levels, and even when trying to improve the SN ratio of the audio signal by lowering the separation degree only when multipath interference occurs, as mentioned above, white noise causes multipath interference. Even if it does not exist, the inconvenience of causing a similarly undesired reduction in separation due to a weak electric field occurs.
本発明の目的は、ホワイトノイズの影響を受けることな
く適確にマルチパス妨害を検出することができ、検出信
号により制御される機能に不都合が発生しないマルチパ
ス検出回路を提供することにある。It is an object of the present invention to provide a multipath detection circuit that can detect multipath interference accurately without being affected by white noise and that does not cause any inconvenience in the function controlled by the detection signal.
本発明のマルチパス検出回路は、第１の入力端にパイロ
ット信号を含むコンポジット信号を入力し第２の入力端
に分周信号を入力してこれら信号の位相比較をする位相
比較器と、この位相比較器の出力信号の高周波成分を除
去する低域フィルタと、この低域フィルタの出力電圧に
応じて所定の周波数で発振する電圧制御発振器と、この
電圧制御発振器の出力信号を分周して前記分周信号を出
力する分周器とを備え、前記パイロット信号が所定のレ
ベルより大きいときにこのパイロット信号にロック状態
となるPLL回路と、このPLL回路がロック状態及び非ロッ
ク状態にあるときにそれぞれ対応して第１及び第２のレ
ベルの制御信号を出力する制御信号発生部と、前記制御
信号が第１のレベルにあるとき動作状態となり前記低域
フィルタの出力電圧を増幅して整流し検出信号を出力
し、前記制御信号が第２のレベルにあるとき非動作状態
となる検出部とを有している。The multipath detection circuit of the present invention includes a phase comparator for inputting a composite signal including a pilot signal to a first input end and a divided signal to a second input end for phase comparison of these signals, A low-pass filter that removes high-frequency components of the output signal of the phase comparator, a voltage-controlled oscillator that oscillates at a predetermined frequency according to the output voltage of this low-pass filter, and the output signal of this voltage-controlled oscillator is frequency-divided. A frequency divider that outputs the frequency-divided signal, a PLL circuit that is locked to the pilot signal when the pilot signal is higher than a predetermined level, and a PLL circuit that is in a locked state and an unlocked state. And a control signal generator for outputting control signals of first and second levels, respectively, and an operating state when the control signal is at the first level and an output voltage of the low-pass filter. Amplifies and outputs the rectified detection signal, the control signal and a detection portion serving as a non-operating state when in the second level.
次に、本発明の実施例について図面を参照して説明す
る。Next, embodiments of the present invention will be described with reference to the drawings.
第１図は本発明の一実施例を示すブロック図である。FIG. 1 is a block diagram showing an embodiment of the present invention.
PLL回路１は、第１の入力端にパイロット信号を含むコ
ンポジット信号INを入力し第２の入力端に第２の分周信
号V2を入力してこれら信号の位相比較をする位相比較器
11と、この位相比較器11の出力信号の高周波成分を除去
する低域フィルタ12と、この低域フィルタの電圧を増幅
する増幅器13と、この増幅器13の出力電圧に応じた周波
数で発振する電圧制御発振器14と、この電圧制御発振器
14の出力信号を分周し第１の分周信号V1を出力する第１
の分周器15と、この第１の分周信号V1を更に分周し第２
の分周信号V2を出力する第２の分周器16とを備え、コン
ポジット信号INのパイロット信号が所定のレベルより大
きいときにこのパイロット信号にロック状態となる。The PLL circuit 1 is a phase comparator for inputting a composite signal IN including a pilot signal to a first input terminal and a second divided signal V 2 to a second input terminal to compare the phases of these signals.
11, a low-pass filter 12 that removes high-frequency components of the output signal of the phase comparator 11, an amplifier 13 that amplifies the voltage of the low-pass filter, and a voltage that oscillates at a frequency according to the output voltage of the amplifier 13. Controlled oscillator 14 and this voltage controlled oscillator
First outputting the divided signal V 1 output signal by dividing the first 14
Frequency divider 15 and the first frequency division signal V 1
And a second frequency divider 16 for outputting the frequency-divided signal V 2 of the composite signal IN, and when the pilot signal of the composite signal IN is higher than a predetermined level, it is locked to this pilot signal.
制御信号発生部２は、第１の入力端にコンポジット信号
INを入力し、第２の入力端に第２の分周信号V2と位相が
90゜異なる第１の分周信号V1を入力して同期検波する同
期検波器21を備え、PLL回路１がロック状態にあるとき
第１のレベル，非ロック状態にあるとき第２のレベルの
制御信号VCを出力する。The control signal generator 2 has a composite signal at the first input end.
IN is input and the phase is the same as the second divided signal V 2 at the second input end.
It is provided with a synchronous detector 21 for synchronously detecting by inputting a first frequency-divided signal V 1 different by 90 °. When the PLL circuit 1 is in a locked state, it has a first level, and when it is in an unlocked state, it has a second level. Outputs control signal V C.
検出部３は、増幅器31と、この増幅器31の出力信号を整
流する整流回路32とを備え、制御信号VCが第１のレベル
のとき動作状態となり、低域フィルタ12の出力電圧を増
幅，整流して検出信号VDを出力し、制御信号VCが第２の
レベルのとき非動作状態となる。The detection unit 3 includes an amplifier 31 and a rectifier circuit 32 that rectifies the output signal of the amplifier 31, and is in an operating state when the control signal V C is at the first level to amplify the output voltage of the low-pass filter 12, It rectifies and outputs the detection signal V D , and when the control signal V C is at the second level, it becomes inactive.
マルチパス妨害がない状態にあり、かつパイロット信号
が所定のレベル以上ある状態においては、パイロット信
号と第２の分周信号V2とは一定の関係を保ってロックし
ており、従って低域フイルタ12の出力電圧は零レベルと
なり、かつ同期検波器21に所定のレベルの出力電圧
（VC）が発生するので検出部３は動作状態となり、検出
部３から出力される検出信号VDも零レベルとなる。In the state where there is no multipath interference and the pilot signal is above a predetermined level, the pilot signal and the second frequency division signal V 2 are locked in a fixed relationship, and therefore the low-pass filter is locked. The output voltage of 12 becomes zero level, and the output voltage (V C ) of a predetermined level is generated in the synchronous detector 21, so that the detection unit 3 is in the operating state and the detection signal V D output from the detection unit 3 is also zero. It becomes a level.
また、マルチパス妨害が有る状態でかつパイロット信号
が所定のレベル以上にある状態では、パイロット信号は
位相変調を受けた状態となっており、低域フィルタ12の
出力電圧は零レベルから変化した値となってロックして
いる。従って同期検波器21から所定のレベルの出力電圧
（VD）が検出部３に供給されて検出器３は動作状態とな
り、検出部３から出力される検出信号VDは零レベルから
変化した値となり、マルチパス妨害が有ることを検出で
きる。Further, in the state where there is multipath interference and the pilot signal is above a predetermined level, the pilot signal is in a state of being phase-modulated, and the output voltage of the low-pass filter 12 is a value changed from zero level. Has locked. Therefore, the output voltage (V D ) of a predetermined level is supplied from the synchronous detector 21 to the detection unit 3, the detector 3 is in the operating state, and the detection signal V D output from the detection unit 3 is a value changed from zero level. Therefore, it can be detected that there is multipath interference.
一方、パイロット信号が所定のレベルより小さい弱電界
の状態では、PLL回路１は非ロック状態となるので、同
器検波器21の出力電圧（VC）は低く、検出部３を動作さ
せることができない。従って、従来のような弱電界にお
けるホワイトノイズによるマルチパス妨害の誤検出を防
止することができる。On the other hand, when the pilot signal has a weak electric field smaller than the predetermined level, the PLL circuit 1 is unlocked, so that the output voltage (V C ) of the detector detector 21 is low and the detector 3 can be operated. Can not. Therefore, it is possible to prevent erroneous detection of multipath interference due to white noise in a weak electric field as in the related art.
以上説明したように本発明は、パイロット信号が所定の
レベルより大きいときにはこのパイロット信号にロック
するPLL回路を設け、このPLL回路がロック状態のときの
みこのPLL回路の低域フィルタの出力電圧を増幅して整
流し検出信号を出力する構成とすることにより、弱電界
におけるホワイトノイズの影響を受けることなく適確に
マルチパス妨害を検出することができ、従って検出信号
により制御される機能に不都合が発生しないようにする
ことができる効果がある。As described above, the present invention provides the PLL circuit that locks to the pilot signal when the pilot signal is higher than the predetermined level, and amplifies the output voltage of the low-pass filter of the PLL circuit only when the PLL circuit is in the locked state. By rectifying and outputting the detection signal, the multipath interference can be accurately detected without being affected by white noise in the weak electric field, and thus the function controlled by the detection signal is inconvenient. There is an effect that can be prevented from occurring.
第１図は本発明の一実施例を示すブロック図である。 １……PLL回路、２……制御信号発生部、３……検出
部、11……位相比較器、12……低域フィルタ、13……増
幅器、14……電圧制御発振器、15,16……分周器、21…
…周期検波器、31……増幅器、32……整流回路。FIG. 1 is a block diagram showing an embodiment of the present invention. 1 ... PLL circuit, 2 ... control signal generator, 3 ... detector, 11 ... phase comparator, 12 ... low-pass filter, 13 ... amplifier, 14 ... voltage-controlled oscillator, 15,16 ... … Divider, 21…
… Period detector, 31 …… Amplifier, 32 …… Rectifier circuit.
Claims (1)
ポジット信号を入力し第２の入力端に分周信号を入力し
てこれら信号の位相比較をする位相比較器と、この位相
比較器の出力信号の高周波成分を除去する低域フィルタ
と、この低域フィルタの出力電圧に応じて所定の周波数
で発振する電圧制御発振器と、この電圧制御発振器の出
力信号を分周して前記分周信号を出力する分周器とを備
え、前記パイロット信号が所定のレベルより大きいとき
にこのパイロット信号にロック状態となるPLL回路と、
このPLL回路がロック状態及び非ロック状態にあるとき
にそれぞれ対応して第１及び第２のレベルの制御信号を
出力する制御信号発生部と、前記制御信号が第１のレベ
ルにあるとき動作状態となり前記低域フィルタの出力電
圧を増幅して整流し検出信号を出力し、前記制御信号が
第２のレベルにあるとき非動作状態となる検出部とを有
することを特徴とするマルチパス検出回路。1. A phase comparator for inputting a composite signal containing a pilot signal to a first input terminal and a divided signal to a second input terminal for phase comparison of these signals, and a phase comparator of this phase comparator. A low-pass filter that removes high-frequency components of the output signal, a voltage-controlled oscillator that oscillates at a predetermined frequency according to the output voltage of the low-pass filter, and the divided signal by dividing the output signal of the voltage-controlled oscillator. And a frequency divider that outputs a PLL circuit that is locked to the pilot signal when the pilot signal is higher than a predetermined level,
A control signal generator that outputs a control signal at a first level and a control signal at a second level when the PLL circuit is in a locked state and an unlocked state, respectively, and an operating state when the control signal is at the first level. A multi-pass detection circuit, comprising: a detection unit that amplifies and rectifies the output voltage of the low-pass filter, outputs a detection signal, and is in a non-operation state when the control signal is at the second level. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63245012A JPH0683152B2 (en) | 1988-09-28 | 1988-09-28 | Multipath detection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63245012A JPH0683152B2 (en) | 1988-09-28 | 1988-09-28 | Multipath detection circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0292033A JPH0292033A (en) | 1990-03-30 |
| JPH0683152B2 true JPH0683152B2 (en) | 1994-10-19 |
Family
ID=17127264
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63245012A Expired - Lifetime JPH0683152B2 (en) | 1988-09-28 | 1988-09-28 | Multipath detection circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0683152B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH08139632A (en) * | 1994-11-15 | 1996-05-31 | Uniden Corp | Narrow band communication equipment |
-
1988
- 1988-09-28 JP JP63245012A patent/JPH0683152B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0292033A (en) | 1990-03-30 |
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