JPH0681226B2 - Contact image scanner - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a contact image scanner, and more particularly to signal processing of the contact CCD image sensor.

(Prior Art) Conventionally, as a technology in such a field, for example, “How to Select and Use an Image Sensor” by Mitsuo Oshima, 1985, 1
Published on the 25th of the month, pages 41-49, 198-200, published by Nikkan Kogyo Shimbun.

As shown in this document, as a basic operation of this type of device, the received light data in which the charges are accumulated in the photodiode group during the transfer pulse φ _T passes through the photogate and the transfer gate, and is then driven by the clock pulse φ.
It was transferred from a CCD (Charge Coupled Device) analog register, shaped by a preamplifier with a reset pulse φ _R , and output.

Furthermore, there are the following three types of CCD image sensor configurations.

FIG. 4 to FIG. 9 show those block diagrams and time charts.

In FIGS. 4 and 5, 1 is an input terminal for a transfer pulse (hereinafter referred to as φ _T ), A is a signal line for the φ _T , 2 is an input terminal for a clock pulse (hereinafter referred to as φ), and B is Is a signal line of φ, 3 is a reset pulse (hereinafter,
(notated as φ _R ), C is the φ _R signal line, D is the output data signal line, and 4 is the output data output terminal.

In this figure, the data received by the photodiode 5 passes through the photogate 6 and is transferred to the transfer gate 7
At, the signal is output to the CCD analog register 8 after being time-limited by φ _T. In other words, only the data received within the time from φ _T to the next φ _T can be accumulated in the photodiode 5 and serve as the light receiving sensor output. These light receiving sensor outputs are output in parallel to the CCD analog register 8 between each bit.

Further, it is serially transferred by φ of the CCD analog register 8 and output to the preamplifier 9. In the preamplifier 9, the data corresponding to the bits is sampled by φ _R and output from the output terminal 4. The output data at this time is output at the fall of φ and reset at the rise of φ _R , as shown in FIG.

FIGS. 6 and 7 show the photodiode 5 divided into an odd-numbered column and an even-numbered column, each of which transfers a photogate 6, a transfer gate 7, and a CCD analog register 8 to reach an output gate 10. Output of each photosensor is output gate
The signals are multiplexed at 10 and sampled at the preamplifier 9. Incidentally, in FIGS. 6 and 7, ▲ 2 ^- _o ▼, _2E
Is an input terminal of φ, and ▲ B ^- _o ▼, _BE are signal lines of φ.

The basic operation of data transfer is the same as that described with reference to FIGS. 4 and 5. In addition, this system is a CCD of around 2K bits.
Many sensors are used, and the transfer time can be halved compared to the CCD sensors described in FIGS. 4 and 5.

Similar to FIGS. 6 and 7, FIGS. 8 and 9 show the received light data divided into odd columns and even columns. However, in this system, the output gate is not provided and the preamplifier 9 is independently provided to provide a two-output system.
As in the figure, the transfer time is shortened and the pulse width of the output signal is lengthened. Note that in Figure 8 and Figure ^{_{9, ▲ 3 - o ▼, 3}} E denotes an input terminal for ^{_{φ R, ▲ C - o ▼}} , C E is the signal line of the phi _R, ▲ D
^- _o ▼, D _E output _{^{data, ▲ 4 - o ▼, 4}} E is an output terminal of the output data.

Hereinafter, the method shown in FIGS. 4 and 5 will be described as a single output method, the method shown in FIGS. 6 and 7 as a multiple output method, and the method shown in FIGS. 8 and 9 as a composite output method.

Further, image scanners using these CCD image sensors can be roughly classified into a reduction type image scanner and a contact type image scanner. The reduction type image scanner reads the reflection amount of the light source, which is opposed to the read original, with a CCD image sensor using a minute photocell through a reduction optical system lens. The reading resolution is one to one.

Next, the contact type image scanner which is the object of the present invention will be described with reference to FIG. 10 and FIG.

The LED light source 11 illuminates the original 12 in a line. The reflected light is focused by the SELFOC lens array (SLA) 13 in accordance with the original image and is received by the photocell of the CCD image sensor 14 provided on the substrate 15. CC at this time
The main scanning size of the D image sensor is determined by the size of the original, and multiple sizes are required. The driving method is determined according to the type of CCD image sensor, as shown in FIGS. 4 to 9.

(Problems to be Solved by the Invention) However, in the contact type image scanner in which a plurality of CCD image sensors are arranged as described above, in each of the driving methods described above, it is not possible to drive each independently. The signal processing scale of the signal was large and complicated, and the operation time was slow, which was not technically satisfactory.

The present invention eliminates the above problems and provides a contact-type image scanner in which the signal processing scale is reduced and simplified by simply controlling the clock of the CCD image sensor and the operation time is fast. It is intended.

(Means for Solving Problems) In order to solve the above problems, the present invention provides a plurality of CCDs.
In a contact image scanner in which image sensors are arranged in a line, (a) a counter to which a start pulse φ _S is input, and a clock controlled by the counter and individually output to the plurality of CCD image sensors A memory in which the pulses φ _{1 to} φ ₄ are stored in advance, an output signal from the memory and a clock pulse φ are input, and the plurality of CCs are synchronized with the start pulse φ _S.
A latch circuit that outputs the transfer pulse φ _T commonly input to the D image sensor and the clock pulses φ _{1 to} φ ₄ and the clock pulse φ are input and commonly input to the plurality of CCD image sensors. And a pulse shaping circuit for outputting a reset pulse φ _R , wherein the repetition time of the transfer pulse φ _T is the charge accumulation time of the photocell and one line main scanning time, and the clock pulse φ ₁ is the transfer pulse φ _T. The head pulse is output in synchronization, the clock pulse φ ₂ outputs a head pulse whose phase is delayed by 180 ° with respect to the clock pulse φ _1, and the clock pulse φ ₃ synchronizes with the final data of the clock pulse φ _1. And outputs the first pulse, and the clock pulse φ ₄ is the same as the clock pulses φ ₃ and 180.
° Sequencer that outputs the first pulse whose phase is delayed,
(B) A sensor amplifier for amplifying the individual output signals of the CCD image sensor, and (c) an analog adder for analogically combining the outputs from the sensor amplifier are provided.

(Operation) According to the present invention, in the contact-type image scanner, by individually controlling the clock pulses of a plurality of CCD image sensors, the output data of those CCD image sensors overlap in the output of the analog adder. It is possible to combine them without the need for time loss. Further, since the sequencer directly controls the clock pulse to operate each CCD image sensor, it is possible to obtain an analog signal with a high S / N ratio by adding simple analog signals.

(Example) Hereinafter, the Example of this invention is described in detail, referring drawings.

FIG. 1 is a block diagram of a contact type image scanner showing an embodiment of the present invention.

As shown in the figure, the sequencer 19 includes a counter 19a to which a start pulse φ _S is input, and clock pulses φ _{1 to} φ controlled by the counter 19a and individually output to the plurality of CCD image sensors. _4, a ROM (Read Only Memory) 19b in which is stored in advance, an output signal from the ROM 19b and a clock pulse φ are input, are synchronized with the start pulse φ _S , and are commonly input to a plurality of CCD image sensors. Transfer pulse φ _T ,
And a latch circuit 19c for outputting the clock pulses φ _{1 to} φ ₄ and the clock pulse φ, and the plurality of C
Reset pulse φ commonly input to CD image sensors
_And a pulse shaping circuit 19d for outputting _R.

That is, the sequencer 19 receives a clock pulse φ from the outside through the input terminal 21 and the signal line E and a start pulse φ _S through the input terminal 20 and the signal line F, and the output side of the sequencer 19 Multiple CCD image sensors 14 _-1 to 1
The reset pulse φ _R is output via the signal line G, the transfer pulse φ _T, and the signal line L in common with 4 ₋₄ (512 bits × 4 in this embodiment). The clock pulses phi ₁ to [phi] ₄ via a signal line H to K, each individually connected to the CCD image sensor 14 _-1 to 14 _-4, the output of the CCD image sensor 14 _-1 to 14 _-4 sensor The amplifiers 16 _{-1 to} 16 _-4 are individually connected.

The output of this sensor amplifier is individually connected to the input side of the analog adder 17 via the signal lines M, N, and P, and the analog adder 17 makes a single output. The output of the analog adder 17 becomes an input signal of the A / D converter 18 via the signal line Q and is digitized by the A / D converter 18.

Therefore, first, when a clock pulse φ and a start pulse φ _S aligned from the outside are given, the sequencer 19 generates a transfer pulse φ _T. This transfer pulse φ
The pulse repetition time of _T is CCD image sensor 14 _-1 to 1
This is the charge accumulation time of the photocell of 4 _-4 and the main scanning time of one line, and is output in response to the start pulse φ _S from the outside. Receiving data photocell which is the charge accumulated by a predetermined time, by a transfer pulse phi _T, for input in parallel to the CCD analog register 8, also the clock pulses phi from operation shown in the above-mentioned prior art transfer pulse phi _T after By giving _{1 to} φ ₄ , it becomes possible to send the received light data as a sensor output at a predetermined towing or a predetermined number.

Further, the timing of the sensor output at this time is determined by the clock pulses φ _{1 to} φ _4, so the sensor output timing of each CCD image sensor or a plurality of CCD image sensors.
The sensor output timing of the image sensor can be set arbitrarily. The output of the CCD image sensor 14 _{-1 to} 14 _-4 sensor becomes the input signal of the sensor amplifier 16 _{-1 to} 16 _-4 which faces each other. The sensor outputs amplified by the sensor amplifiers 16 _{-1 to} 16 _-4 are input to the analog adder 17.

Furthermore, since the sensor output is taken out as a single output by the analog adder 17 and becomes the input signal of the A / D converter 18, it is not desirable that these individual sensor outputs overlap. As described above, it is easy to avoid overlapping of sensor outputs by controlling the clock pulses φ _{1 to} φ ₄ at a predetermined timing. Further, as described above, the circuit configuration of the analog adder 17 is simple, and good results can be obtained by using any of the circuits shown in FIGS. 2 (a) to (c). it can. That is, the output of the sensor amplifier is connected to the load input terminal of the amplifier 41 as shown in FIG. 2 (a), or the output of the sensor amplifier is connected to the anode of the diode 42 as shown in FIG. 2 (b). Connection to the side, or as shown in Fig. 2 (c),
The output of the sensor amplifier can be connected to the base of each NPN transistor 43, and the output signal can be taken out from the emitter side of the transistor 43. Sequencer
Reference numeral 19 provides a clock pulse φ, a reset pulse φ _R , and a transfer pulse φ _T to the CCD image sensors 14 _{-1 to} 14 _-4 .

Next, the operation of this contact image scanner will be described with reference to the time chart of FIG.

In this embodiment, the single output method (the fourth
A case where four CCD image sensors (see FIGS. 5 and 5) are used will be described.

First, at time t from the transfer pulse φ _T 101 to the transfer pulse φ _T 102, received light data is accumulated in the photocell in the CCD image sensor. That is, until the transfer pulse φ _T 102 is generated and the next transfer pulse φ _T arrives, the sensor output having the charge accumulation time t is sent to the signal lines H to K. Originally, after the transfer pulse φ _T 102 pulse is generated, the head pulse 104 of the clock pulse φ ₁ (CCD image sensor 14 _{-1 to} 14
The possible) In any _-4 but is intended to be the data output, in this embodiment, to the dummy bit and one requires the CCD image sensor 14 _-1 to 14 _-4, as the first data output 105 It is output from the trailing edge of the second pulse 106 to the trailing edge of the reset pulse φ _R. 513 pulses of φ ₁ are input to the _first CCD image sensor 14 _-1 . Here, 512 bits / chip is used, and the D / F (duty factor) at this time is 50%.

Further, 513 clock pulses φ ₂ are input to the second CCD image sensor 14 _-2 . The pulse timing of the clock pulse φ is obtained by delaying the phase of the clock pulse φ ₂ by 180 ° with respect to the clock pulse φ ₁ . In other words, the clock pulse φ ₁ and the clock pulse φ ₂ are such that the output of the analog adder has a dense normal waveform,
Parallel with a relationship of a predetermined phase shift.

Further, similar to the relationship between the first CCD image sensor 14 _-1 and the second CCD image sensor 14 _-2 , the third CCD image sensor 14 _-3 and the fourth CCD image sensor 14 _-4
Sequencer 19 generates clock pulses φ ₃ and φ ₄ . The last pulse of the first CCD image sensor 14 _-1 107
When, as the third of the CCD image sensor 14 _-3 of the leading pulse 108 and a second CCD image sensor 14 _-2 last pulse 109 4
The first pulse 110 of the th CCD image sensor 14 _-4 is generated as a pulse having the same timing.

From the above relationship, the output of each sensor of the output signal lines M, N, and P is as shown in the time chart. When the analog adder 17 makes a single output, the sensor output data becomes an input signal of the A / D converter by the output of the analog adder 17 and can be easily sampled.
The signal input to the A / D converter starts with the head data 111, that is, the head pulse 105 of the first CCD image sensor 14 _-1 , and the following head pulse 112 of the second CCD image sensor 14 _-2 is the second pulse. It is input as a pulse 113 and reaches the final pulse 114 (fourth final pulse 115).

In the embodiment, the example in which the number of CCD image sensors is four has been described, but the same effect can be obtained regardless of the number of CCD image sensors, and the clock pulse φ ₁ to
It is clear from the above description that the array conversion of individual CCD image sensor outputs can be easily performed by controlling φ ₄ at a predetermined timing.

Furthermore, the present invention is particularly effective in a single output type CCD image sensor, but even if a multiple output type CCD image sensor and a multiple output type CCD image sensor are used, it is effective in reducing the operation time. Is.

The present invention is not limited to the above embodiment,
Various modifications are possible based on the spirit of the present invention, and these are not excluded from the scope of the present invention.

(Effects of the Invention) As described in detail above, according to the present invention, in the contact image scanner, at least two clock pulses are controlled while the clock pulses of the plurality of CCD image sensors are individually controlled and the clock timing is shifted. By providing a timing control means capable of simultaneously reading the CCD image sensors in parallel, the output data of those CCD image sensors do not overlap in the output of the analog adder, and the time loss is reduced, It is possible to combine them, and the sequencer directly controls the clock pulse to perform the operation of each CCD image sensor. Therefore, an analog signal with high S / N can be obtained by adding simple analog signals.

Further, although the output data array is somewhat complicated, it is possible to reduce the data processing scale and simplify the signal processing by using a lookup table or the like.

[Brief description of drawings]

FIG. 1 is a block diagram of a contact image scanner showing an embodiment of the present invention, FIGS. 2 (a) to 2 (c) are configuration diagrams of an analog adder of the contact image scanner, and FIG. The operation time chart of the contact image scanner shown in the figure, FIG. 4 is a block diagram of the conventional first CCD image sensor, FIG. 5 is the operation time chart of the image sensor shown in FIG. 4, and FIG. A block diagram of a conventional second CCD image sensor, FIG. 7 is an operation time chart of the image sensor shown in FIG. 6, and FIG. 8 is a conventional third image sensor.
FIG. 9 is a block diagram of a CCD image sensor of FIG. 9, FIG. 9 is an operation time chart of the image sensor shown in FIG. 8, FIG. 10 is a sectional view of a contact type image scanner unit which is an object of the present invention, and FIG. FIG. 3 is a plan view of a CCD image sensor as a target of FIG. 14 _{-1 to} 14 _-4 ... CCD image sensor, 16 _{-1 to} 16 _-4 ... sensor amplifier, 17 ... analog adder, 18 ... A / D converter, 19
… Sequencer, 20… Start pulse φ _S input terminal, 21…
Clock pulse φ input terminal, φ ... Clock pulse (input to sequencer), φ _S ... Start pulse, φ _{1 to} φ ₄ ...
Clock pulse (output from sequencer), φ _T ... Transfer pulse, φ _R ... Reset pulse, E ... Clock pulse φ signal line, F ... Start pulse φ _S signal line, G
... Transfer pulse φ _T signal line, L ... reset pulse φ _R signal line, H to K ... clock pulse φ _{1 to} φ ₄ signal line, M to P ... sensor amplifier output signal line, Q ... analog adder output Signal line.

Claims (1)

[Claims] 1. A contact type image scanner having a plurality of CCD image sensors arranged in a line, wherein: (a) a counter to which a start pulse φ _S is input; and a counter controlled by the counter, Clock pulse φ _{1 to} φ individually output to CCD image sensor
_4, a memory in which the output signal and the clock pulse φ from the memory are stored in advance, the transfer pulse φ _T , which is synchronized with the start pulse φ _S and is commonly input to the plurality of CCD image sensors, And a latch circuit that outputs the clock pulses φ _{1 to} φ ₄ .
A pulse shaping circuit for inputting a clock pulse φ and outputting a reset pulse φ _R commonly input to the plurality of CCD image sensors, and the repetition time of the transfer pulse φ _T is equal to the charge accumulation time of the photocell and 1 The line main scanning time is reached, and the clock pulse φ ₁
Outputs a head pulse in synchronization with the transfer pulse φ _T , the clock pulse φ ₂ outputs a head pulse 180 ° out of phase with the clock pulse φ _1, and the clock pulse φ ₃ outputs the clock pulse φ _3. A sequencer which outputs a head pulse in synchronism with the final data of ₁ and outputs a head pulse in which the clock pulse φ ₄ is 180 ° out of phase with the clock pulse φ _3; and (b) each of the CCD image sensors. A contact image scanner, comprising: a sensor amplifier for amplifying an output signal; and (c) an analog adder for analogically combining outputs from the sensor amplifier.