JPH067990A - Solder material and joining method - Google Patents

Abstract

PURPOSE:To lighten the heat stress applying to a semiconductor tip, to prevent the deviation of positional relation of the members to be joined from generating, and together to shorten the time when the solder material is solidified while keeping the temperature nearby the melting temperature by keeping the interval of the semiconductor tip and the base material after joining in the prescribed value. CONSTITUTION:A semiconductor tip 1 and a lead frame 2a are arranged through the solder material composed of the 1st solder 6 and the 2nd solder 7a, 7b, and the semiconductor tip 1 and the lead frame 2a are joined by applying the temperature lower than the melting point of the 1st solder, higher than the melting point of the 2nd solder 7a, 7b and melting the 2nd solder 7a, 7b. Then, the 2nd solder 7a, 7b is solidified by lowering the heating temperature, or while keeping the initial melting temperature, it is solidified due to the elevation of melting point caused by the change of composition of the 2nd solder 7a, 7b.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solder material and a joining method used for joining a semiconductor chip and a base material, for example.

[0002]

2. Description of the Related Art FIG. 5 is a sectional view showing the structure of a conventional semiconductor device. In FIG. 5, 1 is a semiconductor chip, 2 is a base material such as a lead frame, and 3 is a solder for joining the semiconductor chip 1 and the base material 2. Such a semiconductor device has a solder 3 between the semiconductor chip 1 and the base material 2.
Is held, the solder 3 is heated to a temperature equal to or higher than its melting point, and then cooled to join the semiconductor chip 1 and the base material 2 to each other, which is a so-called solder die bonding method. This type of solder die bonding method is described in, for example, Trikeps Technical Sample Collection No. 76, “Micro Assembly Technology for Semiconductor Devices” (July 57, 1982).
Monthly issue).

[0003]

Since the conventional semiconductor device is bonded as described above, the solder 3 is used at the time of bonding.
Is melted, the distance between the semiconductor chip 1 and the base material 2 after joining becomes 10 to 20 μm, and even if a large amount of solder 3 is supplied in order to increase the distance between the semiconductor chip 1 and the base material 2, Most of them were discharged during melting, and it was difficult to control this interval from the outside. Also,
The gap between the semiconductor chip 1 and the base material 2 becomes small due to the spread of wetting due to melting at the time of joining the solder 3, and when the solder that supplements the gap is supplied, the position of the semiconductor chip 1 is displaced due to the flow of the solder 3 and the subsequent process is performed. It was a problem in the wire bonding process. As described above, there is a problem that it is impossible to stably control the distance between the semiconductor chip 1 and the base material 2 to a predetermined value.

Further, when heat resistance is required for the joint portion in a later step, the solder 3 having a melting point higher than the heat resistant temperature is used. However, the higher the melting point, the higher the joint temperature, and the semiconductor chip 1 The thermal stress due to the difference in thermal expansion of the base material 2 also increases. Especially when the semiconductor chip 1 is a silicon semiconductor chip and the base material 2 is a Cu-based lead frame, the difference in thermal expansion coefficient is as large as 5 times or more. ,
The semiconductor chip 1 was sometimes broken. This phenomenon is particularly remarkable in the case of the semiconductor chip 1 whose one side has a size of 3 mm or more. Further, when a compound semiconductor is used for the semiconductor chip 1, it is mechanically weaker than a silicon semiconductor, so that even if the difference in the coefficient of thermal expansion between the semiconductor chip 1 and the base material 2 is small, the semiconductor chip 1 There is a problem that it is extremely difficult to die-bond them by soldering them.

As a method for solving the above problems, there is a solder material and a joining method described in Japanese Patent Application No. 3-004832. FIG. 6 is a sectional view showing the structure of the semiconductor device described in Japanese Patent Application No. 3-004832. In FIG. 6, 1 is a silicon-based semiconductor chip, 2 is a base material such as a lead frame made of a Cu-based alloy, and 4 is a composition of 95Pb-5S.
n is a high melting point first solder having a thickness of 50 μm and 5a and 5b have a composition of 63Sn-37Pb formed on both surfaces of the first solder.
The second solder has a thickness of 10 μm.

In the joining method according to the invention of Japanese Patent Application No. 3-004832, the semiconductor chip 1 and the base material 2 are secondly bonded on both sides.
The first solder 4 on which the solder 5a, 5b is formed is sandwiched and heated by a heater or the like to a temperature equal to or higher than the melting point of the second solder 5a, 5b and lower than the melting point of the first solder 4, for example, 200 ° C.
Only the second solders 5a and 5b are melted. Then, the temperature is lowered to solidify the second solders 5a and 5b. Or the second
The solder 5a, 5b is solidified by keeping it at 200 ° C. for melting. When the temperature is kept at 200 ° C. in this way, Sn atoms diffuse from the second solders 5a and 5b to the first solder 4 and the concentration of Sn in the second solders 5a and 5b lowers. The freezing point of the solders 5a and 5b rises, whereby the second solders 5a and 5b are solidified and fixed. At this time, since the first solder 4 is hardly melted, the first solder 4 is not discharged or deformed, and is kept at the initial thickness, and the semiconductor chip 1 and the base material 2 are kept at a predetermined distance. Be drunk

In this bonding method, the thermal stress acting on the semiconductor chip 1 can be relaxed by keeping the distance between the semiconductor chip 1 and the base material 2 at a predetermined value.
After heating to 00 ° C. to melt only the second solders 5a and 5b, the Sn atoms are held at that temperature to keep the Sn atoms in the second solders 5a and 5b.
From the first solder 4 to Sn of the second solder 5a, 5b
When the solidification point of the second solders 5a and 5b is raised by lowering the concentration to solidify the second solders 5a and 5b, since the thickness thereof is 10 μm, it takes a lot of time to diffuse Sn atoms. There was a problem.

The present invention has been made in order to solve the above-mentioned problems, and the thermal stress acting on the semiconductor chip is maintained by keeping the distance between the semiconductor chip and the base material after bonding at a predetermined value. It is an object of the present invention to alleviate the above and prevent the positional relationship of the members to be joined from deviating, and to shorten the time when the solder material is solidified while the temperature is maintained near the melting temperature.

[0009]

The solder of the present invention is the first
And a material having a melting point lower than that of the first solder or a material that reacts with the first solder to form an alloy having a melting point lower than that of the first solder, and is placed on both sides of the first solder. And a second solder having a thickness of 1 μm or more and less than 5 μm. In addition, the bonding method of the present invention includes a material having a melting point lower than that of the first solder on both surfaces of the first solder or the first solder.
A solder material formed by arranging a second solder having a thickness of 1 μm or more and less than 5 μm, which is made of a material that reacts with the solder of (1) to generate an alloy having a melting point lower than that of the first solder, and is sandwiched between the members to be joined. Only, by heating to a temperature above the melting point of the second solder or alloy and below the melting point of the first solder to melt the second solder or alloy and then cool or keep it near the melting temperature. It is characterized in that the portions to be joined are joined together.

[0010]

According to the present invention, most of the first solder is
Since the solid phase is maintained as it is during heat bonding, the distance between the materials to be bonded can be controlled to a predetermined thickness, and the stress acting on the materials to be bonded after bonding can be relieved. The positional relationship of the members does not shift.
In addition, since the thickness of the second solder is thin, the speed of diffusing the component that lowers the freezing point of the second solder from the second solder to the first solder is faster, and the freezing point of the second solder is increased. The speed also increases and the time for solidifying the second solder becomes shorter.

[0011]

【Example】

(Embodiment 1) An embodiment of the present invention will be described below with reference to the drawings. 1 is a sectional view showing the structure of a semiconductor device according to an embodiment of the present invention. In FIG. 1, 6 is a composition of 95Pb-5Sn and a high melting point first solder having a thickness of 50 μm, and 7a and 7b are compositions of 63Sn-37Pb and a thickness of 3 μm formed by plating on both surfaces of the first solder 6. The second solder is the same as that shown in FIG. The bonding surface of the semiconductor chip 1 is metallized.

Here, a method of joining the semiconductor device shown in FIG. 1 will be described. First, the semiconductor chip 1 and the lead frame 2
a and a solder material composed of the first solder 6 and the second solders 7a and 7b are sandwiched and overlapped, and this is higher than or equal to the melting points of the second solders 7a and 7b in a reducing atmosphere and the melting point of the first solder 6 The second temperature by heating to the following temperature of 200 ℃ with a heater
The solder 7a, 7b is melted. Here, heating in the reducing atmosphere is performed by the first solder 6 and the second solders 7a and 7b.
This is to prevent oxidation and may be performed in an atmosphere of an inert gas such as argon or in vacuum. After that, the temperature is lowered to solidify the second solder 7a, 7b, and the semiconductor chip 1 and the lead frame 2a are joined. At the time of heating for this bonding, the first solder is hardly melted, so that it is not discharged or deformed, and the initial thickness before the heat treatment is maintained. As a result, the semiconductor chip 1
The space between the lead frame 2a and the lead frame 2a is maintained at a predetermined space defined by the first solder material 6.

According to the present invention, after the second solder materials 7a and 7b are plated on the first solder material 6, the second solder materials 7a and 7b are washed by an organic solvent and sufficiently dried.
The thickness of the oxide film on the surface b is controlled to 0.003 μm or less,
In addition, the oxygen concentration in the atmosphere during the bonding process should be 10
It is controlled to be not more than 00 ppm to prevent the solder material from being oxidized in the joining process. This allows the second
Even if the amount of the second solder 7a, 7b melted at the time of heat bonding is small and the amount of the liquid layer is small, the solder 7a, 7b is as thin as 3 μm and stable wetting can be secured at the time of melt bonding.

FIG. 2 is a characteristic diagram showing the relationship between the thickness and the bondability of the second solders 7a and 7b. The vertical axis represents the ratio of the unbonded portion to the area to be bonded, and the horizontal axis represents the second solder. The thickness of 7a and 7b is shown. In FIG. 2, the characteristic curve shown by the dotted line shows the case where the solder material according to the invention of Japanese Patent Application No. 3-004832 is used, and the characteristic curve shown by the solid line shows the case where the solder material according to the present invention is used. In the case of the solder material described in Japanese Patent Application No. 3-004832 indicated by the dotted line, the thickness of the oxide film of the solder material could not be made thin, so that the thickness of the second solder 7a, 7b was 5 μm or more. If this is not the case, the area ratio of the unbonded part does not decrease. However, in the case of using the solder material according to the present invention, it is possible to reduce the thickness of the oxide film of the solder material to 0.003 μm or less. Therefore, if the thickness of the second solder 7a, 7b is 1 μm or more, The area of the joint is reduced, and a good joint can be obtained. In the above embodiment, the plating is used as the method of disposing the second solders 7a and 7b on both surfaces of the first solder 6, but the present invention is not limited to this, and the same effect can be obtained by a method such as clad or vacuum deposition. It goes without saying that you can get it.

(Embodiment 2) In Embodiment 1, after heating the second solder 7a, 7b by heating to 200 ° C., the second solder 7a, 7b is solidified by lowering the heating temperature.
The second solder 7a, 7b can be solidified without lowering the heating temperature. As in Example 1, the oxygen concentration was 1000.
In a reducing atmosphere of ppm or less, the semiconductor chip 1 and the lead frame 2a shown in FIG.
And a solder material composed of the second solder 7a, 7b are heated to 200 ° C. to melt the second solder 7a, 7b
When kept at 0 ° C., Sn atoms of the second solders 7a and 7b diffuse into the first solder 6 at a relatively high speed. Here, as can be seen from the Pb-Sn phase diagram shown in FIG. 3, the Pb-Sn solder solidifies even at 200 ° C. when the Sn concentration is 18% or less. Therefore, when the Sn concentration of the second solder 7a, 7b becomes 18% or less due to the diffusion of Sn from the second solder 7a, 7b to the first solder 6, it is solidified even though it is heated at 200 degrees. To do.

Thereafter, the diffusion rate of Sn can be further accelerated by controlling the temperature just below the solidus temperature shown in FIG. 3 to raise the temperature. Finally, the second solder 7a, 7b
The Sn concentration of is the same as the Sn concentration of the first solder 6,
In this state, the melting points of the second solders 7a and 7b are higher than the melting point before the heat treatment, that is, the second solder 7b.
This means that the heat resistance of a and 7b is improved. Therefore, it is possible to obtain a semiconductor device having a heat resistance higher than the heating temperature at the time of joining, in addition to the effect of maintaining the gap by not melting the first solder 6.

FIG. 4 shows that when the thickness of the first solder 6 is 100 μm, the Sn atoms are diffused from the second solders 7a and 7b to the first solder 6 by holding the first solder 6 at a high temperature of 200 ° C. FIG. 7 is a correlation diagram showing the relationship between the time until the Sn concentration in the first solder 7a and the second solder 7b solidifies to 18% or less and the thickness of the second solders 7a and 7b. In FIG. 4, the vertical axis represents the time until the second solder 7a, 7b is solidified after the start of the temperature holding at 200 ° C., and the horizontal axis represents the initial thickness of the second solder 7a, 7b.

As is apparent from FIG. 4, the second solder 7a,
The time required for 7b to solidify due to the diffusion of Sn and the decrease in the Sn concentration thereof increases quadratically with the increase in the thickness of the second solders 7a and 7b. As described in Example 1, in order to obtain a good joint, the second solder 7
The thicknesses of a and 7b need to be 1 μm or more, but in order to complete the joining process in a short time, the second solder 7a,
It is advisable to make the initial thickness of 7b as thin as possible in the range where good wetting is obtained when it melts.
Although the time until the second solders 7a and 7b are solidified has been described above, the second solders 7a and 7b have the same composition as the first solder 6 after solidification, and the initial composition of the second solders 7a and 7b. It goes without saying that the same can be said for the time required until the melting point becomes higher than in the case of.

In the case of this embodiment, since a joint having a heat resistant temperature higher than the heating temperature at the time of joining can be obtained, a solder having a similar heat resistant temperature can be formed by using the solder 3 having a single composition (FIG. 5). Compared with the case of trying to obtain it, it will be possible to join at a lower temperature. That is, in order to secure heat resistance at 280 ° C., when soldering with solder 3 in a state as shown in FIG. 5, a solder material having a composition with a melting point of 280 ° C. is used.
Although it has to be heated to a temperature of 0 ° C. or higher, in the case of Example 2, as shown in FIG.
A joint having a heat resistance of 280 ° C. is obtained.

For example, the composition of the first solder 6 shown in FIG.
5Pb-5Sn, the thickness thereof is 100 μm, and the composition of the second solder 7a, 7b provided on both surfaces thereof is 63Pb-.
When the semiconductor chip 1 is die-bonded to the lead frame 2a with a solder material of 37Sn and a thickness of 4 μm, the melting point of the second solder 7a, 7b is 183 ° C. or higher, 190 ° C.
It is melted and bonded by heating it to a temperature of 190 ° C. As a result, the S in the second solder 7a, 7b is
n diffuses into the first solder 6 and the concentration of Sn in the second solders 7a and 7b decreases, so that the n has the same composition as the first solder 6. When the Sn concentration of the Pb-Sn solder becomes close to 5%, as is clear from FIG. 3, the melting point becomes 280 ° C. or higher, so that the second solders 7a and 7b have heat resistance of 280 ° C. In other words, the junction between the semiconductor chip 1 (FIG. 1) and the lead frame 2a also has a heat resistance of 280 ° C.

By the way, since the thermal stress acting on the semiconductor chip 1 is obtained by multiplying the difference in thermal expansion coefficient between the semiconductor chip 1 and the lead frame 2a by the temperature difference generated at the time of bonding, the heating temperature at the time of bonding is low. The lower the value, the smaller the thermal stress acting on the semiconductor chip 1. That is, 190 ° C
If a heat resistance of 280 ° C is obtained by joining with the above method, the residual thermal stress at 250 ° C will be reduced by about 35% compared with the case of joining with a solder material of a single composition at 280 ° C as in the past. become. Due to this characteristic, the semiconductor chip 1 and the base material 2
Depending on the combination with
A sufficient thermal stress reduction effect can be obtained when the thickness is about μm. However, if the thickness of the first solder 6 is too thin, it becomes difficult to maintain the flatness thereof, so that the thickness needs to be 10 μm or more.

In the above embodiment, the case where the silicon semiconductor is die-bonded to the Cu lead frame has been described. However, the present invention is not limited to this, and generally a fragile compound semiconductor is used to bond a chip or an electronic component to a base material. It goes without saying that the same effect can be obtained even when applied to joining. Further, in the above-mentioned embodiment, it is possible to use 95Pb-5Sn solder and
The combination of 3Sn-37Pb solder has been described, but the first solder 6 (FIG. 1) may be Pb or In, or an alloy containing Sn, Au, or the like as a main component.
-It is not limited to Sn alloy. As the second solder material,
It may be an alloy having a melting point lower than that of the selected first solder 6, or an alloy that reacts with the first solder 6 to generate an alloy having a lower melting point, for example, the first solder. Pb as 6 and S as the second solder 7a, 7b
n may be used, and the alloy is not limited to the alloy of the above-mentioned embodiment. Further, in order to shorten the process time when the atoms are diffused from the second solder 7a, 7b to the first solder 6 and the second solder 7a, 7b is solidified at the melting temperature, the diffusion coefficient thereof is reduced. Cu, which can increase
It is also effective to add small amounts of elements such as Zn, Au, Ni, Co and Ag.

[0023]

As described above, according to the present invention, the first
Since the joining member is constituted by the solder and the second solder which is disposed on both surfaces thereof and has a lower melting point than that, it becomes easy to form the members to be joined at a predetermined interval, It is possible to reduce the thermal stress of the above, and it is possible to control those damages. Further, as described above, the positional accuracy of the members to be joined is improved, the time of the joining process can be shortened, and heat resistance higher than the processing temperature at the time of joining can be obtained.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing the configuration of a semiconductor device that is an embodiment of the present invention.

FIG. 2 is a characteristic diagram showing the relationship between the thickness of solder 7a, 7b and the bondability of the die according to the present invention.

FIG. 3 is a Pb-Sn phase diagram for explaining the solidification process of Pb-Sn solder in the second embodiment of the present invention.

FIG. 4 is a second solder 7 according to a second embodiment of the present invention.
It is a correlation diagram which shows the relationship between the thickness of a and 7b, and its solidification time.

FIG. 5 is a cross-sectional view showing a configuration of a conventional semiconductor device.

FIG. 6 is a sectional view showing a configuration of a semiconductor device described in Japanese Patent Application No. 3-004832.

[Explanation of symbols]

 1 Semiconductor Chip 2a Lead Frame 6 First Solder 7a, 7b Second Solder

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Claims (2)

[Claims] 1. A first solder and a material having a melting point lower than that of the first solder or a material which reacts with the first solder to form an alloy having a melting point lower than that of the first solder. And a second solder having a thickness of 1 μm or more and less than 5 μm arranged on both surfaces of the first solder. 2. A material having a melting point lower than that of the first solder or a material which reacts with the first solder to form an alloy having a melting point lower than that of the first solder on both surfaces of the first solder. A solder material formed by arranging a second solder having a thickness of 1 μm or more and less than 5 μm is sandwiched between members to be joined, and the melting point of the second solder or an alloy generated from the second solder is equal to or higher than the melting point of the second solder. A member to be joined by heating to a temperature lower than the melting point of the first solder, melting the second solder or alloy, and then cooling or maintaining the temperature near the melting temperature. Joining method.