JPH0675920A - Information processor - Google Patents

Abstract

PURPOSE:To provide an information processor capable of surely performing the notification of schedule time and the backup of data. CONSTITUTION:When the present time coincides with the set time for starting a data transfer and coincides with schedule time (S11, S12, YES), '1' is set to a flag F1 after the fact that it reached to the schedule time is notified (S18). When the data transfer is not performed when it reaches the set time (F1=1) and a mode performing the data transfer is set (F2=1), the counting of a timer To is started when a power source is turned off (S7). At the point of time when the timer To counts 6 mininutes (S23, YES), the data transfer from a RAM to an EEPROM is performed and '0' is set to the flag F1 when the data transfer is completed (S14 to S17).

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information processing apparatus having a sub storage unit for storing and holding data stored in a main storage unit.

[0002]

2. Description of the Related Art In a small electronic device such as an electronic notebook, a RAM is used as a storage medium for storing data input by a user.
Etc. are used. However, since the RAM is a volatile memory, it has a drawback that the stored data is lost when the power supply voltage drops. Therefore, it is conceivable to store the data in a non-volatile memory such as a floppy disk or an EEPROM. However, floppy disks are not only expensive,
There is a drawback that the device becomes large and the portability is impaired.

Therefore, it is conceivable to store and hold data in a semiconductor non-volatile memory such as an EEPROM.
Since the EEPROM has a limited number of times of writing, data is normally stored in the RAM and stored in the RAM when a decrease in the battery voltage is detected or when the user performs a specific key operation. Current data
It is transferred to the OM and stored.

However, if the data is stored after the battery voltage drop is detected, the data is not stored until the battery voltage drop is detected.
If the user accidentally removes the battery, the data stored in the RAM will be lost.

Further, when the data stored in the RAM is transferred to the EEPROM by the user's key operation, in order to surely save the data, the user must store the data in the RAM every time the data is processed. It was necessary to perform a key operation for transferring the data of No. 1 to the EEPROM, and the operation was complicated.

[0006]

Therefore, in order to save the data in the RAM without requiring the key operation for data transfer, the data in the RAM is EEP at every predetermined time.
It is possible to automatically transfer to a non-volatile memory such as a ROM.

On the other hand, some portable information processing apparatuses are provided with a schedule function for giving an alarm sound or the like when a user reaches a preset time.

In such an information processing apparatus, when the data transfer start time coincides with the schedule time and the data transfer from the RAM to the EEPROM is started, it takes a certain time until the data transfer is completed. Therefore, it is conceivable that the notification of the schedule time may be delayed or that the alarm sound may not be notified even at the scheduled time.

An object of the present invention is to provide an information processing device capable of reliably notifying a scheduled time and saving data.

[0010]

Main storage means is composed of, for example, a volatile memory, and stores various data including schedule time. The sub storage unit is composed of, for example, a non-volatile memory, and stores and holds the data transferred from the main storage unit.

The transfer control means transfers the data from the main storage means to the sub storage means when the predetermined time for starting the data transfer and the schedule time do not match,
When the predetermined time matches the schedule time, after giving priority to the notification of the schedule time,
Data is transferred from the main storage means to the sub storage means.

[0012]

According to the present invention, when the time for transferring data from the main storage means to the sub storage means and the schedule time set by the user match, the notification of the schedule time is prioritized. It is possible to prevent delay of notification of schedule time, alarm time, etc. due to backup.

[0013]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is an external view of a handy-type electronic notebook to which the present invention is applied.

The upper case 2 of the electronic notebook 1 can be opened and closed with respect to the lower case 3 via a hinge portion 2a.
A card insertion hole 4 for accommodating an IC card (not shown) is formed on the side surface of the lower case 3. Inside the card insertion hole 4, there is provided a lock mechanism (not shown) for preventing the IC card from being pulled out when the card lock slide switch 5 is operated, and when the card is locked. A connector (not shown) for electrically connecting an electronic circuit inside the IC card and an electronic circuit inside the electronic notebook.
Is provided.

As the IC card, an application ROM card having a translation function, a dictionary function, a game function, etc., or a RAM card for storing input data can be used. Also, the electronic notebook 1 alone can be used without mounting the IC card.

The lower case 3 includes a power on / off key 6 for reversing the power on / off for each key operation, character keys such as numerical values and alphabets, a transfer key, which will be described later, a setting key, a call key, a clear key, etc. A key input device 7 having function keys is provided.

In the upper case 2, a dot matrix type liquid crystal display device 8 for displaying input data, stored data, etc., a card key 9 operated when an IC card is used and for setting a use mode of the IC card, A telephone number function key 10, a memo function key 11, a schedule function key 12, and a clock function key 13 for setting respective modes of a telephone number function, a memo function, a schedule function, and a clock function.
Is provided.

FIG. 2 shows a circuit configuration of the electronic notebook 1. The control unit 20 is composed of a CPU and controls the entire system according to a micro program stored in the ROM 21.

The RAM 22 is a main storage device for storing key input data, display data, IC card data, and the like, and is composed of a volatile memory in which internal data disappears when the power supply voltage drops.

The EEPROM 23 is a sub memory device to which the data in the RAM 22 is transferred and stored and held, or the stored and held data is transferred to the RAM 22 again, and the internal data disappears even if the power supply voltage is lowered. It is composed of non-volatile memory.

The key input section 24 includes a power-on / off key 6, a function key (key input device) 7, a card key 9, a telephone number function key 10, a memo function key 11 in FIG.
The schedule function key 12 and the clock function key 13 are included. Then, the function key 7 of the key input unit 24
Includes a transfer key 24a for instructing data transfer from the RAM 22 to the EEPROM 23 and an R key from the EEPROM 23.
Call key 24 for instructing to call data to AM 22
b and RAM 22 to E at a predetermined time described later.
A transfer setting key 24c for setting whether or not to transfer data to the EPROM 23 and a clear key 24d for clearing data in the RAM 22 are provided.

The oscillation circuit 25 outputs a clock signal of a predetermined cycle, and the timing signal generation circuit 26 receives the clock signal and generates various timing signals for controlling the operation timing of each part. The clock / timer circuit unit 27
A not-shown crystal oscillator is provided inside, and a clock circuit that obtains current date and time data by counting a reference signal obtained by the crystal oscillator is provided, and a timer circuit that obtains time data under the control of the control unit 20 is also provided. I have it.

The power supply circuit 28 is usually a main battery 29.
The drive voltage is supplied to each part based on the battery voltage from the battery, and when the battery voltage of the main battery 29 drops, the drive voltage is supplied to each part based on the battery voltage from the sub battery 30 for battery backup.

The IC card 31 is an application ROM card or RAM card having a translation function, a dictionary function, etc. as described above, and the IC card 31 is used by inserting it into the card insertion hole 4 of the electronic notebook 1. That also
Alternatively, the electronic notebook 1 alone can be used without using the IC card 31.

The display driver 32 decodes the display signal from the control unit 20 to decode the display signal, and the dot matrix display unit 33.
A display drive signal is supplied to (the liquid crystal display device 8 in FIG. 1).
The speaker 19 gives an alarm sound according to an instruction from the control unit 20 when the current time matches the scheduled time (including the alarm time and the like).

Next, FIG. 3 shows a storage area of the RAM 22. The display register 34 stores the data displayed on the dot matrix display unit 33. The telephone number data storage area 35 stores telephone number data set by the user in the telephone number setting mode, and the memo data storage area 36 stores memo data set in the memo setting mode. Further, the schedule data storage area 37 stores schedule data set by the user in the schedule setting mode.

FIG. 4 is a diagram showing the structure of the schedule storage area 37. The schedule storage area 37 includes a schedule date / time storage area 37a for storing the month, day, and time of the schedule, and a comment storage area 27b for storing a comment indicating what the schedule relates to.
And a plurality of these storage areas are provided.

Predetermined time data is stored in the set time storage area 38 of FIG. 3, and when the current time coincides with the predetermined time as described later, data transfer from the RAM 22 to the EEPROM 23 is started. It In addition,
The work area 39 is an area for temporarily storing input data and the like.

The flag register F ₂ is read from the RAM 22 to E.
"1" when data is transferred to EPROM 23
Is a register that stores "0" when not
The flag register F ₀ is a register that stores “1” when the power is on and “0” when the power is off. Also,
The flag register F ₁ is a register that stores “1” when data transfer is not performed at a predetermined time (time set in the set time storage area 38) and stores “0” when data transfer is performed. is there.

FIG. 5 is a diagram showing a storage area of the EEPROM 23. The EEPROM 23 has a date / time storage area 23 for storing the date and time when the data was transferred.
a and a data recording area 23b for storing the data transferred from the RAM 22 are provided. RAM2
Although it is desirable that all the data of No. 2 be transferred to the data storage area, the contents of the display register, the data in the work area, etc. may be omitted.

Next, the operation of the electronic notebook 1 of this embodiment will be described with reference to FIG. In step S1 of FIG. 6, it is determined whether or not the power on / off key 6 has been operated. When the power on / off key 6 is operated, step S
At 2, the flag F ₀ is inverted. That is, when the power on / off key 6 is operated to change from the power off state to the on state, the flag F ₀ changes from “0” to “1”, and the power on / off state is changed from the power on state to the off state. When the off key 6 is operated, the flag F ₀ changes from “1” to “0”.

In the next step S3, it is determined whether or not the flag F ₀ is "1". If the flag F ₀ = 1, it means that the power-on / off key 6 has been operated in the power-off state, so the flow proceeds to step S4 to set the power system to the on-state. The power-on state means a state in which the display is on and a voltage is supplied to each circuit portion required for the operation of the electronic notebook 1.

On the other hand, the flag F ₀ = in the determination in step S3
If it is not 1, it means that the power-on / off key 6 is operated in the power-on state. Therefore, the process proceeds to step S5 and the power system is set to the off-state. The power-off state means that the display is off, and the clock / timer circuit 27 and the RAM 22 are
A state in which a voltage is supplied only to a circuit that needs to hold data and a voltage is not supplied to other circuits such as the above.

If the power is turned off in step S5, it is determined in next step S6 whether the flags F ₁ and F ₂ are "1". If both flags are "1", the clock / timer is selected. The clocking of the timer T ₀ in the circuit 27 is started.
The timer T ₀ is a timer for measuring a fixed time, for example, 6 minutes after the power is turned off, and when 6 minutes have elapsed, data transfer or the like is started by the processing described later.

If it is determined in step S1 that the power on / off key 6 has not been operated, it is determined in step S8 whether another key has been operated. When another key is operated, in the next step S9, it is determined whether or not the flag F ₀ = 1, that is, whether the power is on or not. If the power is on, the key operated in step S10 The key processing corresponding to is executed.

In this key processing, for example, the transfer key 24a
When is operated, the processing shown in FIG. 7 is executed.
First, in step S31, it is displayed on the display unit 33 that the data is being stored, and in the next step S32, the current date and time data measured by the clock / timer circuit 27 at that time is stored in the date and time storage area of the EEPROM 23. 23a and stores the data stored in RAM 22 in E
The data is transferred to and stored in the data storage area 23b of the EPROM 23. And when all the data has been transferred,
In step S33, the display unit 33 displays that the data transfer is completed.

When the transfer setting key 24c is operated, the processing shown in FIG. 8 is executed. First, in step S34, whether or not the transfer setting mode is set, that is, the RAM 22
From the EEPROM 23 to the EEPROM 23 is determined. If it is the transfer time setting mode, the flag F ₂ is inverted in the next step S35.

Further, when the call key 24b is operated, the processing shown in FIG. 9 is executed. In this case, first, in step S36, it is displayed on the display unit 33 that the call is being made, and in the next step S37, the data stored in the EEPROM 23 is transferred to the RAM 22. When the transfer is completed, the transfer completion is confirmed in step S38. It is displayed on the display unit 33.

In this key processing, key input processing by various function keys and function keys other than the above-mentioned keys is also performed. Returning to FIG. 6, when the key input is not performed, the process proceeds to step S11, and the current time measured by the clock / timer circuit 27 and the time when the data transfer stored in the set time storage area 38 is started match. It is determined whether or not to do. If they match, the next step S
At 12, it is determined whether the current time matches any of the schedule times stored in the schedule data recording area 37.

When the current time does not match the schedule time in the determination in step S12, the process proceeds to step S13, and it is determined whether or not the flag F ₀ = 0, that is, whether or not the power source is in the off state. If the power is off, step S1
4, the power is turned on, and in the transfer process of the next step S15, the fact that the data is being transferred is displayed on the display unit 33, the current date and time data is stored in the date and time storage area 23a of the EEPROM 23, and the RAM 22 Data is transferred to the data storage area 23b of the EEPROM 23. If data transfer is completed, "0" is set to the flag F ₁ in step S16, to turn off the power in step S17.

On the other hand, when the determination in step S12 is YES, that is, when the current time matches the set time and the scheduled time, the notification process of step S18 is executed. In this notification process, after the power is turned on, the speaker 19 is driven and an alarm sound is emitted to notify that the scheduled time has been reached, and at the same time, the display unit 3
The comment about the schedule is displayed in 3. If the comment is displayed for a certain period of time, the display is turned off.

In this case, the notification of the schedule time is given priority and the data transfer to the EEPROM 23 is not performed at that time, so in the next step S19, the flag F ₁ is set to "1" and the set time is reached. However, it is remembered that the data transfer was not performed.

Further, the flag F ₀ is determined in the determination in step S13.
There "1", i.e., when the power was turned on when a set time is set to "1" in the flag F ₁ proceeds to step S19 described above.

That is, even when the current time coincides with the set time for starting the data transfer, when the time coincides with the schedule time, the alarm sound is prioritized and the data is not transferred to the EEPROM 23. Even when the current time coincides with the set time, when the power is on, data transfer is not performed at that time, and as will be described later in detail, the power is off and the power is turned off for a certain period of time (timer T ₀ is timed). Data is transferred after 6 minutes).

If it is determined in step S11 that the current time does not match the set time, the flow advances to step S20 to determine whether the current time matches the scheduled time. When the current time does not match the schedule time, the process proceeds to step S21, and it is determined whether or not the flag F ₀ = 0, that is, whether or not the power is off.

When the flag F ₀ = 0, it is determined in the next step S22 whether the flag F ₁ = 1 and the flag F ₂ = 1. When flag F ₁ = 1 and flag F ₂ = 1
That is, if the data transfer is not performed when the transfer time is reached (F ₁ = 1) and the mode is set to perform the data transfer (F ₂ = 1), it is measured by the timer T ₀ in step S23. It is determined whether the time has passed 6 minutes. If 6 minutes have passed since the power was turned off, after clearing the timer T _{0 in} step S24,
By executing the processing of steps S14 to S17 described above, RA
The data of M22 is transferred to the EEPROM 23.

On the other hand, when it is determined in step S20 that the current time matches the scheduled time, step S25
It is determined whether or not the timer T ₀ is being measured. If the timer T ₀ is not being measured, an alarm sound is emitted in the notification process of step S27 to notify that the schedule time has been reached, and at the same time, the display unit 33 is commented on the schedule. Is displayed for a certain period of time.

When the current time coincides with the schedule time during the data transfer, the above-mentioned step S
The determination as to whether the schedule time is 20 is YES, the determination as to whether the timer T ₀ is being measured in step S25 is NO, and the data transfer is stopped and the schedule time is notified in step S27. In this case, since the flag F ₁ remains “1”, when the notification of the schedule time ends and the power supply is turned off, the measurement of the timer T ₀ is started, and 6 minutes have passed, the same as described above. RAM2
The data transfer from 2 to the EEPROM 23 is performed.

Further, the timer T ₀ is determined by the determination in step S25.
If the measurement is being performed, the flag F _{1 is set} to "0" in step S26, the timer T ₀ is cleared, and then the notification process in step S27 is executed.

That is, when the schedule time is reached during the measurement of the timer T ₀ for measuring the time after the power is turned off, the notification of the schedule time is given priority,
The flag F _{1 is set} to “0” and the timer T ₀ is cleared. In this case, since the flag F ₀ is reset to “0”, the RAM 22 to the EEPROM 23 are set until the next set time.
No data transfer will take place. It should be noted that when the scheduled time comes during the measurement of the timer T ₀ , the flag F ₁ may be left at “1”, and after the notification of the scheduled time ends, the measurement of the timer T ₀ may be started again. Good.

In the above embodiment, when the set time for starting the data transfer for backing up the data coincides with the schedule time, or when the schedule time comes during the data transfer, the notification of the schedule time is given priority. Since the data is transferred from the RAM 22 to the EEPROM 23 after that, it is possible to prevent the notification of the schedule time, the alarm time, etc. from being delayed.

In the above embodiment, the case where the data transfer is performed every day based on the set time consisting of hours and minutes has been described. However, the time data including the date or the day of the week is set and the set date or the day of the week is specified. The present invention can be applied to the case of performing the data transfer at the time of, or the case of setting the time in the timer or the like and performing the data transfer at every constant time.

Further, not limited to the electronic notebook described in the embodiment,
It can be applied to various electronic devices such as a personal computer, an electronic book, a mobile phone, a small electronic calculator, and an electronic watch with a data storage function. Furthermore, the volatile memory is not limited to RAM, and the non-volatile memory is not limited to EEPROM.

[0054]

According to the present invention, even when the preset time to start data transfer coincides with the schedule time, the schedule time is accurately notified and the data is backed up reliably. be able to.

[Brief description of drawings]

FIG. 1 is an external view of an electronic notebook according to an embodiment of the present invention.

FIG. 2 is a circuit configuration diagram of an electronic notebook according to an embodiment.

FIG. 3 is a configuration diagram of a RAM.

FIG. 4 is a configuration diagram of a schedule data storage area of a RAM.

FIG. 5 is a configuration diagram of an EEPROM.

FIG. 6 is a flowchart showing the overall operation of the embodiment.

FIG. 7 is a flowchart showing a process when a transfer key is operated.

FIG. 8 is a flowchart showing a process when a transfer setting key is operated.

FIG. 9 is a flowchart showing a process when a call key is operated.

[Explanation of symbols]

 1 electronic notebook 20 control unit 22 RAM 23 EEPROM 24 key input unit 33 dot matrix display unit

Claims (3)

[Claims] 1. A main storage means for storing data including at least a schedule time, a sub-storage means for storing and holding data transferred from the main storage means, and when a predetermined time does not match the schedule time. , The data in the main storage means is transferred to the sub storage means, and when a predetermined time coincides with the schedule time, the fact that the schedule time is reached is notified, and then the data in the main storage means is transferred to the sub storage. An information processing apparatus comprising: a transfer control unit that transfers to a storage unit. 2. A clocking means for clocking time, a main storage means for storing data including at least a schedule time, a sub-storage means for storing and holding data transferred from the main storage means, and a predetermined time. Is not coincident with the schedule time, the data in the main storage means is transferred to the sub storage means, and when a predetermined time coincides with the schedule time, or is measured by the clock means during data transfer. When the current time coincides with the schedule time, the information processing apparatus further comprises a transfer control means for notifying that the schedule time has been reached and then transferring the data in the main storage means to the sub storage means. . 3. The information processing apparatus according to claim 1, wherein the main storage means is a volatile semiconductor memory, and the sub storage means is a non-volatile semiconductor memory.