JPH0668890B2 - Head positioning control circuit for magnetic disk drive - Google Patents

Description

The present invention relates to a head positioning control circuit for a magnetic disk device, and more particularly to a VCM heat generation problem for a magnetic disk device that uses a voice coil motor (hereinafter referred to as VCM) as a head drive mechanism. The present invention relates to a head positioning control circuit.

(Prior Art) With the recent demand for high-speed operation of information processing systems,
It is strongly desired to shorten the seek operation time in the magnetic disk device. To meet this demand, conventionally, a method of increasing the current flowing to VCM has been adopted.

(Problems to be Solved by the Invention) In the above-described conventional method for shortening the seek operation time of the magnetic disk device, since the current flowing to the VCM is increased, the temperature of the VCM rises relatively large and seeks are performed at short intervals. If the operation is repeated, the temperature of VCM may exceed the heat resistance limit.

An object of the present invention is to solve such a problem and to provide a seek prohibition period before the temperature rise of VCM exceeds the heat resistance limit,
Moreover, it is an object of the present invention to provide a head positioning control circuit for a magnetic disk device that minimizes the decrease in the throughput of the device without taking the prohibition period longer than necessary.

(Means for Solving the Problems) A head positioning control circuit of a magnetic disk device of the present invention for achieving the above-mentioned object determines a position where a head should be positioned in a magnetic disk device including a VCM in a head drive mechanism. Target cylinder address signal 11 indicating and tag signal 12 indicating that target cylinder address signal 11 is set
After inputting from the interface section 31, the difference calculator 1 which calculates the difference between the cylinder address at that time and the target cylinder address signal 11 and outputs it as the difference signal 13 and the difference signal 13 are input as the address. , The read-only memory 3 that outputs the waiting time data signal 16 as the output data and the timer / adder start signal 17 are started, and the remaining timer signal 20 and the waiting time data signal 16 are added, and the result is accumulated waiting time data. signal
Adder 4 output as 18 and timer / adder start signal
Start by 17, input the cumulative waiting time data signal 18 after startup, subtract the input value by the clock signal 19,
The result is output to the adder 4 as the timer remaining number signal 20, and the subtraction operation is stopped when the value of the timer remaining number signal 20 becomes zero, and the timer remaining number signal 20 and the comparison reference input from the outside. The signal 21 is compared, and when the timer remaining number signal 20 is small, a remaining number discriminating signal indicating the presence or absence of the remaining number with a value representing logic
Seek the logical product of the comparator 7 that outputs 22, the latch 2 that temporarily holds the tag signal 12 and outputs the tag latch signal 15 and that is reset by the tag reset signal 14, and the tag latch signal 15 and the remaining number determination signal 22. The AND gate 8 that outputs as the permission signal 23, the difference signal 13 and the servo pattern read signal 24 obtained by reading the servo pattern written on the magnetic disk plate are input, and the VCM
For the seek command received while the closed loop control of the VCM is performed by the input signal 25 and the VCM output signal 26, and the seek enable signal 23 is not the logical value indicating the seek operation command, Immediately after the seek start signal is not output, and when the seek permission signal 23 has a logic value indicating a seek operation command, the seek start signal is output and the tag reset signal 14 is latched. And a VCM control circuit 5 for sending the timer / addition start signal 17 to the adder 16 and the timer 6.

(Example) Next, this invention is demonstrated with reference to drawings.

FIG. 1 is a block diagram of an embodiment of the present invention.

FIGS. 2 (1) and 2 (2) are time charts showing an operation example of the main part of the embodiment of FIG.

FIG. 3 is a block diagram showing an example of a magnetic disk device using the embodiment of FIG. In FIG. 3, the portion using the embodiment of FIG. 1 corresponds to the head control circuit unit 32.

Reference numeral 31 is an interface unit of the magnetic disk device, 33 is a head select circuit unit, 34 is a read / write control circuit unit, 35 is a power amplifier, and 36 is a head disk assembly which is a mechanical part of the magnetic disk device including VCM. is there.

Then, as signals connecting these, a target cylinder address signal 11, a tag signal 12, a servo pattern read signal 24, a VCM input signal 25, a VCM output signal 26, a head address signal 41, a head select tag signal 42, and a read data signal. 43, read clock signal 44, write data signal 45, write clock signal 46, servo clock signal 47, index signal 48, sector signal 49, VCM drive signal 50, VCM drive return signal 51, spindle motor drive signal
52, a head select signal 53, a write count signal 54, and a low read signal 55.

In the R / W head positioning of such a magnetic disk device, it is possible to access the corresponding cylinder by passing a current through VCM, but when the current flows through VCM, heat is generated, and if the amount of remaining heat generated by VCM is If it is larger than the diffusion amount, it may cause a failure. In the present embodiment, in order to reduce the residual heat generation amount, if there is frequent access, the access is automatically delayed to increase the heat diffusion amount so that the head temperature rise does not exceed a certain limit. ing.

As shown in FIG. 1, the configuration of the present embodiment has a difference calculator 1, a latch 2, a read-only memory 3,
Adder 4, timer 6, comparator 7, and gate 8
And a VCM control circuit 5.

The difference calculator 1 outputs the target cylinder address signal.
11 and the tag signal 12 are input from the interface unit 31, the difference between the cylinder address at that time and the target cylinder address is calculated, and the difference signal 13 is output.

The latch 2 is set by the tag signal 12 and outputs as the tag latch signal 15. The set state is reset by the tag reset signal 14.

The read-only memory 3 inputs the difference signal 13 as an address and outputs the waiting time data signal 16.

The adder 4 has a waiting time data signal 16 and a timer remaining number signal 20.
Are added at the rising edge of the timer / adder start signal 17, and the addition result is output as the cumulative waiting time data signal 18.

The timer 6 loads the accumulated waiting time data signal 18 into the internal register at the rising edge of the clock signal 19 while the timer / adder start signal 17 is logic "1", and the timer / adder start signal 17 is logic. While it is "0", the value of the internal register is decremented by 1 at the rising edge of the clock signal 19. Then, the value of the internal register is output as the timer remaining number signal 20. Further, the timer 6 stops the subtraction when the value of the timer remaining number signal 20 which is the value of the internal register becomes zero.

The comparator 17 compares the timer remaining number signal 20 and the comparison reference signal 21 with each other, and when the timer remaining number signal 20 is smaller, outputs the remaining number discriminating signal 22 which becomes a logical “1”.

The AND gate 8 has a tag latch signal 15 and a remaining number determination signal 22.
The logical product of the two is output as the seek permission signal 23.

The VCM control circuit 5 inputs the servo pattern read signal 24 from the head / disk assembly 36, controls the VCM input signal and the VCM output signal 26, thereby performing the closed loop control of the VCM, and the seek from the interface unit 31. A difference signal 13 and a seek permission signal 23 are input as commands. Then, when the rising edge of the seek permission signal 23 is detected, a series of sequence control for a new seek operation is performed, and as a part thereof, the tag reset signal 14
And the timer / adder start signal 17 is sent out as a pulse signal.

Next, the operation will be described.

In Fig. 2 (Part 1) and Fig. 2 (Part 2), (1
1), (12), (15), (13), (16), (20), (1
9), (21), (22), (23), (14), (17), (1
8), (25), and (26) show time charts of signals having the same reference numerals in FIG.

In FIG. 2 (No. 1), at the time of A ₀ , the cylinder address is set on the target cylinder address signal 11 from the interface section, and subsequently the pulse-shaped tag signal 12 is set.
Is sent.

At this point, enough time has passed since the last seek,
It is assumed that the value of the remaining timer signal 20 is zero and the subtraction operation of the timer 6 is stopped.

The latch 2 is set at the rising edge of the tag signal 12, and the tag latch signal 15 becomes logical "1".

The difference calculator 1 calculates the difference value,
It is set on the difference signal 13 at the falling timing of the tag signal 12.

When the new difference value is input, the read-only memory 3 sets the waiting time data “a ₁ ” corresponding to the new difference value on the waiting time data signal 16. On the other hand, since the timer remaining number signal 20 at this time is "0", "a _1" is smaller than the comparison reference signal 21, the remaining number determination signal 22 thus is a logic "1". Therefore, the tag latch signal 15 passes through the AND gate 8 and the seek permission signal 23 becomes logical "1".

When the VCM control circuit 5 detects that the seek enable signal 23 has become a logical “1”, it prepares for the next seek instruction.
A pulse is sent on the tag reset signal 14 to reset the latch 2. Subsequently, the timer / adder start signal 17 is set to logic "1". At the rising timing of this signal, the adder 4 adds the value “a ₁ ” on the waiting time data signal 16 and the value “0” on the remaining timer signal 20 and adds the value “0 + a ₁ ” to the cumulative waiting time. Set on data signal 18. Timer 6
At the timing of rising of the next clock signal 19, loads the value "0 + a _1" on the cumulative latency data signals 18 in the internal register.

When the timer / adder activation signal 17 is set to logic “0” by the VCM control circuit 5, the timer 6 subtracts the value of the internal register one by one at the rising timing of the clock signal 19 and sets the value. Send on the timer remaining number signal 20.

On the other hand, the VCM control circuit 5 inputs the difference signal 13 and then activates the VCM input signal 25 to output the VCM input signal 25 at the time point A _{1 in} (1) of FIG. Operation).

When the next seek command is issued from the interface section at B ₀ , the seek enable signal 23 becomes logical “1” as in the previous time, and a new seek operation is started. However, in this case, the value of the adder 4 Timer remaining number signal 20 at the timing of performing the addition operation is "0" rather than "b _1". Therefore, the value sent as the accumulated waiting time data 18 is "b ₁ " and the new waiting time data signal value "a ₂ ".
Is the value of the sum of "b ₁ + a _2", this value is loaded into timer 6, and output as the timer remaining number signal 20. Assuming that this value is larger than the value of the comparison reference signal 21, the remaining number determination signal 22 naturally becomes a logical “0”. Then, the timer remaining number signal 20 is
Although it becomes smaller with the lapse of time, the remaining number determination signal 22 remains at the logical "0" until this value becomes smaller than the value of the comparison reference signal 21. Therefore, in the seek instruction issued in this period, the tag latch signal 15 passes through the AND gate 8 and is not transmitted to the VCM control circuit 5 as the seek permission signal 23. Therefore, it is not started as a new seek operation.

During the period when the remaining number determination signal 22 is logically “0” (for example, after the X point of (1) in FIG. 2 and before the Y point of (2), etc.), the predicted heating of the VCM is performed. This is a seek prohibition period for prevention.

Therefore, even if a seek instruction is issued at point C ₀ in FIG. 2 (No. 2), the cylinder address is set on the target cylinder address signal 11 from the interface section, and the tag signal 12 is sent, the seek operation is immediately started. Rather than being executed, when the remaining number determination signal 22 becomes a logical "1" after the seek prohibition period has elapsed (at point Y in (2) of FIG. 2), the tag latch signal is first issued. 15 is transmitted as a seek permission signal 23 through the AND gate 8,
The VCM control circuit 5 activates the seek operation by activating the VCM input signal 25 at time C _{1 in} FIG. 2 (part 2). Further, the VCM control circuit 5 sends a pulse on the tag reset signal 14 in order to prepare for the next seek instruction,
Reset Latch 2. Then, the timer / addition start signal 17 is set to logic "1". Hereinafter, the operation according to any of the above cases is repeated. When the seek instruction is issued during the seek prohibition period in this way, the elapsed time (C _{0 to} C ₁ ) until the start of the seek operation is when the seek instruction is issued during the seek prohibition period. It is much longer than the elapsed time (A ₀ ~ A ₁ etc.) until it starts up. Then, during this extended period, the required amount of remaining heat of VCM is appropriately reduced.

(Effect of the Invention) As described above, according to the present invention, the circuit for controlling the head drive includes the difference calculator, the latch, the read-only memory, the adder, the VCM control circuit, the timer, the comparator, and the AND gate. If there is a risk that the temperature rise of VCM due to repeated seeks at short intervals may exceed the heat resistance limit, a seek prohibition period is set, and seek commands issued within that prohibition period will perform seek operation after the seek prohibition period has elapsed. By doing so, the VCM is given a cooling period, and the length of the seek prohibition period and its presence / absence are made to correspond to the seek length of the seek performed before that and the interval length between seek operations. The effect is that the VCM can be given an optimum cooling period that minimizes the decrease in the throughput of the device.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment according to the present invention. FIG. 2 is a time chart showing an operation example of the embodiment shown in FIG. FIG. 3 is a block diagram showing an example of a magnetic disk device using the embodiment of FIG. 1 ... Difference calculator 2 ... Latch 3 ... Read-only memory 4 ... Adder 5 ... VCM control circuit 6 ... Timer 7 ... Comparator 8 ... AND gate 11 ... Target cylinder address signal 12 Tag signal 13 Difference signal 14 Tag reset signal 15 Tag latch signal 16 Wait time data signal 17 Timer / adder start signal 18 Accumulated wait time data signal 19 Clock signal 20 …… Remaining timer signal 21 …… Comparison reference signal 22 …… Remaining number judgment signal 23 …… Seek enable signal 24 …… Servo pattern read signal 25 …… VCM input signal 26 …… VCM output signal 31 …… Interface section 32 …… Head control circuit section 33 …… Head select circuit section 34 …… Read / write control circuit section 35 …… Power amplifier 36 …… Head disk assembly

Claims (1)

[Claims] 1. In a magnetic disk device including a voice coil motor in a head drive mechanism, a target cylinder address signal indicating a position where a head should be positioned and a tag signal indicating that the target cylinder address signal is set are input from an interface section. After doing
A difference calculator that calculates the difference between the cylinder address at that time and the target cylinder address signal, and outputs the difference signal as a difference signal, and the difference signal is input as an address, and a waiting time data signal is output as output data. A read-only memory, an adder that is started by a timer / adder start signal, adds the remaining timer signal and the wait time data signal, and outputs the result as a cumulative wait time data signal, and a timer / adder start signal After being activated, the accumulated waiting time data signal is input, the input value is subtracted by a clock signal, the result is output to the adder as a timer remaining number signal, and the value of the timer remaining number signal A timer that stops the subtraction operation when is zero, and the remaining timer signal and an external input And a comparator for outputting a remaining number discriminating signal indicating the presence / absence of a remaining number with a value representing a logic when the remaining timer number signal is small, and a tag latch signal for temporarily holding the tag signal. A latch that outputs and is reset by a tag reset signal, an AND gate that outputs a logical product of the tag latch signal and the remaining number determination signal as a seek permission signal, and the difference signal and the magnetic disk plate are written. A logic pattern that inputs the servo pattern read signal obtained by reading the servo pattern, performs closed loop control of the voice coil motor by the voice coil motor input signal and the voice coil motor output signal, and the seek permission signal represents a seek operation command. If the seek command is accepted while the value of When the seek enable signal becomes a logical value representing a seek operation command without outputting a seek start signal later, an operation of outputting the seek start signal is performed and the tag reset signal is set to the A head positioning control circuit for a magnetic disk device, comprising: a voice coil motor control circuit for sending the timer / addition start signal to the adder and the timer.