JPH0667188A - Line defect detection circuit - Google Patents

Abstract

PURPOSE:To prevent a cross-talk defect occurring due to a leakage current in a detecting transistor in a line defect detection circuit on an active matrix substrate. CONSTITUTION:In the line defect detection circuit on the active matrix substrate incorporating a horizontal scanning driver circuit, the detecting transistor 32 is made to be an LDD (Lightly Doped Drain) structure or an off-set structure. An off current in the transistor is reduced by these structures, and the cross-talk defect between source lines 34 is prevented. In the section of the transistor, a structure where no impurity atom exists in the thin film silicon of the bottom part of a gate electrode 4 and no impurity atom exists between AB as well is the off-set structure, and the structure where the impurity with lower density than a source drain part 2 exists between AB is the LCD structure.

Description

Detailed Description of the Invention

[0001]

FIELD OF THE INVENTION The present invention relates to a liquid crystal display.

[0002]

2. Description of the Related Art Active matrix liquid crystal panels are
Since high-quality and high-resolution display can be obtained, it has been widely used as a thin display body in recent years. However, since a transistor is used for each pixel forming a screen or a laminated structure is used, manufacturing yield is a problem. In particular, the defects found in the panel assembling process include the cost of the color filter substrate, which is the opposite electrode to the TFT substrate, so it is necessary to drop the defects by inspection on the TFT substrate from the viewpoint of cost reduction. A circuit that detects line defects in the data line by determining whether a normal signal is written using the timing of writing the liquid crystal panel video signal to each data line in the TFT substrate that has a driver circuit built in on the TFT substrate. Can be utilized.

FIG. 3 shows an explanatory diagram of the line defect detection circuit. The gate signal of the sample-hold transistor 35 is sequentially scanned by the X-side shift register 37 that performs horizontal scanning, and the video signal is captured in each data line. The line defect detection circuit detects the signal of the data line in accordance with the operation timing of the sample and hold transistor, and is composed of the detection transistor 32, the detection terminal 33, and the detection transistor gate input 31. The detection transistor 32 is turned on by turning on the gate input of the detection transistor.
When is turned on, a signal on the data line is generated at the detection terminal 33 every selection period of the sample hold transistor. By detecting this signal and comparing it with a normal waveform, it is possible to identify a data line disconnection and other defects such as a line defect, that is, a sample / hold transistor defect or a data line short circuit defect, and specify which data line.

It is necessary to set the detection gate input so that the detection transistor 32 is always in a non-conducting state when the defect detection inspection is not performed. However, if the off-leakage current of the detection transistor 32 is large, the data line 34 may cause crosstalk between adjacent lines through the detection terminal 3, the amplitude of the data signal may change, and a line defect on the display may occur. A structural diagram of the conventional technique is shown in FIG. Reference numeral 1 is a transistor channel portion, 2 is a source / drain portion, 3 is a gate insulating film, and 4 is a gate electrode. The source / drain portion 2 is located closer to the channel portion side than the end surface C of the gate electrode (line D). This is because, for example, in the case where the source / drain portion is formed by the ion implantation method or the thermal diffusion method after the gate electrode patterning, it is diffused to the channel portion side by the activation annealing after the impurity doping. In the conventional transistor having such a structure, the electric field generated by the gate electrode acts in the vicinity of the drain end, and the electric field excitation causes a leak current.

[0005]

Since the conventional detection transistor has a large off-leakage current and a low off-state transistor resistance, the data line 34 in FIG. 3 is connected between the adjacent lines via the detection terminal line 33. When crosstalk occurs and there is a potential difference between adjacent lines, the amplitude of the data signal changes. This is observed as a gradation difference on the display and becomes a line defect having a linearly different contrast. Further, the same phenomenon occurs not only between adjacent lines but also between lines where a potential difference occurs, and unevenness of vertical lines occurs, and the uniformity of in-plane contrast is significantly lost.

The conventional technique has a problem that the above-mentioned line defect causes nonuniformity of contrast in the screen.

[0007]

In a line defect detection circuit formed on an active matrix substrate which constitutes a liquid crystal display, a thin film transistor which is a constituent element is LDD.
It is characterized in that it has a (Lightly Doped Drain) structure or an offset gate structure.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 3 shows a partial view of an equivalent circuit of an active matrix substrate according to the present invention. The pixel switching transistor 38 writes the data on the data line 34 into the pixel capacitance during the selection time of the gate line 39. Data is selectively written to the data line 34 from the video line 36 through the sample hold transistor 35. Such a driving method is called dot-sequential driving. The shift register circuit 37 outputs the gate input timing that determines the selection period of the sample hold transistor 35, and plays the role of outputting the number of pixels in the horizontal direction. All of these circuit operations are performed using thin film transistors on a glass substrate to form a CMOS transistor to form a circuit. By thus forming the driver driving unit on the active matrix substrate, it is not necessary to perform multipoint mounting, which leads to improvement of reliability, reduction of steps, and cost reduction. Considering the electrical characteristics of the thin film transistor, the resistance and capacitance applied to the data line are limited in size, and a display body having a diagonal of 1 to 2 inches is currently commercialized. For example, a liquid crystal display having a size of 1 inch or less is used as a viewfinder of a video camera capable of hand-held scanning and is widely used as a liquid crystal shutter for a projector.

After such a manufacturing process of the active matrix substrate, there is a panel assembling process with a color filter substrate which is a counter electrode. However, among the defects found in the display inspection after the panel assembling, a considerable part is the active matrix. Many are caused by defects in the substrate process.
In particular, even one line defect is a defective product, which wastes the number of steps in the panel assembling process and the cost of the counter electrode substrate, which hinders cost reduction. In order to avoid such a situation, it becomes necessary to inspect and select defects that may become display line defects in the active matrix substrate process. In the active matrix substrate with a built-in driver shown in this embodiment, it is possible to inspect line defects by using the operation of the driver. The operation will be described below.

The shift register is operated by applying a voltage waveform at a predetermined voltage and timing. The sample holder is dot-sequentially driven according to the output timing of the shift register to read the video signal into the source line. When a constant voltage is applied as a video signal, the voltage is applied to the source line during the sample holder selection period. When the transistor of the detection circuit is turned on, the detection terminal line (Fig. 3-3
The source line voltage is applied to 3) according to the timing of selecting the sample holder. A defect can be detected by detecting this signal and performing a comparison inspection with a normal signal.

The above is the detection operation, but the detection transistor (see FIG.
It is necessary to turn off the gate input of 32) to make it non-conductive. When the off-resistance of this transistor is low, if a potential difference occurs between the source lines, crosstalk may occur and the amplitude of each source line may change, which may prevent accurate gradation display.

By adopting the LDD structure transistor or the offset gate structure transistor of the present invention, a sufficiently high off-resistance can be realized, so that it is possible to prevent the above crosstalk.

Next, the LDD structure and the offset gate structure in the present invention will be described in detail. The detection transistor of the line defect detection circuit according to the present invention has a sectional structure as shown in FIG. Thin film silicon is formed on the glass transparent substrate 5 and patterned. The gate insulating film 3 is formed thereon, and the gate electrode 4 is further formed. Next, P (phosphorus) or B (boron), which is an impurity atom, is implanted by an ion implantation method or a diffusion method, but the source / drain region after implantation is A directly below the end face of the gate electrode shown in FIG.
The structure that is more outside B than the channel part is called an offset gate structure, and the structure in which a lower concentration of impurity atoms exists between A and B than the source / drain part is called an LDD structure. When these structures are used, when a voltage is applied between the source and the drain, the electric field in the vicinity of the drain end is relaxed, and the leak current due to electric field excitation is reduced as compared with the conventional structure. As a result, the off current is reduced by two digits, and the off resistance is increased. As a method of manufacturing thin film silicon used for this structure, there is a method of forming polycrystalline silicon by a low pressure CVD method. There is also a method of forming amorphous silicon by plasma CVD and then recrystallizing it by thermal annealing or laser annealing to form thin film silicon. As a process for realizing the LDD structure or the offset gate structure, there is a method for realizing the LDD structure or the offset gate structure by controlling the etching amount of the gate length at the time of patterning a metal or a semiconductor serving as a gate electrode. As another method, there is a method in which a TEOS film is applied after patterning a metal or a semiconductor to be a gate electrode, the TEOS film is vertically etched and patterned by a RIE (reactive ion etching) method, and then an impurity region is formed. By adopting such a method, it is possible to realize an LDD structure or an offset gate structure and reduce the off current of the transistor. By using this transistor in the line defect detection circuit, crosstalk between the source lines is eliminated, defects caused by the detection circuit can be reduced, and the yield can be improved.

[Brief description of drawings]

FIG. 1 is a sectional view of a transistor for line defect detection according to the present invention.

FIG. 2 is a sectional view of a transistor for detecting a line defect according to a conventional technique.

FIG. 3 is an equivalent circuit diagram of an active matrix substrate including a line defect detection circuit.

[Explanation of symbols]

1 Transistor Channel Part 2 Transistor Source / Drain Part 3 Gate Insulating Film 4 Gate Electrode 5 Glass Substrate 31 Line Defect Detection Circuit Detection Transistor Gate Electrode Wiring 32 Line Defect Detection Transistor 33 Line Defect Detection Terminal 34 Source Line 35 Sample Hold Transistor 36 Video Line 37 Horizontal scanning shift register circuit 38 Pixel transistor 39 Gate line

Claims (2)

[Claims] 1. In an active matrix substrate constituting a liquid crystal display, a thin film transistor constituting a line defect detection circuit formed on the active matrix substrate is an LDD (Lightly Doped Drain).
A line defect detection circuit having a structure. 2. A line defect detecting circuit, wherein a thin film transistor forming the line defect detecting circuit has an offset gate structure.