JPH0666652B2 - Voltage controlled oscillator - Google Patents

Description

The present invention relates to a voltage controlled oscillator (VCO), and more particularly to a voltage controlled oscillator suitable for improving distortion of input voltage-oscillation frequency characteristics in a high frequency region. .

[Background of the Invention]

Conventionally, as a basic circuit of a voltage controlled oscillator (VCO), Shuji Nakazawa, 2 other translations "Analog Integrated Circuit", Modern Science Co., Ltd., published on September 15, 1975, P333-334 There is an emitter-coupled multivibrator type. An application circuit based on the basic circuit is generally a circuit block as shown in FIG. However, in the applied circuit, the oscillation voltage applied to the capacitor C in FIG.
_BE (V) is fixed, but it can be set arbitrarily.

The VCO 64 is composed of an oscillating unit, a differential amplifying unit, and an output buffer unit, and the voltage Vin (V) input to the voltage controlled current sources 61 and 62 having the same input terminals with the same characteristics in the oscillating unit.
Is converted into the oscillation current I (A), and I∝Vin ... (1) The converted current I is turned on / off by the transistors 57 and 58.
When the external timing capacitor 63 is charged and discharged based on the F state, the oscillation state is established. During the oscillating operation, the 8th
As shown in FIG., V _STA terminal 50 is "Low" state, the voltage at the input terminal 51, 52 of the differential amplifier 59 "0" ~ "-V F " (V),
The voltage amplitude of the output terminals 53 and 54 of the differential amplifier 59 is ΔV (V),
The voltage difference between the input terminals 53 and 54 of the differential amplifier 60 is ± ΔV (V).

At this time, the voltage generated at both ends 55, 56 of the external timing capacitor 63 has the waveform shown in FIG. 8, so the oscillation frequency f (Hz) by the VCO 64 is Becomes Where C is the value of the external timing capacitor 63 (F), ΔV is the single-ended output voltage amplitude (V) of the differential amplifier 59, I is the oscillation current (A) proportional to the input voltage Vin (V), and tpd is tpd. This is the signal propagation delay time (sec) due to the element characteristics in the feedback loop between the oscillator and the differential amplifier. Generally, the external timing capacitor 63 is short-circuited and the output polarity of the differential amplifier 59 is reversed to VCO64. Is equal to one cycle (sec) when toggle oscillation is performed.

From this, for example, the output voltage amplitude ΔV of the differential amplifier 59
Is 0.8 (V), and the value C of the external timing capacitor 63 is 50 (p
F), signal propagation delay time tpd is 8 (nS), and oscillation current I is 5
In the state of (mA), the oscillation frequency f output from the VCO 64 is 25 (MHz).

In this way, f (MHz) is changed according to the value of Vin (V).
The VCO64 is used, for example, as an oscillator of a PLL (Phase Locked Loop) circuit in a data discrimination window generation circuit of a magnetic disk storage device, but with the recent increase in data transfer speed, oscillation in a higher frequency range is generated. Is required. In addition, the input voltage Vin
When (V) is made equal to a certain reference bias voltage Vo (V), it is necessary to adjust the oscillation frequency fo (Hz) at that time accurately (for example, about ± 0.1%). It should be noted that fo is particularly referred to as “free-running oscillation frequency”, and the oscillation current Io at this time is particularly referred to as “center oscillation current”.

In order to satisfy the above requirements, in the VCO 64, the output voltage amplitude ΔV of the differential amplifier 59, which varies from the manufacturing point of view,
(V), the signal propagation delay time tpd (sec), and the external timing capacitance 63 having a tolerance of about 1%. 62
The conversion characteristic of is adjusted and the value of the central oscillation current Io (A) is changed to match within the range of the predetermined free-running oscillation frequency fo (Hz).

However, with the above measures, the input voltage-oscillation frequency wave characteristic of the VCO 64 becomes a curve 71 in which a deviation occurs in the high frequency range from the ideal curve 70 shown in FIG. This is a constant term that does not depend on the oscillation current I (A) in equation (2) in the high frequency range.
tpd cannot be ignored, that is, [4CΔV / I] >> tpd
This is because the condition of is no longer satisfied and the input voltage-oscillation frequency characteristic becomes non-linear.

Therefore, in order to operate the VCO 64 in a higher frequency range, the value C (F) of the external timing capacitor 63 and the single-ended output voltage amplitude ΔV (V) of the differential amplifier 59 are reduced, and the oscillation current I (A ) Is required to improve the device characteristics in order to reduce the signal propagation delay time tpd (sec) as well as to devise the circuit.

From the above, similar to the above, for example, the output voltage amplitude ΔV of the differential amplifier 59 is 0.4 (V) and the value C of the external timing capacitor 63 is 2
0 (pF), oscillation current I 5 (mA), signal propagation delay time tpd
In the state in which is reduced to 2 (nS), the oscillation frequency f output from the VCO 64 can be set to 120 (MHz), but in reality, the lead wire of the external timing capacitor 63 and
The characteristic was the input voltage-oscillation frequency like the curve 72 in which characteristic distortion occurs at a certain frequency due to the influence of the parasitic inductance in the lead wire of the IC package.

[Object of the Invention]

An object of the present invention is to solve such a conventional problem and to realize an emitter-coupled multivibrator type voltage controlled oscillator (VCO).
In order to provide a voltage controlled oscillator that can obtain the characteristic of input voltage-oscillation frequency without characteristic distortion in a high frequency range and can reduce the signal propagation delay time tpd without limiting the application range of the user. It is in.

[Outline of Invention]

In order to achieve the above object, the voltage controlled oscillator of the present invention,
At least two voltage-controlled current sources (18, 19) that convert the input voltage Vin into current (I), an emitter-coupled multivibrator that oscillates based on the current (I), and an emitter-coupled multivibrator that amplifies the output of oscillation. A differential amplifier (2) for negative feedback to the vibrator, terminals (4, 6) coupled to the differential amplifier (2) for adjusting the voltage of the negative feedback, and a current (I).
Capacitors (C _{1 to} C _n ) that oscillate by charging and discharging the
Variable capacitor (3) composed of a plurality of capacitors (C _{1 to} C
_n ) is formed on the same semiconductor chip together with a switching device (S _{1 to} S _n ) for opening or shorting the connection and fixedly combining.

Example of Invention

 Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows a voltage controlled oscillator (VC
It is a block diagram of (O). In the figure, 11 and 12 are diodes with equal characteristics, 13 and 14 are resistors with equal characteristics and resistance values, 15 and 16 are NPN transistors with equal characteristics, and 17 has positive and negative input / output terminals. A differential amplifier, 18 and 19 are current-drawing type voltage controlled current sources having a common input terminal 9, 2 are positive and negative input / output terminals, and an oscillation operation is started in the same manner as the V _STA terminal 50 described above. A differential amplifier 3 having a switching input terminal V _STA 6 capable of indicating / stop and an adjustment terminal 4 connecting a resistor 5 for adjusting the characteristics of input voltage-oscillation frequency is a variable capacitor, and a capacitance value Are formed on the same semiconductor chip in such a manner that the DC bias power supplies V _CC and V can be changed.
Power supply terminals for supplying _EE , 7 and 8 are output terminals for sending out differential signals having mutually opposite polarities from the differential amplifier 17, and 20 to 25 are connection terminals.

As shown in Fig. 1, the circuit configuration of VCO1 includes diodes 11,1
The anode of 2 and resistors 13, 14 are connected to the power supply terminal V _CC 10, and the opposite side, that is, the cathode of the diode 11 and the other end of the resistor 13 are connected via the connection end 20 of the NPN transistor 1.
5 is connected to the positive input terminal of the differential amplifier 2, and the cathode of the diode 12 and the other end of the resistor 14 are connected via the connection terminal 21 to the collector of the NPN transistor 16 and the negative input terminal of the differential amplifier 2. Connect to.

Similarly, the positive output of the differential amplifier 2 is connected via the connection 22 to the positive input of the differential amplifier 17 and the base of the NPN transistor 16, while the negative output is connected via the connection 23. Connected to the negative input terminal of the differential amplifier 17 and the base of the NPN transistor 15. The emitter of the NPN transistor 15 is connected to the output end of the voltage controlled current source 18 and one end of the variable capacitor 3 via the connection end 24, while the emitter of the NPN transistor 16 is connected via the connection end 25 to the voltage control current source. It is connected to the output end of 19 and the other end of the variable capacitor 3. Differential amplifier 17
Of the positive and negative output terminals to the output terminals 7 and 8, respectively, and the other output terminals of the voltage controlled current sources 18 and 19 to the DC bias power supply V
_{To EE} , the common control input terminals of the voltage controlled current sources 18 and 19 are connected to the input terminal 9, and the amplitude adjusting terminal and the switching input terminal of the differential amplifier 2 are connected to the adjusting terminal 4 and the switching input terminal 6, respectively. A resistor 5 for voltage adjustment described later is connected to the adjustment terminal 4. The above-mentioned elements except the resistor 5 are formed on the same semiconductor chip.

The VCO1 oscillates by the same oscillation mechanism as the VCO64 of FIG. 7 described above, and the input voltage Vin from the input terminal 9
Output terminal of oscillation frequency f (H _Z ) corresponding to the value of (V)
Send to 7,8. The oscillation frequency f (H _Z ) is the same as in the above equation (2). Becomes However, C _X is the value (F) of the variable capacitor 3, V _X
Is the single-ended output voltage amplitude (V) of the differential amplifier 2,
tpd is the signal propagation delay time (sec), I is the input voltage Vin
The oscillation current (A) is proportional to (V). The difference from the VCO 64 described above is that a resistor 5 for adjusting V _X is connected to the differential amplifier 2 and the variable capacitor 3 is formed on the same semiconductor chip.

FIG. 2 is a configuration diagram of the variable capacitor 3 showing an embodiment of the present invention. In the figure, C ₀ , C ₁ , C ₂ , C ₃ ... Cn are capacitors formed on the same semiconductor chip with the values described later, and S ₁ , S ₂ , S ₃ ... Sn are open. Alternatively, it is a switch that can be set to a short-circuited state.

The capacitors C _{0 to} Cn set the value C _X (F) as the variable capacitor 3 to the minimum C _X mi when all the switches S _{1 to} Sn are opened.
n (F), and conversely, when all are short-circuited, the maximum C _X max (F) is set. When expressed by an equation, C _X min = C ₀ × (1 + α) …… (4) C _X max = (C ₀ + C ₁ + C ₂ +… + Cn) × (1 + α) ……
(5) However, α is an error of the capacitance value due to manufacturing variations and is generally about ± 20%.

Further, the capacitors C _{0 to} Cn are the values C as the variable capacitor 3.
_In order to set _X (F) to the target value C _TG (F), the value is set to C ₀ = C _TG / 2 (F) ...... (6) C ₁ = C _TG / 2 (F) ...... ( _{7) C 2 = C TG /} 2 2 (F) ...... (8) C 3 = C TG / 2 3 (F) ...... (9):: Cn = C TG / 2 n (F) ...... (10 ).

C _X min (F) and C _X m when configured to the above values
ax (F) is calculated from the above equations (4) and (5), Becomes That is, the value C _X (F) of the variable capacitor 3 is (1
The value _{C X} by from 1) according to the value _{C X min (F) (12} ) Equation
It is possible to set an arbitrary capacity value in units of C _TG (1 + α) / 2 ⁿ (F) by opening or switching each switch S _{1 to} Sn from the maximum (F). Becomes
That is, as shown in FIG. 4, when the manufacturing variation α = 0, the adjustment range is 0.5 C _TG to [1.5− (1/2 ⁿ )].
C _TG (F), set pitch is C _TG / 2 ⁿ (F), and the adjustment range is 0.6 C _TG when manufacturing variation α = + 20%.
~ [1.8- (1.2 / ²ⁿ )] C _TG (F), setting pitch is 1.
2C _TG / ² n (F), and the adjustment range is 0.4C _TG ~ in the case of manufacturing variations alpha = -20% [1.2- (0.8 / ^{n n)]}
C _TG (F), setting the pitch becomes ^{_{0.8C TG / 2 n (F)}} .
Therefore, with this configuration, manufacturing variation is ± 20%.
The value C _X (F) of the variable capacitor 3 at
Maximum value from _TG (F) [1.2- (0.8 / ²ⁿ )] C _TG (F)
Maximum error (1.2 / 2 ^{n + 1} ) C _TG (F)
Can be arbitrarily set in units of.

From the above, for example, when the number of stages n to be provided is “6”,
From the range of C _X (F) a 0.6C _TG ~1.19C _TG (F), can be set to any value of the maximum error _{0.0094C TG (F) (= 0.94} %). Moreover, if the manufacturing variation is ± 30%, the number of stages to be provided n
When is set to "6" as above, C _X (F) is 0.65C
Maximum error 0.0102C from _{TG to} 1.039C _TG (F) range
_It can be arbitrarily selected by the value of _TG (F).

Figure 3 (a) ~ (c) shows an implementation of an open or short circuit condition of the switching device S ₁ to Sn.

In FIG. 5A, by supplying a large current between the terminals T _{1 and} T _{3 and} between the terminals T _{2 and} T ₃ , the diodes D _S1 and D _S1 are respectively _discharged .
_This is a method in which the junction of _S2 is destroyed and the terminals T _{1 and} T ₂ are opened to short-circuited. In the same figure (b), a large current is passed between the terminals T _{1 and} T ₂ so that the fuse H _S1
In contrast to the above, the circuit between terminals T _{1 and} T ₂ is opened by short-circuiting. In the figure (c), terminal T ₁
-The metal wire connecting between -T ₂ is irradiated with laser light to melt it,
Similar to (b) above, it is a method of changing the terminals T _{1 and} T ₂ from a short circuit to an open state.

FIG. 5 is a circuit diagram showing an embodiment of the differential amplifier 2. In the figure, the connection terminals 20 to 23, the resistor R _X 5, the adjusting terminal 4, the switching input terminal 6, and the DC bias power source V _EE are the same as those in FIG.

In the differential amplifier 2, the signal V _STA from the switching input terminal 6 is "H".
When it is at "igh" level, transistor Tr ₅ is turned on to stop the amplification function, and when it is at "Low" level, Tr ₅ is turned on.
Turn OFF to execute amplification operation. Further, since the emitter voltage of the transistor Tr ₅ can be changed according to the value of the adjustment resistor R _X 5, the connection end 22 and the connection end 23 can be changed.
It is possible to adjust the output voltage amplitude V _X (V) of

The single-ended output voltage amplitude V _X (V) of the differential amplifier 2 by the adjustment is V _X = [R ₃ / (R ₁ + R _X )] × (−V _EE −V _BE ) (V)
It can be represented by (13). Although the variable resistor 5 is externally attached to the adjustment terminal 4 in the present embodiment, it is also possible to connect a circuit network having a temperature compensation function or the like.

As described above, by forming the variable capacitor 3 on the same semiconductor chip with an accuracy equal to or higher than that of individual components, the parasitic inductance associated with wiring can be extremely reduced, and the high frequency range of the input voltage-oscillation frequency characteristic. It is possible to eliminate the characteristic distortion in. Further, the variable capacitor 3 is composed of the capacitors C _{0 to} Cn having the values shown in the equations (6) to (10), and the switching devices S _{1 to} Sn for connecting them are provided, so that the variable capacitor The value C _X (F) of the device 3 can be easily and accurately set to the target value C _TG (F), and the timing capacitor 63 is connected to the differential amplifier 2 in the past. Since the adjustment resistor 5 compensates for the input voltage-oscillation frequency characteristic, it is possible to prevent the degree of freedom of application by the user, which is reduced when the timing capacitance is fixed.

〔The invention's effect〕

As described above, according to the present invention, by forming the variable capacitor on the same semiconductor chip, the parasitic inductance is remarkably reduced, the characteristic distortion in the high frequency range is removed, and the signal propagation delay time tpd is also reduced. Tens of MHz because it becomes smaller
Good input voltage-oscillation frequency characteristics can be obtained even in the above high frequency range. Further, since the variable capacitor is composed of a plurality of capacitors having different values, the application range of the user is prevented from being limited.

[Brief description of drawings]

FIG. 1 shows a voltage controlled oscillator (VC
O) block diagram, FIG. 2 is a configuration diagram of the variable capacitor 3, FIGS. 3 (a) to 3 (c) are diagrams for explaining a method of realizing the switches S _{1 to} Sn, and FIG. 4 is a variable diagram. FIG. 5 is a diagram for explaining a method of setting the value C _X (F) of the capacitor 3, FIG. 5 is a circuit diagram of the differential amplifier 2, and FIG. 6 is a circuit showing a basic circuit of a conventional voltage controlled oscillator (VCO). Figures and 7 show conventional voltage controlled oscillators (VC
8) is an equivalent block diagram of the application circuit, FIG. 8 is an operation timing chart of FIG. 7, and FIG. 9 is an input voltage-oscillation frequency characteristic diagram of FIG. 1,64: Voltage controlled oscillator (VCO), 2,17,59,60: Differential amplifier, 3: Variable capacitor, 4: Adjustment terminal, 5,13,14, R _{1 to} R ₄ : Resistor, 6 : Switching input terminal, 7, 8: Output terminal, 9: Input terminal, 10, 2
6: Power supply terminal, 11,12, Ds ₁ ,, Ds ₂ : Diode, 15,16,57,58,
Tr1 to Tr5: NPN transistor, 18, 19, 61, 62: Voltage controlled current source, 20 to 25, 51 to 54: Connection end, 50: V _STA terminal, 55, 56: External terminal, 63: External timing capacity , 70: Ideal characteristic curve, 7
1,72: Characteristic curve, T _{1 to} T ₃ : Terminal, C _{0 to} Cn: Capacitor, Hs ₁ : Fuse, S _{1 to} Sn: Switching device.

Claims (1)

[Claims] 1. At least two voltage-controlled current sources that convert an input voltage into a current, an emitter-coupled multivibrator that oscillates based on the current, an output of the oscillation is amplified, and a negative feedback is given to the emitter-coupled multivibrator. A differential amplifier, a terminal for adjusting the voltage of the negative feedback, which is coupled to the differential amplifier, a variable capacitor including a plurality of capacitors that perform the oscillation by charging and discharging the current, A voltage-controlled oscillator in which a switching device for fixedly connecting a plurality of capacitors by opening or short-circuiting them is formed on the same semiconductor chip.