JPH066231A - Dc component deleting circuit - Google Patents

Abstract

PURPOSE:To prevent the occurrence of noise tones and the distortions by performing the opposite phase addition between an input analog signal and the output obtained by integrating the bit stream signals undergone with the sigma-delta (SIGMADELTA) modulation through a resistor, extracting a DC component, and then adding the output of the DC component to the input analog signal through the resistor. CONSTITUTION:The digital outputs undergone the SIGMADELTA modulation are integrated by a resistor R2 of an integrating means and a capacitor C1. Thus an output is obtained and undergoes the adverse phase addition with the analog signal which does not undergo the obersampling, the SIGMADELTA modulation and the A/D conversion yet through a resistor R1 of a DC component extracting means, the resistor R2, a resistor R4, a capacitor C2, and an operational amplifier circuit 21. Then the output of the DC component is added to the analog signal by the resistors R5 and R6 of an adder means. Thus it is possible to prevent the occurrence of noise tones and distortions due to the characteristic fluctuation of a D/A converter and to prevent the generation of the feedback voltage even if the input cycle is increased and the MSB is kept at 1 or 0 for a long period as long as no DC component exists.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a DC (direct current) for servoing an AD converter of, for example, a ΣΔ modulation system.
The present invention relates to a DC component removing circuit suitable for application to servos and the like.

[0002]

2. Description of the Related Art Conventionally, various devices have been used to convert an input analog signal into digital data by an ΣΔ modulation type AD converter.

This A-D converter has the characteristic that even if there is no DC offset in the input analog signal, the output contains a DC component due to the characteristics of the IC of the A-D converter such as temperature change. There is.

If the output contains a DC component, it becomes a problem when recording data on a magnetic medium, for example. That is, if the output of the A / D converter contains a DC component, when this data is modulated into an analog high frequency signal, the eye pattern of the analog high frequency signal obtained by the modulation is broken. Then, when a high-frequency signal with a collapsed eye pattern is recorded, the reading accuracy of the high-frequency signal recorded during reproduction deteriorates.

For example, in a compact disc,
The direct current offset is within 60 dB, and the modulation format is such that the pits are random when there is no direct current component in the signal converted into digital data by the AD converter. Therefore, if the direct current component (direct current offset) exceeds 60 dB, the pits will be regularly arranged, which deteriorates the reading accuracy.
An error occurs.

The DC component in such digital data will be described with reference to FIG. Figure 7 is so-called 2 '
It is explanatory drawing which shows the example of the digital data of sCOM format. In FIG. 7, digital data is converted to MSB.
(Most Significant Bit: most significant bit), 2SB and LSB (Least Sign)
if it is the same bit (least significant bit), ± 0
The data on the plus side and the minus side are shown centering around. As shown in this figure, the centers are "000" and "11".
In the case of "1", the MSB is always "0" on the plus side and "1" on the minus side.

In the explanatory view shown in FIG. 7, if the center (all 0 and all 1 appear at the same probability at the midpoint in the AD converter) is "000" and "111".
In the case of, data is evenly output with "0" and "1" both on the plus side and the minus side centering on "000" and "111".

That is, the true midpoint voltage of the A-D converter (the point where the DC offset becomes "0") is the MSB.
At the point of transition from “0” to “1”,
The probability of becoming "0" and the probability of becoming "1" are 50% each.

When the MSB is actually observed when the midpoint voltage is actually applied to the A-D converter, the midpoint is swung by a minute signal such as residual noise. For example, in the case of the sample points shown in FIG. 8B, the MSB is As shown in FIG. 8A, "0"
And "1" are output with almost the same probability in the time axis direction.

Therefore, when the MSB is analog-integrated when the midpoint voltage is applied, a voltage equivalent to "0.5" can be obtained. However, the midpoint voltage deviates positively or negatively, that is, a DC offset occurs. Then, since the MSB is fixed to "0" or "1", the analog integrated value having an infinite DC gain diverges into plus or minus.

Therefore, in the example shown in FIG. 7, if there is a DC component (DC offset), and the centers at that time are "011" and "010", "01"
Since "1" and "010" are not output, the number of times "0" is output is reduced in this case, which causes the output to be deformed to "0" or "1", resulting in poor reading accuracy. .

Therefore, conventionally, as shown in FIG. 9, for example,
The so-called DC component removing circuit removes the DC component from the A / D converter 3.

That is, as shown in FIG. 9, the input analog signal applied to the analog input terminal is supplied to the A / D converter 3.
Is converted into digital data by, and the converted digital data is output as MSB, 2SB, 3SB, ... LSB, and this output is subjected to digital signal processing on the data by a signal processing circuit at the next stage (not shown) and MSB output. Is inverted by the inverter 4 and the inverted output is supplied to the integrating circuit 8 composed of the capacitor 7 and the operational amplifier circuit 6 via the resistor 5, and the integrated output obtained by integrating the MSB output by the integrating circuit 8 Is added to the adder circuit 2, the analog input signal from the input terminal 1 and the integrated output from the integrator circuit 8 are added in this adder circuit 2, and the added output is negatively fed back to the AD converter 3 as the original servo signal. Therefore, the DC component is removed.

[0014]

As described above, as shown in FIG.
In the DC component removing circuit shown in, the characteristics of MSB,
That is, if the midpoint shifts to plus or minus even a slight amount, it is fixed to "0" or "1", and by utilizing this, the analog integrated value having infinite DC gain diverges to plus or minus. , The MSB of the normal sampling output data of the A / D converter 3 is taken out and analog-integrated, and the obtained voltage is negatively fed back to the A / D converter input, and the average value of the MSB is held at “0.5”. The MSB servo system is adopted.

In this method, the MSB is constantly swung by the servo voltage so that the average value of the MSB becomes "0.5" in order to obtain the midpoint. However, M
Since SB only represents the sign, if the average value of MSB is equivalent to "0.5", the amplitude of the feedback voltage is not related to the integrating circuit 8.

This will be described with reference to FIG.

In FIG. 10, the relationship between the servo feedback voltage and the time change of the MSB is shown in two graphs with the vertical axis representing the voltage error with respect to the midpoint and the horizontal axis representing time and sample points. Further, in this graph, the original feedback voltage shown by the solid line P2 and the feedback voltage shown by the one-dot chain line P3 that does not have the original amplitude due to the difference in the time constant due to, for example, variations in the integrating circuit 8 are shown.

As shown in FIG. 10, the time variation of the MSB is shown by a broken line P1. Of the 40 samples, 20 samples are "1", the remaining 20 samples are "0", and the average value of MSB is "0". .5 ”.

At this time, since the feedback voltage indicated by the solid line P2 passes through only the zero cross, the zero cross ± 1 / 2LSB.
Since the noise is regarded as noise having an amplitude within the range and does not exceed the minimum resolution of the A / D converter 3, the S / N when there is no signal does not deteriorate.

On the other hand, since the feedback voltage indicated by the alternate long and short dash line P3 has the amplitude of zero cross ± 2LSB, it clearly exceeds the resolution of the A / D converter 3, so that the S / N when there is no signal is to degrade.

Actually, if ± 0.5 LSB, A-D
It is not converted, but if it exceeds ± 0.5 LSB, it is AD converted, and the integrating circuit 8 integrates it, and since the data obtained by integration is added in anti-phase, it becomes noise, and further, Due to an increase in the amplitude of the servo feedback voltage depending on the circuit configuration of the servo system and the surrounding conditions, this noise causes an increase in noise, tone (oscillation sound in a specific range), and distortion.

Therefore, in the MSB servo system, it is necessary to appropriately set the servo gain to suppress the amplitude of the feedback voltage. Especially, a resolution of 16 to 20 bits is required like the A-D converter for audio. , The voltage corresponding to ± 1/2 LSB, which is the setting target of the servo feedback voltage amplitude for an input signal of several volts, is on the order of microvolts.

In the example of FIG. 10, if 16-bit quantization and full scale of 6.5 V are used, 1 LSB is used.
Is 1/65000, which is 100 μV. That is, a variation of 100 μV will occur due to the variation.

That is, in the system shown in FIG.
It is very difficult to set and adjust the gain, which causes the inconvenience of causing noise, tone, distortion, etc.

Further, when a low-frequency analog signal is input, the MSB is fixed for a long time, which makes the state close to that in which a DC voltage is input, the servo feedback voltage amplitude becomes larger than when there is no signal, and noise is increased. It is easy to cause an increase in vibration and a vibration state.

This will be described with reference to FIG.
FIG. 11 is a graph showing the relationship of the MSB with respect to the analog input amplitude, with the vertical axis representing amplitude and the horizontal axis representing time and sample points. Further, in FIG. 11, the broken line P4 is indicated by M
The time-dependent change in SB, and the alternate long and short dash line P5 and the solid line P6 are analog inputs.

As shown in FIG. 11, the movement of the MSB is influenced only by the zero-cross cycle of the input (shown by the solid line P6 and the alternate long and short dash line P5) and does not depend on the amplitude of the input at all.
The same feedback voltage is generated for the servo feedback voltage regardless of the input amplitude, that is, the servo feedback voltage is not linear with respect to the DC offset regardless of the magnitude of the DC voltage.

Therefore, when the servo feedback voltage is added to the input analog signal, the smaller the input amplitude, the more
It will be greatly affected by the servo feedback voltage.

That is, when the cycle of the input signal becomes very large (eg, 1 KHz), the MSB continues to be in the state of "0" or "1", so that the input has no DC component, but the input has no DC component. Since there is a component, a feedback voltage is output, which causes noise and distortion.

Then, even for inputs with different amplitudes, the MS
Since B is constant, no feedback is provided by the DC component regardless of the DC component of the input, which causes the servo to have non-linear characteristics.

Further, when the A-D converter 3 shown in FIG. 9 is replaced with an over-sampling ΣΔ modulation type A-D converter which has been used in recent years, a big problem as described below occurs. This will be described with reference to FIG.

Circuit (audio circuit) shown in FIG. 12A
Is a bit stream signal B of 1 to several bits obtained by A / D converting the input analog signal Ia from the input terminal 10 by an A / D converter 11 of the oversampling ΣΔ modulation method.
s, this bit stream signal Bs is converted into an audio band by a FIR (Finite Impulse Response) digital decimation filter 12 to obtain a so-called normal sampling output Ns, and this normal sampling output Ns is not shown via an output terminal 13. To the signal processing circuit.

In such a circuit, for example, FIG.
As shown in, when the analog impulse Ai supplied through the input terminal 10 is AD-converted by the ΣΔ modulation AD converter 11, the bit stream impulse data Bi obtained by the conversion is dl1 with respect to the analog impulse Ai. It will be delayed.

When the bit stream impulse data Bi is processed by the FIR decimation filter 12, the normal sampling impulse data Ni obtained by this processing is delayed by dl2 (for example, about 1 msec) with respect to the original analog impulse Ai. .

FIG. 13 is a waveform diagram showing changes in MSB and servo voltage with respect to DC offset depending on the presence or absence of delay, with the vertical axis representing amplitude and the horizontal axis representing time and sample points (FIG. 13E).

No normal sampling delay A
In the -D converter, when the DC offset shown by the solid line P7 in FIG. 13A occurs, the MSB has a waveform as shown by the solid line P8 in FIG. 13B, and the servo signal obtained by integrating this is shown by the solid line P9 in FIG. 13C. It has a waveform, so the result of adding the DC offset and the servo signal is shown in FIG. 13D.
The waveform has a solid line P10.

On the other hand, in the AD converter of the oversampling ΣΔ modulation system, since there is a delay due to the FIR digital filter, when the DC offset shown by the solid line P7 in FIG.
13C has a delayed waveform as shown by a broken line Pd1, and the servo signal obtained by integrating this has a waveform shown by a broken line Pd2 in FIG. 13C. Therefore, the sum of the DC offset and the servo signal has a waveform shown by a broken line Pd3 in FIG. 13D. Becomes

Therefore, as shown in FIG. D, the amplitude of the added waveform (solid line P10) of the DC offset and the servo signal by the A-D converter without the delay of the normal sampling and the A-D converter of the oversampling ΣΔ modulation system. The amplitude of the added waveform of the DC offset and the servo signal (broken line pd3) causes a maximum difference of x1 and x2 in the plus direction and the minus direction, respectively.

That is, when the AD converter of the oversampling ΣΔ modulation system is used, the servo feedback voltage does not immediately respond to the positive / negative change of the DC offset, so that the convergence of the DC offset may be delayed or the DC offset may be changed. However, there is an inconvenience that an accurate servo cannot be applied and an oscillation occurs.

The present invention has been made in view of the above problems, and an object of the present invention is to propose a DC component removing circuit capable of eliminating many of the above problems.

[0041]

A direct current component removing circuit of the present invention removes a direct current component of an output digital signal in oversampling sigma delta modulation analog-digital conversion, as shown in FIGS. 1 to 6, for example. In the circuit, integrating means R2 and C1 for integrating the digital output after sigma-delta modulation, and this integrating means R
2, output from C1 oversampling sigma
DC component extraction means R for extracting a DC component by adding the opposite phase to the analog signal before the delta modulation analog-digital conversion.
1, R2, R4, C2, 21 and addition means R5, R6 for adding the output from the DC component extraction means R1, R2, R4, C2, 21 to an analog signal.

The DC component removing circuit of the present invention is shown in FIG.
As shown in FIG. 6, in the DC component removing circuit for removing the DC component of the output digital signal in the oversampling, sigma-delta modulation analog-digital conversion, the DC component for removing the DC component contained in the input analog signal in advance. Removing means C3, integrating means R2, C1 for integrating the digital output after sigma-delta modulation,
DC component extraction means R1, R2, R4, C2, 21 for extracting the DC component by adding the output from the integrating means R2, C1 in anti-phase with the analog signal before the oversampling / sigma / delta modulation analog-digital conversion. , Adding means R5, R6 for adding the outputs from the DC component extracting means R1, R2, R4, C2, 21 to the analog signal.

The DC component removing circuit of the present invention is shown in FIG.
As shown in FIG. 6, in the DC component removing circuit for removing the DC component of the output digital signal in the oversampling sigma delta modulation analog-digital conversion, the noise removing means C1 for removing noise due to noise shaping, and the sigma-delta Integrating means R2 and C1 for integrating the modulated digital output, and the integrating means R
2, output from C1 oversampling sigma
DC component extraction means R for extracting a DC component by adding the opposite phase to the analog signal before the delta modulation analog-digital conversion.
1, R2, R4, C2, 21 and addition means R5, R6 for adding the output from the DC component extraction means R1, R2, R4, C2, 21 to an analog signal.

[0044]

According to the structure of the present invention, the output obtained by integrating the digital output after the sigma-delta modulation by the integrating means R2, C1 is the DC component extracting means R1, R2, R4, C2, 21.
In step S4, the DC signal is extracted by performing anti-phase addition with the analog signal before the oversampling / sigma / delta modulation analog-digital conversion, and this output is added to the analog signal by the adding means R5 and R6.

According to the configuration of the present invention, the DC component contained in the input analog signal is removed by the DC component removing means C3.
In advance, the digital output after sigma-delta modulation is integrated by integrating means R2, C1, and the integrated output is oversampled, sigma-delta modulated analog by DC component extracting means R1, R2, R4, C2, 21. -Analog phase addition with the analog signal before digital conversion is performed, and this output is added to the analog signal from which the DC component has been removed in advance by adding means R5 and R6.

Further, according to the configuration of the present invention, the noise removing means C1 removes noise due to noise shaping, the digital output after sigma-delta modulation is integrated by the integrating means R2, C1, and this integrated output is extracted as a DC component. Means R1, R2, R4, C2, 21 perform anti-phase addition with the analog signal before oversampling, sigma-delta modulation analog-digital conversion to extract the DC component, and this output is converted into an analog signal by addition means R5, R6. to add.

[0047]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the DC component removing circuit of the present invention will be described in detail below with reference to FIGS.

FIG. 1 shows a first embodiment of the DC component removing circuit of the present invention.

In FIG. 1, parts corresponding to those in FIG. 9 are designated by the same reference numerals, and detailed description thereof will be omitted.

In FIG. 1, reference numeral 11 denotes an AD converter of the oversampling ΣΔ modulation system.
An input terminal 20 to which an analog input signal is supplied is connected to the input terminal of the converter 11 via a resistor R6, and
The input terminal of the AD converter 11 is connected to the output terminal of the operational amplifier circuit 21 via the resistor R5.

Of the output terminals of the A / D converter 11,
The output terminal from which the MSB is output is connected to the inverter 4 and the resistor R.
2 and R3 are connected to the inverting input terminal (-) of the operational amplifier circuit 21 respectively, and the MSB output terminal of the AD converter 11 is connected to the input terminal of the digital filter 22 (for example, FIR digital decimation filter). , 2SB to LSB of the AD converter 11 are connected to the input terminals of the digital filter 22, respectively.

The output end of the digital filter 22 is connected to the output terminal 23 to which an external circuit (not shown) is connected.

Further, the input terminal 20 described above is connected to the resistor R1.
And a resistor R as well as grounding via a capacitor C1.
1 and one end of R2 are connected. This connection point is referred to as an addition point sm in the figure. Further, the inverting input terminal (-) of the operational amplifier circuit 21 and the output terminal are connected by a parallel circuit of the capacitor C2 and the resistor R4 (a circuit that also serves as a low-pass filter and a gain adjustment).

The AD converter 11 and the digital filter 22 shown in FIG. 1 constitute an oversampling ΣΔ modulation type AD converter.

In FIG. 1, the inverter 4 outputs the bit stream signal obtained by the ΣΔ modulation A / D converter 11, and the bit stream signal is an analog demodulator composed of a resistor R2 and a capacitor C1. Is demodulating with.

As shown in FIG. 4, when the bit stream signal is 1 bit, this analog demodulator weights the bit stream signal input through the input terminal 24 with the resistor R2 and samples it with the capacitor C1. By doing so, the bit stream signal is demodulated.

When the bit stream signal is several bits, as shown in FIG. 5, the input terminals 24a, 24b,
24c and 24d are respectively weighted with resistors R2a and R2
One end of each of the resistors 2b, R2c, and R2d is connected, and the other end of each of the resistors R2a, R2b, R2c, and R2d is grounded via the capacitor C1. Where resistor R
If the resistance value of 2a is r, the resistance value of the resistor R2b is 2
r, the resistance value of the resistor R2c is 4r, and the resistance value of the resistor R2d is 8r.

In this case, the input terminal 24a is MSB, the input terminal 24b is 2SB, the input terminal 24c is 3SB,
A bitstream signal corresponding to the LSB is supplied to the input terminal 24d, these bitstream signals are demodulated by the resistors R2a to R2d and the capacitor C1, and the demodulated output is output from the output terminal 30.

Next, the operation of the circuit shown in FIG. 1 (eg, DC servo circuit) will be described. In the following description, the symbols of signals and the calculation of these symbols of signals are expressed as current.

First, the input analog signal Iac + Idci from the input terminal 20 passes through the resistor R6 and the ΣΔ modulation A−.
It is supplied to the D converter 11 and A / D converted. Here, Iac is the original input analog signal, and Idci is the DC offset included in this original analog signal. Therefore, hereinafter, the input analog signal is described as Iac + Idci as a signal obtained by adding the DC offset to the original signal. At the same time, the input analog signal Iac + Idci from the input terminal 20 passes through the resistor R1 and the addition point sm.
Is supplied to.

On the other hand, the bit stream signal from MSB to LSB from the ΣΔ modulation A / D converter 11 is supplied to the output terminal 23 through the digital filter 22, and through this output terminal 23, another signal processing circuit (audio system not shown) It becomes an audio signal processing circuit in the device). And MSB is inverter 4
Then, the phase is inverted at and is supplied to the addition point sm via the resistor R2.

The MSB phase-inverted bit stream signal is the input analog signal Iac + Idci supplied to the input terminal 20 and the ΣΔ modulation A-D converter 11.
DC offset Idcx obtained as a result of A-D conversion in
Of the high frequency noise generated by the noise shaping process of the ΣΔ modulation A-D converter 11, the high frequency noise Ins that cannot be completely removed by the low pass filter composed of the resistors R1 and R2 and the capacitor C1 (Ins = In
s2 + ins) is added and inverted, that is, −
(Iac + Idci + Idcx + Ins).

Therefore, at the addition point sm, Iac +
Idci- (Iac + Idci + Idcx + Ins) is calculated, and as a result,-(Idcx + I
ns). However, this result- (Idcx +
Of the high frequency noise Ins due to the noise shaping, only the noise ins is cut by the capacitor C1. Therefore, the signal supplied to the inverting input terminal (−) of the operational amplifier circuit 21 via the resistor R3 is -(I
dcx + Ins2).

This signal- (Idcx + Ins2)
Of the high frequency noise Ins2 is cut by a low-pass filter composed of a resistor R4 and a capacitor C2.
s (Vs = R4 / R3 × Idcx), that is, ΣΔ
The DC offset component generated by the modulation AD converter 11 is output, and this DC offset component, that is, the servo original signal is added to the input analog signal Iac + Idci from the input terminal 20 by the resistors R5 and R6, and this addition output is obtained. It will be supplied to the ΣΔ modulation A-D converter 11.

The high frequency noise due to the noise shaping contained in the DC offset component extracted by the circuit shown in FIG. 1 has a frequency half the sampling frequency of oversampling (32 to 128 times in the audio AD converter). If it is oversampling, it will be distributed around 700 KHz to 3 MHz, so if the cutoff frequency is sufficiently low (several Hz)
Hereinafter, high-frequency noise can be sufficiently removed by the first-order and second-order low-pass filters.

FIG. 6 is a graph showing the low-pass filter characteristic of a servo signal and the out-of-band noise characteristic of noise shaping, with the vertical axis representing amplitude (dB) and the horizontal axis representing frequency (Hz).

As shown in FIG. 6, since noise in the band shown by the solid line n1 may be removed, the characteristics shown by the broken line n2, for example, the characteristics of the first-order low-pass filter with a cutoff frequency of 1 Hz and the broken line n3, For example, it can be easily realized only by using a secondary low-pass filter having a cutoff frequency of 1 Hz.

As described above, in the first embodiment,
The bit stream signal after A / D conversion by the sigma-delta modulation A / D converter 11 and the input analog signal from the input terminal 20 are added by the resistors R2 and R1 to the addition point sm.
And the high frequency noise in
s is removed by the capacitor C1, and this high frequency noise ins
The high frequency noise Ins2 of the output − (Idcx + Ins2) obtained by removing the high frequency noise In is removed by the low pass filter including the resistor R4 and the capacitor C2.
The output from which s2 has been removed, that is, the DC offset component Idcx by AD conversion is obtained, and this DC offset component Idcx is obtained.
On the other hand, the feedback voltage (servo original signal) Vs is obtained by the resistor R4, and the feedback voltage Vs and the input analog signal supplied through the input terminal 20 are added by the resistors R5 and R6,
Since the signal is input to the ΣΔ modulation A / D converter 11 again, it is possible to prevent the occurrence of noise, tone (oscillation in a specific frequency band), and distortion due to variations in the characteristics of the A / D converter, and to reduce the input cycle. Even if the MSB becomes large and the MSB becomes “1” or “0” for a long period, the feedback voltage can be prevented from being generated when there is no DC component, thereby preventing generation of noise and distortion, and servo operation. Can be made to have a linear characteristic with respect to the DC component, and further, only a few samples are delayed with a sampling period of 32 to 128 times oversampling with respect to the input analog signal.
Since the ΔA-D converter 11 is used, the response of the servo feedback voltage with respect to the positive / negative change of the DC offset can be improved, and the convergence speed of the DC offset can be increased, and accurate servo operation can be performed.

Further, since the AC component is removed by adopting such a configuration, a good servo feedback signal without noise can be obtained only by a simple filter for removing the high frequency noise due to the remaining ΣΔ modulation. Also, the delay between the input analog signal and the bit stream signal is extremely small, the effect of canceling the AC component is high up to a high frequency band, the same good servo feedback signal as above can be obtained, and the convergence of the DC offset can be accelerated. Since the servo feedback signal proportional to the generated DC offset can be obtained, the gain can be easily set, and only the DC offset of the A-D converter alone can be canceled.

Therefore, when the circuit of the first embodiment shown in FIG. 1 is applied to, for example, a compact disc recording device, the pits can be arranged randomly, thereby reducing the error rate during reproduction of the compact disc. be able to.

Since the circuit shown in the first embodiment is a circuit for removing the DC component of the input signal (the DC component existing at the time of input and the DC component generated in the processing process), its application range is The present invention can be applied to various devices and circuits such as devices that record and reproduce voice, video, and various information other than voice and video.

Next, a second embodiment of the DC component removing circuit of the present invention will be described with reference to FIG.

In FIG. 2, a capacitor C3 is arranged in front of the resistor R1 of the DC component removing circuit shown in FIG. 1, that is, between the input terminal 20 and the resistor R2. Therefore, illustration and description of the inverter 4, the digital filter 22, the ΣΔ modulation AD converter 11 and the like shown in FIG. 1 are omitted, and other circuit configurations and connections are similar to those of FIG. The same reference numerals are given to the parts, and detailed description thereof will be omitted.

Next, the operation of the circuit shown in FIG. 2 will be described. In the following description, the symbols of signals and the calculation of these symbols of signals are expressed as current.

First, the internal DC component Idci of the input analog signal Iac + Idci (DC component already added at the time of input) supplied through the input terminal 20 is converted into the capacitor C.
The original input analog signal Iac is removed by 3 and is supplied to the addition point sm via the resistor R1.

On the other hand, as explained in FIG. 1, ΣΔ
A signal A-D converted by the modulation AD converter 11 and phase-inverted by the inverter 4-(Iac + Idci)
+ Idcx + Ins) is supplied to the addition point sm via the input terminal 24 and the resistor R2.

In the case of FIG. 2, since the direct current component Idci already added at the time of input is removed by the capacitor C3, the output obtained as a result of the addition at the addition point sm is −
(Iac + Idci + Idcx + Ins) + Iac, that is, − (Idcx + Idci + Ins2). Here, similarly to the above, the high frequency noise Ins due to the noise shaping processing becomes ins + Ins2, and this high frequency noise ins is removed by the capacitor C1.

This output- (Idcx + Idci + Ins
Of 2), the high-frequency noise Ins2 is removed by the low-pass filter composed of the capacitor C2 and the resistor R4. Therefore, the feedback voltage fed back from the operational amplifier circuit 21 to the AD converter (not shown) via the input terminal 25. V
s becomes R4 / R3 × (Idcx + Idci).

In this case, since the DC component Idci already added to the input analog signal is removed by the capacitor C3, this DC component Idc is added at the addition point sm.
i is not removed, and thus the feedback voltage Vs is AD-converted by the ΔΣ modulation AD converter to generate a DC component Id.
Not only cx but the direct current component Idci existing at the time of input
Can also be included, which enables highly accurate servo operation.

The high frequency noise due to the noise shaping contained in the extracted DC offset component extracted by the circuit shown in FIG. 2 is half the sampling frequency of oversampling (32 to 32 in the audio AD converter). With 128 times oversampling, 700 KHz to 3 MHz will be distributed in the center, so if the cutoff frequency is sufficiently low (several Hz or less), a high-frequency noise of 1st to 2nd order will be removed sufficiently. be able to.

FIG. 6 is a graph showing the low-pass filter characteristic of the servo signal and the out-of-band noise characteristic of noise shaping, with the vertical axis representing amplitude (dB) and the horizontal axis representing frequency (Hz).

As shown in FIG. 6, noise in the band shown by the solid line n1 may be removed, so that the characteristics shown by the broken line n2, for example, the primary low-pass filter with a cutoff frequency of 1 Hz and the characteristics shown by the broken line n3, For example, it can be easily realized only by using a secondary low-pass filter having a cutoff frequency of 1 Hz.

As described above, in the second embodiment,
A bit stream signal after A / D conversion by the sigma-delta modulation A / D converter 11 and a signal obtained by removing a direct current component existing at the time of input from the input analog signal from the input terminal 20 are added by a resistor R2 and R1. In addition, the high-frequency noise ins in the addition output is removed by the capacitor C1, and the high-frequency noise Ins2 of the output − (Idcx + Idci + Ins2) obtained by removing the high-frequency noise ins is composed of the resistor R4 and the capacitor C2. This high frequency noise I removed by the filter
The output without ns2, that is, the DC offset component due to A-D conversion and the DC offset component I existing at the time of input
dcx + Idci is obtained, and this DC offset Idcx
A feedback voltage (servo original signal) Vs is obtained by the resistor R4 with respect to + Idci, and the feedback voltage Vs and the input analog signal supplied via the input terminal 20 are provided to the resistors R5 and R6.
Since it is added and input to the ΣΔ modulation A / D converter 11 again, it is possible to prevent the occurrence of noise, tone (oscillation in a specific frequency band), and distortion due to variations in the characteristics of the A / D converter. Even if the input cycle becomes large and the MSB stays at “1” or “0” for a long period, the feedback voltage can be prevented from being generated when there is no DC component, and thus noise and distortion can be prevented. Moreover, the servo operation can be made to have a linear characteristic with respect to the DC component,
Furthermore, since the ΣΔA-D converter 11 that delays only a few samples with the sampling period of oversampling of 32 to 128 times with respect to the input analog signal is used, the response of the servo feedback voltage to the positive / negative change of the DC offset is improved. As a result, the convergence speed of the DC offset can be increased, and accurate and highly accurate servo operation can be performed.

Further, since the AC component is removed by adopting such a configuration, it is possible to obtain a good servo feedback signal without noise only by a simple filter for removing the high frequency noise due to the remaining ΣΔ modulation. Also, the delay between the input analog signal and the bit stream signal is extremely small, the effect of canceling the AC component is high up to a high frequency band, the same good servo feedback signal as above can be obtained, and the convergence of the DC offset can be accelerated. Since the servo feedback signal proportional to the generated DC offset can be obtained, the gain can be easily set, and only the DC offset of the A-D converter alone can be canceled.

Next, a third embodiment of the DC component removing circuit of the present invention will be described with reference to FIG.

The direct current component removing circuit shown in FIG. 3 has the same basic configuration as the direct current component removing circuit shown in FIGS. 1 and 2, but in this circuit, high frequency noise is generated after offset adjustment is performed. While removing the noise, at the same time, amplifying to the amplitude required for the negative feedback of the DC servo, AD
DC servo is applied by adding to the input analog signal of the converter.

In FIG. 3, illustration and description of the inverter 4, the digital filter 22, the ΣΔ modulation A / D converter 11 and the like shown in FIG. 1 are omitted, and the portions corresponding to those in FIG. , Its detailed description is omitted.

In FIG. 3, a power supply terminal 27 to which a positive power supply is supplied and a power supply terminal 29 to which a negative power supply is supplied.
A volume 28 is arranged between the output terminals and its output terminal is connected to the connection point of the resistors R1 and R3 described in FIGS.
Further, the output terminal of the operational amplifier circuit 21 is connected to the inverting input terminal (-) of the amplifier circuit 26 via the resistor R7, and the capacitor C4 and the resistor are provided between the inverting input terminal (-) and the output terminal of the amplifier circuit 26. The operational amplifier circuit 26 is connected in a parallel circuit, the non-inverting input terminal (+) of the operational amplifier circuit 26 is grounded, and the output terminal of the amplifier circuit 26 is connected to the output terminal 25. The output terminal 25 is connected to the resistor R5 shown in FIG. 1 though not shown.
Is connected to the input terminal of the ΣΔ modulation AD converter 11.

Next, the operation of the DC component removing circuit shown in FIG. 3 will be described. In the following description, the symbols of signals and the calculation of these symbols of signals are expressed as current.

First, the voltage Idc by the offset adjustment
o and a signal from which the DC component of the input analog signal is removed by the capacitor C3 is Iaci, A (not shown)
-D converter 11 to inverter 4 and input terminal 24
The bitstream signal supplied via
i + Idci + Idcx + Ins). Where Id
ci is a DC offset at the time of input, Idcx is a DC offset generated when A / D conversion is performed by an AD converter 11 (not shown), and Ins is high frequency noise generated by the noise shaping process.

When Ins = Ins2-ins, the signal Io at the addition point sm is-(Idci + Idcx
−Idco + Ins2), and the noise component Ic1 + removed by the signal Io at the addition point sm + the capacitor C2
The signal Ir1 = 0 flowing through the resistor R4.

Here, assuming that the noise component Ic1 is Ins2, the signal Ir1 = (Idci + Id) flowing through the resistor R4.
cx−Idco), and therefore the output V1 of the operational amplifier circuit 21 is V1 = R4 / R3 × (Idci + Idcx−).
Idco).

Here, paying attention to only the DC component, the feedback voltage Vs becomes Vs =-(R8 / R7) * V1.

Then, a = (R8 / R7), V1 = b × V
Letting dc (DC component), the feedback voltage Vs is Vs =-(a
XbxVdc).

That is, this Vs is set to the resistor R5 shown in FIG.
And R6 add to the input analog signal from the input terminal 20 to cancel the DC offset.

As described above, in the third embodiment,
After adjusting the offset, the high frequency noise was removed, and at the same time, the amplitude was increased to the amplitude required for the negative feedback of the DC servo and added to the input analog signal to apply the DC servo. Noise, tone (oscillation in a specific frequency band) due to fluctuation of
Distortion can be prevented, the input cycle becomes longer, and the MSB
Even if the voltage becomes “1” or “0” for a long time, the feedback voltage can be prevented from being generated when there is no DC component.
As a result, noise and distortion can be prevented, the servo operation can be made to have a linear characteristic with respect to the DC component, and further, only a few samples are delayed by a sampling period of 32 to 128 times oversampling with respect to the input analog signal. Since the ΣΔ A / D converter 11 is not used, the response of the servo feedback voltage to the positive / negative change of the DC offset can be made good, and thereby the convergence speed of the DC offset can be made high, and accurate and highly accurate servo operation can be achieved. It can be carried out.

Further, since the AC component is removed by adopting such a configuration, it is possible to obtain a good servo feedback signal without noise only by a simple filter for removing the high frequency noise due to the remaining ΣΔ modulation. Also, the delay between the input analog signal and the bit stream signal is extremely small, the effect of canceling the AC component is high up to a high frequency band, the same good servo feedback signal as above can be obtained, and the convergence of the DC offset can be accelerated. Since the servo feedback signal proportional to the generated DC offset can be obtained, the gain can be easily set, and only the DC offset of the A-D converter alone can be canceled.

The above-mentioned embodiment is an example of the present invention.
It goes without saying that various other configurations can be adopted without departing from the scope of the present invention.

[0099]

According to the present invention described above, the output obtained by integrating the digital output after sigma-delta modulation by the integrator means before the oversampling sigma-delta modulation analog-digital conversion by the DC component extracting means. Since a DC component is extracted by performing anti-phase addition with the analog signal and this output is added to the analog signal by the adding means, noise and tones (in a specific frequency band in a specific frequency band due to variations in the characteristics of the AD converter are caused). Oscillation) and distortion can be prevented,
Even if the input cycle becomes large and the MSB stays at “1” or “0” for a long period, the feedback voltage can be prevented from being generated when there is no DC component, and thus noise and distortion can be prevented. In addition, the ΣΔA-D converter 11 which can make the servo operation a linear characteristic with respect to the DC component and is delayed by only a few samples at the sampling period of 32 to 128 times the oversampling with respect to the input analog signal is used. Therefore, the response of the servo feedback voltage to the positive / negative change of the DC offset can be improved, and the convergence speed of the DC offset can be increased, and accurate servo operation can be performed.

According to the present invention described above, the direct current component contained in the input analog signal is removed by the direct current component removing means in advance, and the digital output after sigma-delta modulation is integrated by the integrating means. Since the output is added in anti-phase with the analog signal before oversampling, sigma-delta modulation analog-digital conversion by the DC component extraction means, and this output is added to the analog signal from which the DC component has been removed in advance, It is possible to prevent noise, tone (oscillation in a specific frequency band), and distortion caused by variations in the characteristics of the A / D converter from occurring, and to increase the input cycle to keep the MSB long "1" or "0".
Even if it becomes, it is possible to prevent the feedback voltage from being generated when there is no DC component, which can prevent the occurrence of noise and distortion, and can make the servo operation a linear characteristic with respect to the DC component. 32 to input analog signal
Since the .SIGMA..DELTA.A-D converter 11 which delays only a few samples in the sampling cycle of 128 times oversampling is used, the response of the servo feedback voltage to the positive / negative change of the DC offset can be improved, and the convergence speed of the DC offset can be improved. It is possible to perform high-speed, accurate and highly accurate servo operation.

Further, according to the present invention described above, the noise removing means removes noise due to noise shaping, the digital output after sigma-delta modulation is integrated by the integrating means, and the integrated output is overwritten by the DC component extracting means. Sampling, sigma, delta modulation and analog signal before analog-digital conversion are added in anti-phase to extract the DC component, and this output is added to the analog signal by the addition means. Due to noise, tone (oscillation in a specific frequency band),
Distortion can be prevented, the input cycle becomes longer, and the MSB
Even if the voltage becomes “1” or “0” for a long time, the feedback voltage can be prevented from being generated when there is no DC component.
As a result, noise and distortion can be prevented, the servo operation can be made to have a linear characteristic with respect to the DC component, and further, only a few samples are delayed by a sampling period of 32 to 128 times oversampling with respect to the input analog signal. Since the ΣΔ A / D converter 11 is not used, the response of the servo feedback voltage to the positive / negative change of the DC offset can be made good, and thereby the convergence speed of the DC offset can be made high, and accurate and highly accurate servo operation can be achieved. It can be carried out.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a first embodiment of a DC component removing circuit of the present invention.

FIG. 2 is a circuit diagram showing a second embodiment of the DC component removing circuit of the present invention.

FIG. 3 is a circuit diagram showing a third embodiment of the DC component removing circuit of the present invention.

FIG. 4 is a configuration diagram showing a 1-bit analog demodulation circuit used for explaining a DC component removal circuit of the present invention.

FIG. 5 is a configuration diagram showing a 4-bit analog demodulation circuit used for explaining a DC component removal circuit of the present invention.

FIG. 6 is a graph showing an example of a low-pass filter characteristic of a servo signal and an out-of-band noise characteristic of noise shaping, which is used for explaining the DC component removing circuit of the present invention.

FIG. 7 is an explanatory diagram showing 2′SCOM format digital data for explaining an example of a conventional DC component removing circuit.

FIG. 8 is a timing chart showing an example of a time change of MSB at the time of inputting a midpoint voltage, which is used for explaining an example of a conventional DC component removing circuit.

FIG. 9 is a configuration diagram showing an example of a conventional DC component removing circuit.

FIG. 10 is a graph showing a relationship between a servo feedback voltage and a time change of MSB, which is used for explaining an example of a conventional DC component removing circuit.

FIG. 11 is a graph showing a relationship of MSB with respect to analog input amplitude, which is used for explaining an example of a conventional DC component removing circuit.

FIG. 12 is an explanatory diagram of an oversampling ΣΔ modulation type AD converter for explaining an example of a conventional DC component removal circuit.

FIG. 13 is a waveform diagram showing a change in MSB and servo voltage with respect to DC offset depending on the presence / absence of a delay, which is used for explaining an example of a conventional DC component removing circuit.

[Explanation of symbols]

 R1, R2, R4, R5, R6 resistors C1, C2, C3 capacitors 21 operational amplifier circuit

Claims (5)

[Claims] 1. A direct current component removing circuit for removing a direct current component of an output digital signal in oversampling sigma delta modulation analog-digital conversion, and an integrating means for integrating a digital output after sigma-delta modulation, and this integrating means. And a DC component extracting means for extracting a DC component by performing anti-phase addition with the analog signal before oversampling / sigma / delta modulation analog-digital conversion, and adding the output from the DC component extracting means to the analog signal. And a DC component removing circuit. 2. The DC component removing circuit according to claim 1, wherein the integrating means is a first-order low-pass filter including a resistor and a capacitor. 3. A direct current component removing circuit for removing a direct current component of an output digital signal in oversampling, sigma delta modulation analog-digital conversion, and a direct current component removing means for removing a direct current component contained in an input analog signal in advance. And an integrating means for integrating the digital output after the sigma-delta modulation, and an output from this integrating means are subjected to anti-phase addition with the analog signal before the oversampling / sigma / delta modulation analog-digital conversion to extract a DC component. A DC component removing circuit comprising a DC component extracting means and an adding means for adding an output from the DC component extracting means to the analog signal. 4. A direct current component removing circuit for removing a direct current component of an output digital signal in oversampling sigma delta modulation analog-digital conversion, and noise removing means for removing noise due to noise shaping, and sigma-delta modulation An integrating means for integrating the digital output; a DC component extracting means for extracting the DC component by adding the output from the integrating means in anti-phase with the analog signal before the oversampling / sigma / delta modulation analog-digital conversion; A direct current component removing circuit, comprising: an adding means for adding the output from the component extracting means to the analog signal. 5. The DC component removing circuit according to claim 4, wherein the noise removing means is a capacitor.