JPH0661862A - Two-signal input deltasigma modulation type a/d converter - Google Patents

Abstract

PURPOSE:To reduce a noise component generated from positive and negative power supply voltages by providing a dynamic range setting section comprising a single circuit to the A/D converter. CONSTITUTION:The A/D converter is provided with a dynamic range setting section 70 which uses an 2-output operational amplifier 71 receiving a threshold level Vc and outputs a voltage Vco whose amplitude is equal to the voltage Vc and an inverted voltage -Vc being the inverse of the voltage Vc. When a digital level outputted from a comparator 30 is at an L level, a switch S1 is thrown to the position at which the Vco is fed to an adder/subtractor 10 and a switch S2 is thrown to the position at which the -Vco is fed to the adder/subtractor 10, and when the digital level outputted from a comparator 30 is at an H level, the switch S1 is thrown to the position at which the -Vco is fed to the adder/subtractor 10 and the switch S2 is thrown to the position at which the Vco is fed to the adder/subtractor 10. Power supply noise components with respect to each analog input signal stored in an integration device 20 are cancelled together and the S/N of the digital output signal to the power noise component is improved.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a .DELTA..SIGMA. Modulation AD converter for inputting two analog signals in the positive direction and the negative direction of the inversion, and converting the two analog signals.

Recently, a circuit for reducing various noises has been studied for a ΔΣ modulation type AD converter for converting an analog signal into a digital signal, but a more effective noise reduction circuit is required.

[0003]

2. Description of the Related Art A conventional example will be described with reference to FIGS. FIG. 4 is a diagram showing an example of a conventional two-signal input ΔΣ modulation type AD converter, and FIG. 5 is an example of a noise component distribution of the conventional two-signal input ΔΣ modulation type AD converter.

In the conventional example of FIG. 4, in order to simplify the explanation, an amplifier 51 for setting a 1-bit D / A converter 1 (hereinafter referred to as DAC 1) (41) and a 1-bit D-A converter 2 ( Hereinafter referred to as DAC2) (4
2) The threshold dynamic range of the setting amplifier 52 is set to Vc1 = + 1V and VC2 = -1V, respectively.
In addition, the analog input signal Ain and the inverted signal of the analog input signal Ain are +0.3 V and -0.3, respectively.
As V, the IM terminal of the operational amplifier 11 and I, respectively.
The first one that the circuit operates as input to the P terminal
The operation from when the second clock is input will be described.

The positive dynamic range of the DAC 1, 2 (41, 42) is determined by the amplifier 51 and the threshold power supply voltage Vc.
1 (+ 1V), and DAC1, 2 (4
The negative dynamic range of (1, 42) is created using the amplifier 52 and the threshold power supply voltage Vc2 (-1V), and is supplied in the positive direction and the negative direction, respectively.

First, the first clock (first clock) is the integrator 20, the comparator 30, and the DAC1 (4).
1), DAC2 (42), etc., adder / subtractor 10
The analog signals of +0.3 V and −0.3 V, which are input to the inputs IP and IM of the operational amplifier 11, respectively, are the outputs OP (V1) and OM of the operational amplifier 11, respectively.
Analog signals of -0.3V and + 0.3V are output to (V2), respectively. In the next integrator 20, the storage signal level is 0V because both are the first, and the addition / subtraction result is output to the output terminal side where the input signal crosses, so that the input signal is output to the output terminal side where the input signal crosses without change. It outputs and becomes respectively -0.3V and + 0.3V.

In the comparator 30 at the next stage, the input IP is a negative voltage, IM is a positive voltage, and IP is smaller than IM, so the output digital value is "L". In the DAC1 (41) that inputs this digital value, since the "L" level is input to the INV circuit 43 that controls the operation of the switch S1, the switch S1 is placed at the position (A) shown in the figure.
Operates and + 1V is output to the adder / subtractor 10.

On the other hand, the same digital value D is input.
In AC2 (42), since the "L" level is input to the circuit that controls the operation of the switch S2, the position (B) shown in the figure
Then, the switch S1 operates and -1V is output to the adder / subtractor 10.

When the next second clock is input, DA
"-1V" of the output V5 of C1, 2 (41, 42) and "+ 1V" of the output V6 are input to the operational amplifier 11 of the adder / subtractor 10, and the outputs V1 and V2 of the operational amplifier 11 are + 0.7V and-, respectively. 0.7 is output.

Since the stored voltage values -0.3V and + 0.3V are added in the integrator 20 at the next stage, the outputs V3 and V4 of the integrator 20 are + 0.4V, respectively. , -0.4V. Then, in the comparator 30 at the next stage, IP becomes + and IM becomes −, so the output of the comparator 30 becomes “H”.

The DAC1 (4
In 1), the INV circuit 4 that controls the operation of the switch S1
Since the "H" level is input to 3, the switch S1 operates on the B side opposite to the illustrated position, and -1V is applied to the adder / subtractor 1.
It is output to 0.

On the other hand, the same digital value D is input.
In the AC2 (42), since the "H" level is input to the circuit that controls the operation of the switch S2, the switch S2 operates on the A side opposite to the position shown in the figure, and + 1V is applied to the adder / subtractor 1
It is output to 0.

In this way, when the third clock is input, the outputs V1 and V2 of the operational amplifier 11 are-.
1.3V, + 1.3V, and the output V3 of the integrator 20 becomes
V4 is -0.9V, + 0.9V respectively, and also
The output VD of the comparator 30 becomes "L", and the DAC
The outputs V5 and V6 of 1 and 2 (41 and 42) are "+", respectively.
It becomes 1V "and" -1V ".

Thereafter, the operation is repeated in sequence. After the same operation, a signal obtained by averaging the digital values of the comparator output that has passed through the low-pass filter 60 for each clock input is reproduced as a digital output signal Dout.

[0015]

However, according to this method, the amplifiers 51 and 52 for setting the dynamic range are used.
, The noise components generated by the power supply voltages + V and -V have their own noise components.
When supplied to 1, 2 (41, 42), they are respectively accumulated in the integrator 20, and therefore, as shown in FIG.
The output V5 of 1 has frequencies f1, f3 and
A noise component consisting of f5, ... Is included, and the DAC
2 (42) output V6 has frequency f2
A noise component composed of f4, f5, ... Is included.

As a result, there is a problem in that the digital output Dout also contains a noise component, which deteriorates the S / N characteristic in the final stage. The present invention solves such a problem and is capable of reducing a noise component generated by the power supply voltages + V and -V.
An object is to provide a modulation type AD converter.

[0017]

FIG. 1 is a principle configuration diagram of a two-signal input ΔΣ modulation type AD converter according to the present invention.
In the figure, the same reference numerals as those in FIG.
The 1-bit D / A converters 41 and 42 are combined to simplify and express the 1-bit D / A converter unit, 70 is a dynamic range setting unit, and 71 is a two-output type operational amplifier.

According to the present invention, two analog input signals input to the adder / subtractor 10 in the positive direction and the negative direction of the inverted analog input signals, and two DACs corresponding to the two analog input signals.
The difference between the one-clock-preceding digitized data output from the above is returned to the adder / subtractor 10, the operational amplifier 11 amplifies the difference, and the integrator 20 integrates the respective values, which are compared by the comparator 30. In the two-signal input ΔΣ modulation type AD converter which converts and outputs the corresponding digital value through the filter 60 for averaging the digital value, the threshold power supply voltage Vc and the two-output type operational amplifier 71 are used. , Vco having the same voltage as the threshold power supply voltage Vc and the threshold power supply voltage Vc
A dynamic range setting unit 70 that outputs a polarity inversion voltage −Vco, which is the inversion of the polarity, is provided.

When the digital value output from the comparator 30 is "L", the switch S1 is Vco.
And the switch S2 supplies -Vco to the adder-subtractor 10, and when the digital value is "H", the switch S1 outputs -Vco and the switch S2 outputs Vco.
The objective can be achieved by configuring so as to supply 0.

Further, the dynamic range setting unit 70
Of the two-output type operational amplifier 71 of the output voltage + Vco
The low-pass filters 81 and 82 may be provided on the side and the polarity inversion voltage −Vco side, respectively.

[0021]

According to the present invention, the threshold power supply voltage Vc and the dual output type operational amplifier 71 are used, and Vc of the same voltage as the threshold power supply voltage Vc is used.
polarity reversal voltage obtained by reversing the polarities of o and the threshold power supply voltage Vc −
A dynamic range setting unit 70 for outputting Vco is provided.

When the digital value output from the comparator 30 is "L", the switch S1 supplies Vco and the switch S2 supplies -Vco to the adder / subtractor 10, and when the digital value is "H", the switch S1. Is -Vco
And the switch S2 supplies Vco to the adder / subtractor 10.

By doing so, the adder / subtractor 10
The noise sources of the noise components generated at the respective input terminals are the same power source, and the polarities of the same power source voltage from the 1-bit D / A converter unit 40 to the two inputs of the operational amplifier 11 are the positive direction and the reverse direction. Therefore, the power supply noise corresponding to each analog input signal stored in the integrator 20 is canceled, and the S / N value due to the power supply noise of the digital output signal can be reduced.

The dynamic range setting section 70-2
+ Vco side of output type operational amplifier 71, and -Vco
By providing the low-pass filters 81 and 82 on the respective sides, the power supply noise can be further reduced.

[0025]

EXAMPLES Next, examples will be described with reference to FIGS. 2 shows an embodiment of a two-signal input ΔΣ modulation type AD converter according to the present invention, and FIG. 3 shows an example of noise component distribution of the two-signal input ΔΣ modulation type AD converter according to the present invention.

In the figure, the same reference numerals as those in FIGS. 1 and 4 indicate the same elements, C1 and C2 are capacitors, and R7 to R10 are resistors. This embodiment uses two 1-bit DA converters DA.
A dynamic range power supply voltage in both positive and negative directions to be supplied to C is generated and supplied using a two-output type operational amplifier 71 of one circuit block and a threshold power supply voltage Vc.

The output terminal OM of the two-output type operational amplifier 71 outputs a voltage having the same voltage as the threshold power supply voltage Vc but the polarity thereof inverted, and the output terminal OP outputs the same voltage as the threshold power supply voltage Vc.

In the two-output type operational amplifier 71, for example, if Vc = + 1V, the resistor R7 has 1 / R8.
When the current (A) flows and the output terminal OP has R7 = R8, a potential of -1V is generated.

On the other hand, since the output terminal OM has a phase opposite to that of the output terminal OP, a potential of +1 V is generated. As a result, + 1V is set to the A terminals of the two DACs, and -1V is set to the B terminals.

Here, when the digital value input signal to the DAC 1, 2 (41, 42) is "L", the DAC 1 (4
When the output V5 of 1) is +1 V and the digital value input signal to the DAC is "H", the output V5 of the DAC1 (41) is set to -1 V, and the DAC2 (4
If the operation of 2) is set reversely to DAC1 (41),
The same operation as the conventional example is shown.

In the present invention, the two-output type operational amplifier 71
By inserting a low-pass filter 81 composed of a resistor R9 and a capacitor C1 into the output terminal OP of and a low-pass filter 82 composed of a resistor R10 and a capacitor C2 into the output terminal OM, the power supply noise countermeasure is further strengthened. can do.

[0032]

As described above, according to the present invention,
By providing the dynamic range setting unit consisting of one circuit, the dynamic range power supplies to be supplied to the two 1-bit D / A converters are common, so that noise components cancel each other out, the influence of power supply noise is improved, and good S / N
It is possible to obtain characteristics.

[Brief description of drawings]

FIG. 1 is a principle configuration diagram of a two-signal input ΔΣ modulation type AD converter according to the present invention.

FIG. 2 is an embodiment of a two-signal input ΔΣ modulation type AD converter according to the present invention.

FIG. 3 is a noise component distribution example of a two-signal input ΔΣ modulation type AD converter according to the present invention.

FIG. 4 shows an example of a conventional two-signal input ΔΣ modulation type AD converter.

FIG. 5 is a noise component distribution example of a conventional two-signal input ΔΣ modulation AD converter.

[Explanation of symbols]

 10 adder / subtractor 11 operational amplifier 20 integrator 30 comparator 40 D-A converter section 41, 42 1-bit D-A converter 51, 52 amplifier 60, 81, 82 low-pass filter 70 dynamic range setting section 71 2-output operational amplifier C1, C2 capacitor R1-R10 resistance S1, S2 switch

Claims (2)

[Claims] 1. An analog input signal input to an adder / subtractor (10) in the positive direction and an inverted negative direction thereof, and two 1-bit DAs corresponding to the two analog input signals.
The difference from the data output from the converter, each digitized data one clock before, and returned to the adder / subtractor (10) is amplified by the operational amplifier (11) and further integrated by the integrator (20). A comparator (30) compares the respective values to convert them into corresponding digital values and outputs the digital values, and a digital signal is taken out through a filter (60) for averaging the digital values.
In the signal input ΔΣ modulation type AD converter, a threshold power supply voltage Vc and a two-output type operational amplifier (71) are used, and the same voltage Vco as the threshold power supply voltage Vc and a polarity inversion voltage obtained by inverting the polarities of the threshold power supply voltage Vc − A dynamic range setting section (70) for outputting Vco is provided, and when the digital value output by the comparator (30) is “L”, the switch (S1) outputs the voltage Vco.
The switch (S2) supplies the polarity inversion voltage -Vco to the adder / subtractor (10), and the digital value output from the comparator (30) is "
When it is "H", the switch (S1) turns the polarity inversion voltage -Vc.
and a switch (S2) supplies the voltage Vco to the adder-subtractor (10). 2. The dynamic range setting section (70) according to claim 1, wherein the polarity reversal voltage −Vco side of the output of the two-output type operational amplifier (71), and the voltage + Vc.
A two-signal input ΔΣ modulation AD converter characterized in that low-pass filters (81, 82) are respectively provided on the o side.