JPH065484A - Manufacture of thin film semiconductor substrate - Google Patents

Manufacture of thin film semiconductor substrate

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Publication number
JPH065484A
JPH065484A JP15646192A JP15646192A JPH065484A JP H065484 A JPH065484 A JP H065484A JP 15646192 A JP15646192 A JP 15646192A JP 15646192 A JP15646192 A JP 15646192A JP H065484 A JPH065484 A JP H065484A
Authority
JP
Japan
Prior art keywords
silicon
main surface
single crystal
thin film
crystal wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15646192A
Other languages
Japanese (ja)
Inventor
Seiichi Iwamatsu
誠一 岩松
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP15646192A priority Critical patent/JPH065484A/en
Publication of JPH065484A publication Critical patent/JPH065484A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To form a silicon thin film of an excellent quality, by sticking a semiconductor single crystal film having a specified thickness on at least one main surface of a quartz substrate. CONSTITUTION:By implanting oxygen ions from one main surface of a silicon wafer 1, an oxygen ion implanted layer 2 is formed under a silicon thin film 3 so as to leave the film 3 of 0.1mum in thickness. Next by annealing, the ion implanted layer 2 is activated, and a silicon oxide film of 0.1-0.3mum in thickness is formed as an ion implanted active layer 4, which silicon oxide film is simultaneously turned into a single crystal film excellent in crystallinity. The surface of the silicon thin film 3 of a wafer 9 is closely brought into contact with the main surface of the quartz substrate 5 and heated. The wafer is stuck on the quartz substrate 5 as the result of silanol reaction. Next the other main surface of the silicon wafer 1 is eliminated by chemical etching using saturated aqueous solution of KOH or the like. Thereby a silicon thin film substrate of an excellent quality can be formed.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、薄膜半導体基板の製法
に関し、とりわけシリコン薄膜半導体基板の製法に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a thin film semiconductor substrate, and more particularly to a method for manufacturing a silicon thin film semiconductor substrate.

【0002】[0002]

【従来の技術】従来、薄膜半導体基板の製法としてはシ
リコン オン サファイアが最も一般的な方法としてあ
った。すなわち、サファイア単結晶ウエーハの一主面に
ヘテロジニアス・エピタキシャルとして、シリコン単結
晶膜をエピタキシャル成長させるほうほうである。
2. Description of the Related Art Conventionally, silicon on sapphire has been the most general method for manufacturing a thin film semiconductor substrate. That is, it is a method in which a silicon single crystal film is epitaxially grown as heterogeneous epitaxial on one main surface of a sapphire single crystal wafer.

【0003】[0003]

【発明が解決しようとする課題】しかし、上記従来技術
によると、結晶欠陥が多く、サファイアとシリコンとの
界面準位も多く、シリコン膜中にドーパントであるアル
ミニウムが拡散するという課題があった。
However, according to the above-mentioned conventional technique, there are many crystal defects, many interface states between sapphire and silicon, and aluminum, which is a dopant, diffuses into the silicon film.

【0004】本発明は、かかる従来技術の課題を解決
し、良質のシリコン薄膜を形成することを目的とする。
An object of the present invention is to solve the problems of the prior art and to form a high quality silicon thin film.

【0005】[0005]

【課題を解決するための手段】上記課題を解決し、上記
目的を達成するために、本発明は、薄膜半導体基板の製
法に関し、(1) 石英基板の少なくとも一主面に0.
1ミクロン厚さ程度以下の半導体単結晶膜を張り付ける
手段を取ること、および(2) (1)項の半導体単結
晶膜をシリコンと成す手段を取ること、および(3)
シリコン単結晶ウエーハの一主面から0.1ミクロン深
さ程度に酸素イオンをイオン打ち込みし、高温でアニー
ルして前記酸素イオン打ち込み層をシリコン酸化膜とな
したシリコン単結晶ウエーハの前記一主面を石英基板に
シラノール反応により張り付け、シリコン単結晶ウエー
ハの他の主面から水酸化カリュウムの飽和水溶液などで
シリコン層を前記シリコン酸化膜までケミカルエッチす
る手段を取ること、および(4) シリコン単結晶ウエ
ーハの一主面から0.1ミクロン深さ程度に窒素イオン
をイオン打ち込みし、高温でアニールして前記窒素イオ
ン打ち込み層をシリコン窒化膜となしたシリコン単結晶
ウエーハの前記一主面を石英基板にシラノール反応によ
り張り付け、シリコン単結晶ウエーハの他の主面から水
酸化カリュウムの飽和水溶液などでシリコン層を前記シ
リコン窒化膜までケミカルエッチする手段を取ること、
および(5) シリコン単結晶ウエーハの一主面から
0.1ミクロン深さ程度に酸素イオンと窒素イオンをイ
オン打ち込みし、高温でアニールして前記酸素と窒素イ
オン打ち込み層をシリコン酸窒化膜となしたシリコン単
結晶ウエーハの前記一主面を石英基板にシラノール反応
により張り付け、シリコン単結晶ウエーハの他の主面か
ら水酸化カリュウムの飽和水溶液などでシリコン層を前
記シリコン酸窒化膜までケミカルエッチする手段を取る
こと、および(6) シリコン単結晶ウエーハの一主面
から0.1ミクロン深さ程度にボロンイオンをイオン打
ち込みし、高温でアニールして前記ボロンイオン打ち込
み層を活性化したシリコン単結晶ウエーハの前記一主面
を石英基板にシラノール反応により張り付け、シリコン
単結晶ウエーハの他の主面から水酸化カリュウムの飽和
水溶液などでシリコン層を前記ボロンイオン打ち込み活
性化層までケミカルエッチする手段を取ること、などの
手段を取る。
In order to solve the above problems and to achieve the above objects, the present invention relates to a method for producing a thin film semiconductor substrate, including: (1) at least one main surface of a quartz substrate having a thickness of 0.
Taking a means for sticking a semiconductor single crystal film having a thickness of about 1 micron or less, and (2) Taking a means for forming the semiconductor single crystal film with silicon in (1), and (3)
Oxygen ions are ion-implanted to a depth of about 0.1 micron from one main surface of the silicon single-crystal wafer, and annealed at a high temperature to form the oxygen-ion-implanted layer into a silicon oxide film. Is attached to a quartz substrate by a silanol reaction, and means for chemically etching the silicon layer to the silicon oxide film from the other main surface of the silicon single crystal wafer with a saturated aqueous solution of potassium hydroxide is used, and (4) silicon single crystal Nitrogen ions are implanted to a depth of about 0.1 μm from one main surface of the wafer and annealed at a high temperature, and the one main surface of the silicon single crystal wafer in which the nitrogen ion-implanted layer is a silicon nitride film is formed on the quartz substrate. It is attached to the surface of the silicon single crystal wafer by silanol reaction, and the amount of potassium hydroxide saturated from the other main surface of the silicon single crystal wafer. Taking a means to chemically etch the silicon layer to the silicon nitride film with an aqueous solution,
And (5) Oxygen ions and nitrogen ions are ion-implanted to a depth of about 0.1 micron from one main surface of the silicon single crystal wafer, and annealed at a high temperature to form the oxygen and nitrogen ion-implanted layer into a silicon oxynitride film. Means of chemically adhering the one main surface of the formed silicon single crystal wafer to a quartz substrate by a silanol reaction, and chemically etching the silicon layer from the other main surface of the silicon single crystal wafer to a silicon oxynitride film with a saturated aqueous solution of potassium hydroxide And (6) a silicon single crystal wafer in which boron ions are ion-implanted to a depth of about 0.1 micron from one main surface of a silicon single crystal wafer and annealed at a high temperature to activate the boron ion-implanted layer. The above-mentioned one main surface of a silicon single crystal wafer was attached to a quartz substrate by a silanol reaction. Taking means for chemically etched from the surface of the silicon layer to the boron ion implantation activation layer including a saturated aqueous solution of hydroxide Karyuumu, take measures such as.

【0006】[0006]

【実施例】以下、実施例により本発明を詳述する。EXAMPLES The present invention will be described in detail below with reference to examples.

【0007】図1は、本発明の一実施例を示す薄膜半導
体基板の製法を工程順に示す断面図である。すなわち、
(a)シリコンウエーハ1の一主面の鏡面研磨面または
シリコン酸化膜が薄く形成された鏡面から、(b)酸素
イオンを加速エネルギー50〜100KeVで、1015
/cm2程度打ち込み、0.1ミクロン厚さのシリコン
薄膜3の層を残して、該シリコン薄膜3の層の下に酸素
のイオン打ち込み層2を形成し、(c)1200度〜1
300度程度で1〜3時間程度不活性雰囲気中でアニー
ルすることにより、前記イオン打ち込み層2を活性化し
て、イオン打ち込み活性化層4としてシリコン酸化膜を
0.1〜0.3ミクロン厚さ程度形成すると共にシリコ
ン薄膜3にイオン打ち込みで誘起された結晶欠陥もアニ
ールアウトし、結晶性の良好な単結晶膜となす。(d)
次いで、鏡面研磨された石英基板5の一主面に、前記
(c)のウエーハのシリコン薄膜3の面を密着させ、水
素雰囲気で800度〜1200度に加熱することによ
り、シラノール反応により石英基板5とウエーハとが張
り付けられる。(e)次いで、シリコンウエーハの他の
主面、すなわち裏面をKOHの飽和水溶液などのケミカ
ルエッチングにより除去する。この時石英基板5および
シリコン酸化膜化されたイオン打ち込み活性化層4は殆
どエッチングされず、すなわち自動的にエッチングはイ
オン打ち込み活性化層4で停止する。(f)次ぎに、必
要があれば、シリコン酸化膜化されたイオン打ち込み活
性化層4を弗酸などによりエッチング除去すれば、0.
1ミクロン厚さの単結晶から成るシリコン薄膜3が石英
基板5の一主面に張り付けられた薄膜半導体基板が形成
できる。なお、前記イオン打ち込み活性化層4はそのま
ま残すか、エッチングを途中で止めて必要な厚さだけ残
しておいても良い。
FIG. 1 is a sectional view showing a method of manufacturing a thin film semiconductor substrate according to an embodiment of the present invention in the order of steps. That is,
(A) From the mirror-polished surface of one main surface of the silicon wafer 1 or the mirror surface with a thin silicon oxide film formed, (b) oxygen ions at an acceleration energy of 50 to 100 KeV and 10 15
/ Cm 2 degrees implanted, leaving a layer of silicon thin film 3 of 0.1 micron thickness, the oxygen under the silicon thin third layer to form an ion implanted layer 2, (c) 1200 ° to 1
The ion implantation layer 2 is activated by annealing in an inert atmosphere at about 300 ° C. for about 1 to 3 hours to form a silicon oxide film as the ion implantation activation layer 4 with a thickness of 0.1 to 0.3 μm. The crystal defects induced by ion implantation in the silicon thin film 3 are also annealed out while being formed to a degree to form a single crystal film having good crystallinity. (D)
Next, the surface of the silicon thin film 3 of the wafer of (c) is brought into close contact with one main surface of the quartz substrate 5 that has been mirror-polished, and the quartz substrate is heated to 800 to 1200 degrees in a hydrogen atmosphere to cause a silanol reaction. 5 and the wafer are attached. (E) Next, the other main surface of the silicon wafer, that is, the back surface is removed by chemical etching using a saturated aqueous solution of KOH or the like. At this time, the quartz substrate 5 and the ion implantation activation layer 4 formed into a silicon oxide film are hardly etched, that is, the etching is automatically stopped at the ion implantation activation layer 4. (F) Next, if necessary, the ion implantation activation layer 4 formed into a silicon oxide film can be removed by etching with hydrofluoric acid or the like.
It is possible to form a thin film semiconductor substrate in which the silicon thin film 3 made of a single crystal having a thickness of 1 micron is attached to one main surface of the quartz substrate 5. The ion-implanted activation layer 4 may be left as it is, or the etching may be stopped halfway to leave a required thickness.

【0008】なお、イオン打ち込み層2には酸素イオン
打ち込みの他、窒素イオン打ち込みや酸素と窒素のイオ
ン打ち込みおよびボロンイオン打ち込みなどを行っても
良く、その場合にはイオン打ち込み活性化層4はシリコ
ン窒化膜、シリコン酸窒化膜あるいはP+シリコン層な
どに成るが、いずれもエッチングの停止層としての作用
があると共に、シリコン窒化膜とシリコン酸窒化膜は燐
酸や弗酸系のエッチングによりシリコン薄膜を残して選
択的に除去できるが、P+シリコン層の場合のみメカノ
ケミカル・エッチングを用いる必要がある。
In addition to oxygen ion implantation, nitrogen ion implantation, oxygen and nitrogen ion implantation, and boron ion implantation may be performed on the ion implantation layer 2. In that case, the ion implantation activation layer 4 is made of silicon. Although it is a nitride film, a silicon oxynitride film, or a P + silicon layer, both act as an etching stop layer, and the silicon nitride film and the silicon oxynitride film form a silicon thin film by etching with phosphoric acid or hydrofluoric acid. Although it can be selectively removed by leaving it, mechanochemical etching needs to be used only in the case of the P + silicon layer.

【0009】さらに、シリコンウエーハ1は他の半導体
ウエーハであっても良く、その場合にはシリコン薄膜3
は他の半導体薄膜となる。
Further, the silicon wafer 1 may be another semiconductor wafer, in which case the silicon thin film 3 is used.
Will be another semiconductor thin film.

【0010】本発明による半導体薄膜基板はTFTに用
いられ、とりわけ高速動作を要するハイビジョン・テレ
ビ用の液晶テレビまたはビデオカメラのビューファイン
ダー用の液晶表示体を駆動する画素およびX−Y駆動回
路用のTFTとして用いることができる。
The semiconductor thin film substrate according to the present invention is used for a TFT, and particularly for a pixel and an XY drive circuit for driving a liquid crystal display body for a liquid crystal television for a high-definition television or a viewfinder of a video camera which requires a high speed operation. It can be used as a TFT.

【0011】[0011]

【発明の効果】本発明により、結晶欠陥が少なく、石英
とシリコンとの界面準位も少なく、シリコン膜中にドー
パントが拡散するということもない、良質のシリコン薄
膜基板を形成できる効果がある。
According to the present invention, it is possible to form a high-quality silicon thin film substrate with few crystal defects, few interface states between quartz and silicon, and no diffusion of dopant into the silicon film.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明の一実施例を示す薄膜半導体基板の製
法を工程順に示す断面図である。
FIG. 1 is a cross-sectional view showing a method of manufacturing a thin film semiconductor substrate according to an embodiment of the present invention in the order of steps.

【符号の説明】[Explanation of symbols]

1・・・シリコンウエーハ 2・・・イオン打ち込み層 3・・・シリコン薄膜 4・・・イオン打ち込み活性化層 5・・・石英基板 1 ... Silicon wafer 2 ... Ion implantation layer 3 ... Silicon thin film 4 ... Ion implantation activation layer 5 ... Quartz substrate

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】 石英基板の少なくとも一主面には0.1
ミクロン厚さ程度以下の半導体単結晶膜を張り付けたこ
とを特徴とする薄膜半導体基板の製法。
1. At least one main surface of a quartz substrate is 0.1.
A method of manufacturing a thin film semiconductor substrate, characterized in that a semiconductor single crystal film having a thickness of about a micron or less is attached.
【請求項2】 半導体単結晶膜をシリコンと成したこと
を特徴とする請求項1記載の薄膜半導体基板の製法。
2. The method for producing a thin film semiconductor substrate according to claim 1, wherein the semiconductor single crystal film is made of silicon.
【請求項3】 シリコン単結晶ウエーハの一主面から
0.1ミクロン深さ程度に酸素イオンをイオン打ち込み
し、高温でアニールして前記酸素イオン打ち込み層をシ
リコン酸化膜となしたシリコン単結晶ウエーハの前記一
主面を石英基板にシラノール反応により張り付け、シリ
コン単結晶ウエーハの他の主面から水酸化カリュウムの
飽和水溶液などでシリコン層を前記シリコン酸化膜まで
ケミカルエッチすることを特徴とする請求項1および請
求項2記載の薄膜半導体基板の製法。
3. A silicon single crystal wafer in which oxygen ions are ion-implanted to a depth of about 0.1 μm from one main surface of a silicon single crystal wafer and annealed at a high temperature to form the oxygen ion-implanted layer as a silicon oxide film. Said one main surface of said is adhered to a quartz substrate by a silanol reaction, and the silicon layer is chemically etched from the other main surface of the silicon single crystal wafer to a silicon oxide film with a saturated aqueous solution of potassium hydroxide or the like. The method for producing a thin film semiconductor substrate according to claim 1 and claim 2.
【請求項4】 シリコン単結晶ウエーハの一主面から
0.1ミクロン深さ程度に窒素イオンをイオン打ち込み
し、高温でアニールして前記窒素イオン打ち込み層をシ
リコン窒化膜となしたシリコン単結晶ウエーハの前記一
主面を石英基板にシラノール反応により張り付け、シリ
コン単結晶ウエーハの他の主面から水酸化カリュウムの
飽和水溶液などでシリコン層を前記シリコン窒化膜まで
ケミカルエッチすることを特徴とする請求項1および請
求項2記載の薄膜半導体基板の製法。
4. A silicon single crystal wafer in which nitrogen ions are ion-implanted to a depth of about 0.1 μm from one main surface of a silicon single crystal wafer and annealed at a high temperature to form the nitrogen ion-implanted layer as a silicon nitride film. The one main surface of the is adhered to a quartz substrate by a silanol reaction, and the silicon layer is chemically etched from the other main surface of the silicon single crystal wafer to the silicon nitride film with a saturated aqueous solution of potassium hydroxide or the like. The method for producing a thin film semiconductor substrate according to claim 1 and claim 2.
【請求項5】 シリコン単結晶ウエーハの一主面から
0.1ミクロン深さ程度に酸素イオンと窒素イオンをイ
オン打ち込みし、高温でアニールして前記酸素と窒素イ
オン打ち込み層をシリコン酸窒化膜となしたシリコン単
結晶ウエーハの前記一主面を石英基板にシラノール反応
により張り付け、シリコン単結晶ウエーハの他の主面か
ら水酸化カリュウムの飽和水溶液などでシリコン層を前
記シリコン酸窒化膜までケミカルエッチすることを特徴
とする請求項1および請求項2記載の薄膜半導体基板の
製法。
5. An oxygen ion and a nitrogen ion are ion-implanted to a depth of about 0.1 micron from one main surface of a silicon single crystal wafer and annealed at a high temperature to form the oxygen and nitrogen ion-implanted layer into a silicon oxynitride film. The one main surface of the made silicon single crystal wafer is attached to a quartz substrate by a silanol reaction, and the silicon layer is chemically etched from the other main surface of the silicon single crystal wafer to a silicon oxynitride film with a saturated aqueous solution of potassium hydroxide. The method for producing a thin film semiconductor substrate according to claim 1 or 2, wherein.
【請求項6】 シリコン単結晶ウエーハの一主面から
0.1ミクロン深さ程度にボロンイオンをイオン打ち込
みし、高温でアニールして前記ボロンイオン打ち込み層
を活性化したシリコン単結晶ウエーハの前記一主面を石
英基板にシラノール反応により張り付け、シリコン単結
晶ウエーハの他の主面から水酸化カリュウムの飽和水溶
液などでシリコン層を前記ボロンイオン打ち込み活性化
層までケミカルエッチすることを特徴とする請求項1お
よび請求項2記載の薄膜半導体基板の製法。
6. A silicon single crystal wafer in which boron ions are ion-implanted to a depth of about 0.1 μm from one main surface of a silicon single crystal wafer and annealed at a high temperature to activate the boron ion-implanted layer. The main surface is attached to a quartz substrate by a silanol reaction, and the silicon layer is chemically etched from the other main surface of the silicon single crystal wafer to the boron ion-implanted activation layer with a saturated aqueous solution of potassium hydroxide or the like. The method for producing a thin film semiconductor substrate according to claim 1 and claim 2.
JP15646192A 1992-06-16 1992-06-16 Manufacture of thin film semiconductor substrate Pending JPH065484A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15646192A JPH065484A (en) 1992-06-16 1992-06-16 Manufacture of thin film semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15646192A JPH065484A (en) 1992-06-16 1992-06-16 Manufacture of thin film semiconductor substrate

Publications (1)

Publication Number Publication Date
JPH065484A true JPH065484A (en) 1994-01-14

Family

ID=15628261

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15646192A Pending JPH065484A (en) 1992-06-16 1992-06-16 Manufacture of thin film semiconductor substrate

Country Status (1)

Country Link
JP (1) JPH065484A (en)

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