JPH0653899A - Radio transmitter - Google Patents

Abstract

PURPOSE:To prevent the radiation of a sprurious spectrum in a high frequency output signal on a boundary point when a dust data signal in a time-sharing multiplex signal is continued. CONSTITUTION:This radio transmitter is provided with a logical processing part 1A for logically processing inputted burst data by coinciding its timing by a frequency-divided clock whose frequency is divided so as to be coincided between the periods of a clock inputted from the external and the burst data, a modulation part 2 including a digital filter circuit 21 for shaping the waveform of output data from the processing part 1A in accordance with a modulation format, and a high frequency amplifying part 3 for inputting the output of the modulation part 2, letting the input signal be a digital filter reset signal 20 by a burst timing signal outputted from the processing part 1A and outputting a high frequency output signal with the rising at every time slot smoothed. When two continuous time slots which are adjacent in time are inputted, the logic circuit sends a continuous state detecting signal 18 for the adjacent time slots and a gate circuit 19 inhibits the passage of a reset signal 20 to the filter circuit 21.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wireless transmitter, and more particularly to a wireless transmitter for transmitting burst high frequency signals which do not interfere with adjacent channels in time division multiplex wireless communication.

[0002]

2. Description of the Related Art When a conventional radio transmission apparatus is composed of a logic processing section 1, a modulation section 2 and a high frequency amplification section 3 as shown in FIG.
It includes a logic processing circuit 14 for performing the difference conversion and the like, and a frequency divider 13 for the input clock signal 12. The logic data processing unit 1 receives the input data 11 and the input clock signal 12, and outputs a difference conversion signal. The input clock signal 12 is frequency-divided by the frequency divider 13 to the data rate. In this example, the division ratio is 1/8. Logic processing circuit 1
In 4, the input data 11 and the divided clock 17 are input and the timing signal of each time slot when transmitting in time division is extracted. The timing signal may be given from the outside. This timing signal is sent as a burst timing signal 15 to the high frequency amplifier 3 and the modulator 2 in the subsequent stage. The modulation section 2 includes a digital filter 21 and a modulation circuit 22. The digital filter 21 inputs the data signal 16 processed by the logic processing circuit 14 and shapes the waveform of the transmission spectrum. For example, the digital filter 21 has a Gaussian filter function and MS
Waveform shaping such as conversion into a K (Minimum Shift Keying) modulated signal is performed. The burst timing signal 15 resets the digital filter at the beginning of each time slot to synchronize the data with the clock in the time slot. The modulation circuit 22 modulates the carrier wave using the output signal of the digital filter 21 as a modulation signal. The high frequency amplification unit 3 amplifies the modulated carrier wave 23 output from the modulation unit 2, and here rises when the signal of each time slot is transmitted in burst form.
Waveform shaping is performed to smooth the rising and falling portions of the burst signal to prevent unnecessary spread of the spectrum during the falling edge. Burst timing signal 1
Reference numeral 5 is used to match the timing of this waveform shaping operation.

Next, this waveform shaping operation will be described with reference to FIG. When the burst data signal 23 is as shown in FIG. 4A and the burst timing signal 15 is input at the timing of FIG. 4C, a high frequency output signal 24 as shown in FIG. 4B.
Is smoothly wave-shaped at the rising and falling edges.
As a result, it is possible to prevent unnecessary spread of the spectrum caused by a sudden change in the amplitude of the rising and falling of the transmitted wave.

[0004]

In this conventional radio transmitter, the burst timing signal not only resets the high frequency amplifier but also the digital filter. Therefore, when the digital filter is reset, the output of the digital filter is At the time of the reset, discontinuous or smooth change cannot be obtained. As shown in FIG. 4, the reset point, that is, the burst timing signal 15 is the high frequency output signal 24.
If it is located before the rise of the antenna, even if a discontinuity occurs at that point and the spectrum spreads, it is not radiated from the antenna. Even if it is radiated, its level is so small that it does not affect the adjacent frequency channel.

However, in a base station of an automobile telephone system, adjacent time slots may be used together. At this time, the state becomes as shown in FIG. 5, and since the time slots A and B of the burst-shaped data signal 23 are continuously transmitted, the level of the high frequency output signal 24 is at the boundary between the time slots A and B. Burst timing signal 15 before
This resets the digital filter 21. The high-frequency output waveform due to the discontinuity of the data generated by this reset is not smooth, and the high-frequency signal 24 having an unnecessarily wide spectrum is radiated from the antenna, which interferes with other adjacent frequency channels and makes normal communication difficult. There is a drawback that.

[0006]

A radio transmitter according to the present invention logically adjusts the timing of input burst data by a divided clock which is divided so as to match the cycle of an external clock and the burst data. A logic processing unit for processing, a modulation unit including a digital filter circuit for waveform shaping the output data of the logic processing unit according to a modulation format, and a burst output from the logic processing unit by inputting the output of the modulation unit. In a radio transmitter having a high-frequency amplifier that outputs a high-frequency output signal in which the rising edge of each time slot is smoothed by using a timing signal as a reset signal for the digital filter, two consecutive time slots that are temporally adjacent to each other are provided. When input, the logic processing section sends out a continuous state detection signal of an adjacent time slot. Having a gate circuit which does not pass through the reset signal for the serial digital filter.

[0007]

The present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of an embodiment of the present invention. Figure 1
3, the same reference numerals as those in the conventional example of FIG. 3 have the same configuration. That is, in the present embodiment, the gate circuit 19 is added and the timing signal 15 is added to the controlled gate circuit 1 described later.
After passing 9 through, the digital filter 21 is supplied. FIG. 2 is a time chart showing the operation of this embodiment.

Next, the operation of this embodiment will be described. In the embodiment shown in FIG. 1, the logic processor 1A, the modulator 2, and the high frequency amplifier 3 are provided.
It is divided into two blocks. The logic processing unit 1A performs logic processing such as difference conversion on the data signal 11 input to the present device, and extracts a burst timing signal 15 and a burst continuous state signal 18 from the logic processing circuit 14A.
And the data signal 11 by dividing the input clock signal 12
There is a gate circuit 19 for controlling the burst timing signal 15 by the frequency divider 13 and the burst continuous state signal 18 to generate the digital filter reset signal 20. The modulation section 2 includes a digital filter 21 and a modulation circuit 22. The digital filter 21 converts the logically processed data signal 16 into a baseband signal for modulation. For example, the digital filter 21 has a Gaussian filter function and converts into a baseband signal for MSK or the like. Modulation circuit 2
The reference numeral 2 also includes, for example, a quadrature modulator and a frequency converter for converting to a high frequency band. The high frequency amplifier 3 amplifies the modulated carrier wave 23 to a level at which it can be radiated from the antenna 4. Further, here, envelope waveform shaping is performed so that the burst-like transmission signal smoothly rises and falls. This is to prevent unnecessary spread of the spectrum caused by a sudden change in amplitude.

In order for the digital filter 24 to operate normally, the data and clock must be synchronized in the time slots A and B of the burst data signal shown in FIG. Therefore, burst timing signal 1
5 is used to reset the digital filter 21 for synchronization. Note that once this synchronization is established, it will not be lost for a while, so it is not reset for each time slot, and is reset only when the time slots are not continuously used. The logic processing circuit 14A detects the continuous state of the burst time slots A and B and outputs a burst continuous state signal 18. The gate circuit 19 is controlled by the burst continuous state signal 18. That is, as shown in FIGS. 2 (a) and 2 (c), when two adjacent time slots A and B are not in the transmission state, the burst control signal 15 is passed and the reset signal 20 is output. If it continues, the reset signal 20 is not sent to close the gate circuit 19. Therefore, the digital filter 21
Continues waveform shaping. By doing so, it is possible to prevent the unnecessary spread of the spectrum from occurring at the boundary of the time slot as in the conventional case.

[0010]

As described above, according to the present invention, the digital filter is reset only when the time slots are not continuously used under the control of the gate circuit.
There is no discontinuity in the modulated data and no unnecessary spread of the spectrum. Therefore, there is an effect that the adjacent spectrum is not disturbed by an unnecessary spectrum.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention.

FIG. 2 is an explanatory diagram of a timing chart showing the operation of the present embodiment.

FIG. 3 is a block diagram of a conventional example.

FIG. 4 is an explanatory diagram of a timing chart of a conventional example.

FIG. 5 is an explanatory diagram showing another timing of the conventional example.

[Explanation of symbols]

 1 Logic Processing Section 2 Modulation Section 3 High Frequency Amplifier Section 4 Antenna 11 Input Data 12 Input Clock 13 Frequency Divider 14, 14A Logic Processing Circuit 15 Burst Timing Signal 16 Logic Processed Data Signal 17 Frequency Division Clock 18 Burst Continuous State Signal 19 Gate circuit 20 Reset signal 21 Digital filter 22 Modulation circuit 23 Modulated carrier signal 24 High frequency output signal

Claims (1)

[Claims] 1. A logic processing unit for logically processing input burst data at a timing with a frequency-divided clock that has been divided so as to match the cycle of an external clock and burst data, and a logic processing unit of the logic processing unit. A modulation unit including a digital filter circuit for shaping the waveform of output data in accordance with a modulation format, and a reset signal for the digital filter according to a burst timing signal input from the output of the modulation unit and output from the logic processing unit. In a wireless transmission device having a high frequency amplification unit that outputs a high frequency output signal in which the rising edge of each time slot is smoothed, the logical processing units are adjacent when two consecutive time slots that are temporally adjacent are input. A continuous signal for detecting the continuous state of the time slot is transmitted and a reset signal for the digital filter is sent. A wireless transmission device having a gate circuit that does not pass signals.