JPH0653377A - Diode - Google Patents
DiodeInfo
- Publication number
- JPH0653377A JPH0653377A JP20517392A JP20517392A JPH0653377A JP H0653377 A JPH0653377 A JP H0653377A JP 20517392 A JP20517392 A JP 20517392A JP 20517392 A JP20517392 A JP 20517392A JP H0653377 A JPH0653377 A JP H0653377A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor substrate
- metal foil
- insulating film
- diode
- mesa
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
Landscapes
- Photovoltaic Devices (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、太陽電池特に宇宙空間
で動作する人工衛星や宇宙ステーションの電源に使用さ
れる太陽電池において、ブロッキングダイオードまたは
バイパスダイオード等として、太陽電池保護のために用
いられるダイオードの改良に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is used as a blocking diode or a bypass diode for protecting a solar cell in a solar cell, particularly a solar cell used as a power source for an artificial satellite or a space station operating in outer space. The present invention relates to improvement of a diode.
【0002】[0002]
【従来の技術】宇宙空間で動作する人工衛星や宇宙ステ
ーションにおいて、その電源は太陽電池を複数個接続し
パネルの上に貼った、いわゆる太陽電池パネルを使用し
ている。人工衛星の高機能化や大型化に伴い、電力需要
は大きくなりつつあり、それに伴い、太陽電池パネルの
大型化が要求されてきている。しかし、打上げロケット
の容量や打上げ重量に制限があり、太陽パネルも打上げ
時には、小型、軽量であることが望まれる。この太陽電
池パネルには、太陽電池保護のためにダイオードが接続
されている。2. Description of the Related Art In an artificial satellite or a space station operating in outer space, a so-called solar cell panel is used as a power source, in which a plurality of solar cells are connected and pasted on the panel. The demand for electric power is increasing with the increase in functionality and size of artificial satellites, and accordingly, there is a demand for size increase of solar cell panels. However, the launch rocket is limited in capacity and launch weight, and it is desired that the solar panel be small and lightweight at the time of launch. Diodes are connected to the solar cell panel to protect the solar cell.
【0003】従来、このダイオードは、太陽電池パネル
の裏や人工衛星本体に取付けられていたが、太陽電池パ
ネルが人工衛星の打上げ時に折りたたまれていたのが、
宇宙空間で展開されるようになり、このパネル自身の薄
型化や小型化が進み、ダイオード自身も太陽電池セルと
同じ厚さのものが開発されてきた。この薄型ダイオード
は、半導体基板をダイオードの基板として利用してお
り、その一方の電極は半導体基板の裏面に金属をつけ、
他方の電極は、金属箔を端子として引出している。Conventionally, this diode has been attached to the back of a solar cell panel or the main body of an artificial satellite, but the solar cell panel was folded when the artificial satellite was launched.
As it has been deployed in outer space, the panel itself has become thinner and smaller, and the diode itself has been developed to have the same thickness as the solar cell. This thin diode uses a semiconductor substrate as a diode substrate, and one of its electrodes has a metal attached to the back surface of the semiconductor substrate.
The other electrode has a metal foil as a terminal.
【0004】図2は、薄い形状の従来のダイオードの一
例の略断面図である。たとえば、P型の半導体基板1
は、寸法2cm×2cmで厚さが0.1〜0.5mmの
シリコン単結晶でできている。半導体基板1の1辺の寸
法は、1cm〜10cm程度のものもある。半導体基板
1の表面にはN型の拡散層3を形成し、半導体基板1と
の間にPN接合9が形成され、ダイオードとして機能す
る。表面はSiO2 のような酸化膜2により覆われてい
る。N型の拡散層3の電極4は、金属箔6が溶接または
はんだ付けにより取付けられ端子として引出されてい
る。半導体基板1の裏面には金属被膜を設け電極5が形
成されている。宇宙空間での放熱をよくするため、ま
た、半導体基板に太陽光が入射することを防ぎ、光電流
によるダイオードの逆方向の漏れ電流を小さくするた
め、表面には、アルミ板または鏡等による反射層8が接
着剤7により取付けられている。半導体基板1と金属箔
6は、酸化膜2および接着剤7により絶縁されている。FIG. 2 is a schematic cross-sectional view of an example of a conventional thin diode. For example, a P-type semiconductor substrate 1
Is made of a silicon single crystal having a size of 2 cm × 2 cm and a thickness of 0.1 to 0.5 mm. The size of one side of the semiconductor substrate 1 may be about 1 cm to 10 cm. An N type diffusion layer 3 is formed on the surface of the semiconductor substrate 1, and a PN junction 9 is formed between the semiconductor substrate 1 and the semiconductor substrate 1 to function as a diode. The surface is covered with an oxide film 2 such as SiO 2 . The metal foil 6 is attached to the electrode 4 of the N type diffusion layer 3 by welding or soldering and is drawn out as a terminal. A metal film is provided on the back surface of the semiconductor substrate 1 to form the electrodes 5. To improve heat dissipation in outer space, to prevent sunlight from entering the semiconductor substrate, and to reduce leakage current in the reverse direction of the diode due to photocurrent, the surface is reflected by an aluminum plate or mirror. Layer 8 is attached by adhesive 7. The semiconductor substrate 1 and the metal foil 6 are insulated by the oxide film 2 and the adhesive 7.
【0005】この金属箔6と半導体基板1は、絶縁する
ことが必要で、この間の絶縁が破壊されるとダイオード
として機能しなくなる。このため、絶縁を強化するため
に半導体基板1にメサエッチングを施し、金属箔6が半
導体基板1と接触する部分の絶縁をよくすることが考え
られている。The metal foil 6 and the semiconductor substrate 1 need to be insulated, and if the insulation between them is broken, they will not function as a diode. Therefore, it has been considered that the semiconductor substrate 1 is subjected to mesa etching in order to strengthen the insulation to improve the insulation of the portion where the metal foil 6 is in contact with the semiconductor substrate 1.
【0006】図3は、その一例の略断面図であって、金
属箔6の下方の半導体基板1の側方にメサエッチングを
施しメサ10が設けられている。メサ10により金属箔
6と半導体基板1との距離が大きくなり、絶縁が強化さ
れる。FIG. 3 is a schematic cross-sectional view of an example thereof, in which a mesa 10 is provided on the side of the semiconductor substrate 1 below the metal foil 6 by mesa etching. The mesa 10 increases the distance between the metal foil 6 and the semiconductor substrate 1 and strengthens the insulation.
【0007】[0007]
【発明が解決しようとする課題】従来の構造の場合、半
導体基板1と金属箔6との間にゴミなどが付着し、導通
する可能性があった。In the case of the conventional structure, there is a possibility that dust or the like will adhere between the semiconductor substrate 1 and the metal foil 6 to make them conductive.
【0008】[0008]
【課題を解決するための手段】本発明においては、少な
くとも金属箔の下方の半導体基板の側面は絶縁膜によっ
て覆われているようにした。In the present invention, at least the side surface of the semiconductor substrate below the metal foil is covered with an insulating film.
【0009】[0009]
【作用】金属箔と半導体基板との間は絶縁膜によって覆
われているから、両者が導通することはない。Since the metal foil and the semiconductor substrate are covered with the insulating film, they are not electrically connected to each other.
【0010】[0010]
【実施例】図1は、本発明の一実施例の略断面図であ
る。図3に示される従来例と異なるところは、少なくと
も金属箔6の下方の半導体基板1の側面が絶縁膜11で
覆われていることである。この絶縁膜11は、たとえ
ば、シリコン酸化膜を溶剤で溶かしたものを側面に塗布
し、熱処理を行なうことで形成される絶縁膜や、ポリイ
ミドワニスを塗布し、熱処理で形成されるポリイミド
膜、または、粉末ガラスを電気融着させ、熱処理で形成
されるガラス層などを単層または、複層形成したものを
用いる。1 is a schematic sectional view of an embodiment of the present invention. The difference from the conventional example shown in FIG. 3 is that at least the side surface of the semiconductor substrate 1 below the metal foil 6 is covered with the insulating film 11. The insulating film 11 is, for example, an insulating film formed by coating a side surface of a solution of a silicon oxide film with a solvent and performing a heat treatment, or a polyimide film formed by applying a polyimide varnish and performing a heat treatment, or A glass layer or the like formed by heat-fusing powder glass by electric fusion and forming a single layer or multiple layers is used.
【0011】図1においては、メサエッチングによるメ
サ10が形成されているが、絶縁膜11が設けられてい
るから、メサがなくても側面部分の絶縁効果は強化され
ている。もちろん、メサ10を併用することで、さらに
絶縁が強化される。In FIG. 1, the mesa 10 is formed by mesa etching, but since the insulating film 11 is provided, the insulating effect of the side surface portion is enhanced without the mesa. Of course, by using the mesa 10 together, the insulation is further strengthened.
【0012】この絶縁膜を均一な厚さで形成する方法と
しては、たとえば、予め、塗布する材料を表面が平らな
板の上にスピンコートし、均一な厚さに材料を伸ばし、
その上にダイオードの半導体基板を立て、側面に材料を
転写することができる。As a method for forming this insulating film with a uniform thickness, for example, a material to be applied is spin-coated on a plate having a flat surface, and the material is spread to a uniform thickness.
The semiconductor substrate of the diode can be placed on top of it and the material can be transferred to the side.
【0013】[0013]
【発明の効果】本発明によれば半導体基板1と金属箔6
との間に絶縁膜11が設けられているから、絶縁が強化
される。According to the present invention, the semiconductor substrate 1 and the metal foil 6 are
Since the insulating film 11 is provided between and, the insulation is strengthened.
【図1】本発明の一実施例の略断面図である。FIG. 1 is a schematic sectional view of an embodiment of the present invention.
【図2】従来のダイオードの一例の略断面図である。FIG. 2 is a schematic cross-sectional view of an example of a conventional diode.
【図3】従来のダイオードの他の一例の略断面図であ
る。FIG. 3 is a schematic cross-sectional view of another example of a conventional diode.
1 半導体基板 2 酸化膜 3 拡散層 4,5 電極 6 金属箔 7 接着剤 8 反射層 9 PN接合 10 メサ 11 絶縁膜 1 Semiconductor Substrate 2 Oxide Film 3 Diffusion Layer 4, 5 Electrode 6 Metal Foil 7 Adhesive 8 Reflective Layer 9 PN Junction 10 Mesa 11 Insulating Film
Claims (1)
の導電型の拡散層を形成し、それぞれの面に電極を設
け、少なくとも外部引出線を有する側の半導体基板の側
面は絶縁膜により覆われていることを特徴とするダイオ
ード。1. A second conductive film is formed on the surface of a semiconductor substrate of the first conductivity type.
2. A diode characterized in that a conductive type diffusion layer is formed, an electrode is provided on each surface, and at least a side surface of the semiconductor substrate on the side having the external lead wire is covered with an insulating film.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP20517392A JP3280075B2 (en) | 1992-07-31 | 1992-07-31 | Diode for solar panel |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP20517392A JP3280075B2 (en) | 1992-07-31 | 1992-07-31 | Diode for solar panel |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH0653377A true JPH0653377A (en) | 1994-02-25 |
JP3280075B2 JP3280075B2 (en) | 2002-04-30 |
Family
ID=16502636
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP20517392A Expired - Fee Related JP3280075B2 (en) | 1992-07-31 | 1992-07-31 | Diode for solar panel |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP3280075B2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9214573B2 (en) | 2011-11-09 | 2015-12-15 | Sharp Kabushiki Kaisha | Bypass diode |
JP2018200978A (en) * | 2017-05-29 | 2018-12-20 | 富士電機株式会社 | Semiconductor device |
-
1992
- 1992-07-31 JP JP20517392A patent/JP3280075B2/en not_active Expired - Fee Related
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9214573B2 (en) | 2011-11-09 | 2015-12-15 | Sharp Kabushiki Kaisha | Bypass diode |
JP2018200978A (en) * | 2017-05-29 | 2018-12-20 | 富士電機株式会社 | Semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
JP3280075B2 (en) | 2002-04-30 |
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