JPH0648472B2 - Back-up memory check method - Google Patents

Back-up memory check method

Info

Publication number
JPH0648472B2
JPH0648472B2 JP60244029A JP24402985A JPH0648472B2 JP H0648472 B2 JPH0648472 B2 JP H0648472B2 JP 60244029 A JP60244029 A JP 60244029A JP 24402985 A JP24402985 A JP 24402985A JP H0648472 B2 JPH0648472 B2 JP H0648472B2
Authority
JP
Japan
Prior art keywords
memory
volatile memory
backup
data
backup memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP60244029A
Other languages
Japanese (ja)
Other versions
JPS62105251A (en
Inventor
哲哉 安藤
健 増田
久 岡本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Nippon Telegraph and Telephone Corp
Original Assignee
Hitachi Ltd
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Nippon Telegraph and Telephone Corp filed Critical Hitachi Ltd
Priority to JP60244029A priority Critical patent/JPH0648472B2/en
Publication of JPS62105251A publication Critical patent/JPS62105251A/en
Publication of JPH0648472B2 publication Critical patent/JPH0648472B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、揮発性メモリをバツクアツプする不揮発性メ
モリよりなるバツクアツプメモリのチエツク方式に関す
る。
Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a back-up memory check system including a non-volatile memory that backs up a volatile memory.

〔発明の背景〕[Background of the Invention]

半導体メモリ等の揮発性メモリを磁気デイスク等の不揮
発性メモリでバツクアツプするバツクアツプメモリは例
えば特開昭58-194187号公報「メモリ装置」などがあ
る。このようなバツクアツプメモリは上位から直接的に
書込み,読取りすることができないため、バツクアツプ
メモリの正常性をチエツクするには以下のような手順に
よらねばならない。
A back-up memory that backs up a volatile memory such as a semiconductor memory with a non-volatile memory such as a magnetic disk is disclosed in, for example, Japanese Patent Laid-Open No. 58-194187, "Memory Device". Since such a backup memory cannot be directly written and read from the upper level, the following procedure must be performed to check the normality of the backup memory.

(1)揮発性メモリの全面に特定のデータを書込む。(1) Write specific data on the entire surface of the volatile memory.

(2)揮発性メモリのアクセスを止め、バツクアツプメモ
リへ全面退避させる。
(2) Stop access to the volatile memory and save the entire area to the backup memory.

(3)電源切断し、再投入する。(3) Turn off the power and then turn it on again.

(4)不揮発性メモリ内の退避データを全面揮発性メモリ
へ転送されるのを待つ。
(4) Wait for the saved data in the non-volatile memory to be transferred to the entire volatile memory.

(5)揮発性メモリを全面読取り。(5) Read the entire volatile memory.

(6)(1)で書いたデータとの一致を確認する。(6) Check the agreement with the data written in (1).

上記したように、バツクアツプメモリの正常性をチエツ
クするには手順中の(3)の電源切断,再投入時に人手を
要し、プログラムのみによる自動診断等が不可能となる
問題がある。
As described above, in order to check the normality of the backup memory, there is a problem in that it takes manpower at the time of turning off and on the power again in the step (3), which makes it impossible to perform automatic diagnosis only by the program.

〔発明の目的〕[Object of the Invention]

本発明の目的は、前記した従来のバツクアツプメモリの
チエツク方式の欠点をなくし、人手を介せず行えるバツ
クアツプメモリのチエツク方式を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to eliminate the drawbacks of the conventional check-up system of the backup memory and to provide a check-up system of the backup memory which can be performed without human intervention.

〔発明の概要〕[Outline of Invention]

本発明の要点は、揮発性メモリからバツクアツプメモリ
への退避動作の中止、およびバツクアツプメモリから揮
発性メモリの引上げの指令をプログラム指令可能とする
ことにより本指令を用いて下記の手順にてバツクアツプ
メモリのチエツクを行うものである。
The main point of the present invention is to stop the saving operation from the volatile memory to the backup memory, and to make the command of pulling up the volatile memory from the backup memory programmable so that this command can be used in the following procedure. This is a check-up of the backup memory.

(1)揮発性メモリの全面に特定のデータを書込む。(1) Write specific data on the entire surface of the volatile memory.

(2)揮発性メモリのアクセスを止め、バツクアツプメモ
リへ全面退避させる。
(2) Stop access to the volatile memory and save the entire area to the backup memory.

(3)データ退避動作の中止を設定する。(3) Set to cancel the data save operation.

(4)揮発性メモリの全面に(1)項と異なるデータを書込
む。
(4) Write data different from that in (1) on the entire surface of the volatile memory.

(5)バツクアツプメモリから揮発性メモリへ全面引上げ
の動作を設定し、揮発性メモリの全面へ転送する。
(5) Set the pull-up operation from the backup memory to the volatile memory and transfer it to the entire volatile memory.

(6)揮発性メモリの全面を読取る。(6) Read the entire surface of the volatile memory.

(7)全面(1)項で書いたデータとの一致を確認する。(7) Whole surface Confirm the agreement with the data written in (1).

上記により、(7)項で揮発性メモリのデータが、(4)項で
書いたデータから(1)項で書いたデータに書替えられて
おれば、バツクアツプメモリへの退避動作,引上げ動作
の正常性が確認でき、バツクアツプメモリの正常性が人
手を介せず、プログラムのみの指令により行うことがで
きる。
From the above, if the data in the volatile memory in item (7) has been rewritten from the data written in item (4) to the data written in item (1), the save operation and the pull-up operation to the backup memory can be performed. The normality can be confirmed, and the normality of the back-up memory can be performed by the instruction of only the program without human intervention.

〔発明の実施例〕Example of Invention

以下、本発明の一実施例を図により説明する。図の1は
上位のホスト装置,2はホスト装置1より書込み(以下
Wと略称する)及び読取り(以下Rと略称する)される
揮発性メモリ,3は揮発性メモリ2をバツクアツプする
不揮発性メモリより構成されるバツクアツプメモリ,4
は揮発性メモリ2がWされたことを感知し、その部分を
バツクアツプメモリ3への退避を指示する退避指示回
路,5は本メモリ装置の電源の投入時にバツクアツプメ
モリ3から揮発性メモリ2へデータの引上げを指示する
引上げ指示回路,6はホスト装置1からの指令によりデ
ータの退避指示回路4の動作を禁止する退避動作禁止回
路,7はホスト装置1からの指令により、バツクアツプ
メモリ3から揮発性メモリ2へのデータの引上げを指示
する引上げ指示回路,8はアンドゲート,9はオアゲー
トをそれぞれ示す。
An embodiment of the present invention will be described below with reference to the drawings. In the figure, 1 is a host device, 2 is a volatile memory written (hereinafter abbreviated as W) and read (hereinafter abbreviated as R) from the host device 1, and 3 is a non-volatile memory that backs up the volatile memory 2. Back-up memory consisting of 4
Is a save instruction circuit that senses that the volatile memory 2 has been W and instructs that part to be saved in the backup memory 3. Reference numeral 5 is a backup memory 3 that is used when the power of the memory device is turned on. A pull-up instruction circuit for instructing the pulling up of data, 6 is a save operation inhibiting circuit for inhibiting the operation of the data save instruction circuit 4 in response to a command from the host device 1, and 7 is a backup memory 3 in response to a command from the host device 1. 8 is an AND gate, 9 is an OR gate, and 8 is an AND gate.

まず、図の通常時のバツクアツプメモリ3の動作を説明
する。
First, the operation of the backup memory 3 at the normal time in the figure will be described.

(1)ホスト装置1より揮発性メモリ2にWする。(1) W is applied to the volatile memory 2 from the host device 1.

(2)退避指示回路4より、ホスト装置1からのアクセス
がない時に(1)でWされた部分をバツクアツプメモリ3
へWする。
(2) From the save instruction circuit 4, the portion which is W in (1) when there is no access from the host device 1 is backed up in the backup memory 3
Go to W.

(3)上記(1),(2)の実行を続け、揮発性メモリ2の最新
データにバツクアツプメモリの内容を合わせておく。
(3) Continue executing the above (1) and (2), and match the contents of the backup memory with the latest data in the volatile memory 2.

(4)電源切断し、再投入時に引上げ指示回路5によりバ
ツクアツプメモリ3の内容を揮発性メモリ2へ全面転送
し、揮発性メモリ2の内容は電源切断時のデータに回復
できる。
(4) When the power is turned off and then turned on again, the pull-up instruction circuit 5 transfers the entire contents of the backup memory 3 to the volatile memory 2 so that the contents of the volatile memory 2 can be restored to the data when the power was turned off.

次に、バツクアツプメモリ3のチエツク時の動作につい
て説明する。
Next, the operation of the back-up memory 3 at the time of checking will be described.

(1)揮発性メモリ2の全面に特定のデータをWする。(1) W specific data over the entire surface of the volatile memory 2.

(2)退避指示回路4により上記(1)のデータが全面バツク
アツプメモリ3に退避させる。
(2) The save instruction circuit 4 saves the above data (1) in the entire back-up memory 3.

(3)退避動作禁止回路6を設定する。これによりアンド
ゲート8で退避動作回路4の出力を禁止する。
(3) Set the save operation prohibition circuit 6. As a result, the AND gate 8 inhibits the output of the save operation circuit 4.

(4)揮発性メモリ2の全面に(1)項と異なるデータ(例え
ば、その反転パターン)をWする。
(4) W data (for example, its inversion pattern) different from the item (1) is written on the entire surface of the volatile memory 2.

(5)引上げ指示回路7を設定し、バツクアツプメモリ3
から揮発性メモリ2へ全面転送する。
(5) Set the pull-up instruction circuit 7, and set the backup memory 3
To the volatile memory 2.

(6)揮発性メモリ2の全面をRし、(1)項でWしたデータ
との一致を確認する。
(6) R the entire surface of the volatile memory 2 and confirm that it matches the data written in (1).

(6)の確認により、バツクアツプメモリ3の正常性がチ
エツクされる。
By checking (6), the normality of the backup memory 3 is checked.

〔発明の効果〕〔The invention's effect〕

本発明によれば、バツクアツプメモリのチエツクが電源
切断や投入の人手操作を介せず、プログラムのみで可能
となり、装置の診断の自動作等が容易になる。
According to the present invention, the check-up of the backup memory can be performed only by the program without the manual operation of turning the power off and on, and the self-diagnosis of the device can be facilitated.

【図面の簡単な説明】[Brief description of drawings]

図は本発明の一実施例を示すブロック図である。 1…ホスト装置、2…揮発性メモリ 3…バツクアツプメモリ 4…退避動作指示回路 5,7…引上げ指示回路 6…退避動作禁止回路 8…アンド回路、9…オア回路 FIG. 1 is a block diagram showing an embodiment of the present invention. DESCRIPTION OF SYMBOLS 1 ... Host device, 2 ... Volatile memory 3 ... Backup memory 4 ... Save operation instruction circuit 5, 7 ... Pull up instruction circuit 6 ... Save operation prohibition circuit 8 ... AND circuit, 9 ... OR circuit

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】揮発性メモリと該揮発性メモリへの書込み
ごとにその内容を揮発性メモリの動作の空時間に退避さ
せる不揮発性メモリよりなるバツクアツプメモリにおい
て、バツクアツプメモリへの前記退避動作の中止とバツ
クアツプメモリから揮発性メモリへの転送とをバツクア
ツプメモリの診断用に上位からの指令により可能とした
ことを特徴とするバツクアツプメモリのチエツク方式。
1. A back-up memory comprising a volatile memory and a non-volatile memory that saves the contents of the volatile memory each time writing is performed in the idle time of the operation of the volatile memory. The check-up method of the backup memory is characterized in that the cancellation of the backup and the transfer from the backup memory to the volatile memory are made possible by a command from the host for the diagnosis of the backup memory.
JP60244029A 1985-11-01 1985-11-01 Back-up memory check method Expired - Lifetime JPH0648472B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60244029A JPH0648472B2 (en) 1985-11-01 1985-11-01 Back-up memory check method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60244029A JPH0648472B2 (en) 1985-11-01 1985-11-01 Back-up memory check method

Publications (2)

Publication Number Publication Date
JPS62105251A JPS62105251A (en) 1987-05-15
JPH0648472B2 true JPH0648472B2 (en) 1994-06-22

Family

ID=17112649

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60244029A Expired - Lifetime JPH0648472B2 (en) 1985-11-01 1985-11-01 Back-up memory check method

Country Status (1)

Country Link
JP (1) JPH0648472B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2525048B (en) * 2014-04-11 2020-07-01 Cureton Jason Housing and retaining apparatus for insulation boarding

Also Published As

Publication number Publication date
JPS62105251A (en) 1987-05-15

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