JPH0646352B2 - Liquid crystal display - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial field of application> The present invention relates to a liquid crystal display device, and in particular, an improvement of a display information generating section in order to improve the display quality of a dot matrix color liquid crystal display device. The present invention relates to a liquid crystal display device.

<Conventional Technology> A conventional technology will be described below with reference to the drawings.

FIG. 6 is a pixel layout diagram of a dot matrix color liquid crystal display (hereinafter referred to as “display”).

In FIG. 6, the display 1 has a plurality of 1-dot pixels made up of three primary colors of red (R), green (G), and blue (B) (in this case, eight colors can be displayed in combination) in a matrix form. At this time, the dot Nos arranged for each column are d ₁ ,
d ₂ , ... D _n , row address Nos are ra ₁ , ra ₂ , ...
It is arranged in ... and ra _n). The dot shape in this case is a combination of "L" or "" shapes as shown by the solid line. By the way, the arrangement of the RGB pixels and the way of dividing the dots of the display device 1 are not the only ones and various patterns are conceivable. However, the dot shape is close to a point and the display resolution is improved. Since the pattern shown in FIG. 6 is considered to be the optimum arrangement, all the following description will be made with this arrangement.

FIG. 7 is a block diagram of a conventional liquid crystal display device.

In FIG. 7, reference numeral A is a display unit including a display unit 1 and a driver unit 2 for displaying predetermined characters, symbols, figures, etc. on the display unit 1. The driver unit 2 inputs the serial information SR _d of the first display information, the second display information, and the third display information, in which the RGB arrangement is appropriately selected at a necessary cycle from the display information generating unit described later, and outputs them. A shift register 21 for converting serial information SR _d of the first display information, the second display information, and the third display information into parallel information, and each column of the display 1 is driven based on the display information from the shift register 21. It comprises a column driver 22 and a row driver 23 for designating a row address ra _i (= 1 to n) of the display 1 based on the load address information Ad. Reference numeral F is a display information generation unit including a storage unit 3, a pixel selection circuit 4, an operation control circuit 51, a control unit 5 including a row address selection circuit 52, and a shift register 6. Here, each pixel information (on / off information) of RGB corresponding to one dot of the display 1 is stored in the storage element 3, and the data bus 7 is sequentially scanned under the control of the arithmetic control circuit 51. 2 dots at a time (for example, R ₁ , B ₁ , G of dot d ₁
The pixel information of ₁ and R ₂ , B ₂ , G ₂ of the dot d ₂ is sent to the pixel selection circuit 4. . The pixel selection circuit 4 receives the input R
₁ , B ₁ , G ₁ and R ₂ , B ₂ , G ₂ are unified (serialized) and then, for example, R ₁ , G ₁ , based on the load address information Ad (first load address cycle ra ₁ ).
B ₂ is first scanned to output the parallel information of the first display information I ₁ (R ₁ ), the second display information I ₂ (G ₁ ), and the third display information I ₃ (B ₂ ) to the shift register 6, When the first selection is completed, the same pixel information R ₁ , B ₁ , G is again obtained.
₁ and R ₂ , B ₂ and G ₂ are input, and B ₂ , R ₂ and G ₂ are scanned based on the load address information Ad (second load address cycle ra ₂ ) and similarly the first to third display information. Output as. In the shift register 6, the first
The parallel information of the display information I ₁ , the second display information I ₂ , and the third display information I ₃ is converted into serial information again and output to the shift register 21 of the display unit A. The shift register 21 of the display unit A returns the input serial information to parallel information and then outputs it to the column driver 22. Since the row address information Ad is input to the row driver 23 at the same time as this pixel information, predetermined characters, symbols, etc. are displayed on the display 1 by the column driver 22 and the row driver 23.

<Problems to be Solved by the Invention> However, in this conventional liquid crystal display device, when a line segment is displayed on a display, there is a problem that a jagged pattern called JAG occurs due to the arrangement of pixels. There is. FIG. 8 is a diagram for explaining the problems of the conventional technique, and basically shows ON (lighting) / OFF (lighting off) of pixels when a line segment is displayed as a display pattern. In addition, in this figure, the lighting is indicated by a shaded portion. The problem will be described in more detail below with reference to FIG.

FIG. 8 (A) shows a case where a vertical line segment is displayed. In such a vertical direction, pixels are alternately turned on only on one side, so that one side of a straight line looks jagged when viewed from a distance.

FIGS. 8 (B) to 8 (E) show the case where diagonal lines are displayed. When displaying diagonal lines, it is necessary to decompose and display horizontal lines and vertical lines (including points) according to the inclination of the diagonal lines. It can be seen that the dots joints are somehow continuous in the diagrams (B), (D), and (E), but there are gaps in the case (C). For this reason, JAG originally occurs in the oblique line display, but in the case of (C), there is a gap especially, which causes deterioration of display quality. Even when an arbitrary pattern is displayed, the above-mentioned results are comprehensively displayed, so that the overall display quality is impaired. Figure (F) is an example when the number "6" is displayed.
It can be seen that the above phenomenon appears in the α and β portions.

In order to improve this JAG, it is conceivable to correct the display of vertical lines and diagonal lines only by software processing. In order to perform software processing, since the shape of the pixel differs depending on the coordinates, it is necessary to perform processing corresponding to each different shape of the pixel that requires correction. In addition, the color of the pixel turned on for correction It needs to be taken into consideration in that it needs to be corrected because it appears differently depending on the coordinates. Therefore, in order to make corrections only by software processing, first determine the physical shape from the target dot position, determine which of the left and right dots is to be corrected, and Complex processing such as deciding whether to turn on is performed. Therefore, the burden on the software becomes very large, and it is not a practical problem solution.

The present invention has been made in view of the problems of this conventional technique, and in order to improve the display quality of a display device in which RGB pixels are arranged in a matrix, the display information generating unit turns on / off the display pixels. An object of the present invention is to provide a liquid crystal display device that incorporates a correction element that corrects OFF.

<Means for Solving Problems> In order to achieve such an object, the present invention provides a display in which RGB pixels forming one dot are arranged in a mosaic pattern in adjacent rows in a key shape, and a control unit. Based on an address specified by the unit, a storage element that outputs a plurality of pixel information of RGB pixels in units of two rows in the row direction of the display, and all the RGB pixels that form one dot are turned on (turned off). The control unit displays a correction element that stores a correction flag that identifies a lighted dot (light-out dot) when drawing according to a designated address at that time, and a correction flag and pixel information input from this correction element and the storage element. A pixel selection circuit that selects a pixel row based on a row address and outputs it to the display, and selects an extinguished pixel (lit pixel) sandwiched between lit (unlit) RGB pixels. And obtained based the data of lights (turns off) the correction flag is input to the pixel selection circuit is characterized in that to prevent jaggies (JAG) drawing figures.

<Examples> Examples of the present invention will be described in detail below with reference to the drawings.
In the following drawings, the same parts as those in FIGS. 6 to 8 are designated by the same reference numerals and the description thereof will be omitted.

FIG. 1 is a block diagram of a liquid crystal display device which is a specific embodiment of the present invention, and FIGS. 2 to 4 are diagrams for explaining the present invention.

In FIGS. 1 to 4, 30 is a storage element. This storage element 30 is displayed as shown in FIG. 2 (A), for example.
R, G, and B respectively corresponding to 1 dot of R ₁ , R ₂ ,
_{..., G 1, G 2,} ..., B 1, B 2, ... on / the off-state information is stored, outputs the information _(S R of the RGB pixels,
S _G , S _B ) When all of one dot is ON information, that is, when the dot indicates a line segment, correction flag information (S _F ) is output to the pixel selection circuit 40 Element 8 is stored at the same time. Now, for example, when writing to a predetermined position of RGB,
If the position is a white part (that is, all are on), the correction flag F of the position corresponding to this is turned on. The correction flag F in this case has no effect on an originally unnecessary portion (when two adjacent dots are both lit), and the dot concerned is caused by a difference in dot coordinates. It is assumed that the programming is performed so that it is not necessary to make a decision as to which color dot should be lit up on either side of. In other words, as software processing, all flags should be set for white line segments. In this case, it is possible to make the correction hardly require software load. 40 is a memory element 30 to 1
This is a pixel selection circuit to which the information obtained by reading the information of two dots at a time is input. The operation of the pixel selection circuit 40 is the same as that of the pixel selection circuit 4 described in the related art, and the difference is that the correction flag information is additionally input and selected. That is, the first display information I ₁ , the second display information I ₂ , the third display information I ₃ , and the correction flag information I _F output from the pixel selection circuit 40 are I ₁ = R ₁ , I for the _{first time} . ₂ = G ₁ , I ₃ = B ₂ , I _F = F ₂ , and the second time outputs I ₁ = B ₁ , I ₂ = R ₂ , I ₃ = G ₂ , _IF = F ₁ , and so on. 9 is the second display information I ₂ and the correction flag information I
It is an OR gate circuit which inputs _F and outputs this information as D ₂ when there is at least any information (when it is on). In FIG. ₁ , the signal when the first display information I ₁ is input to the shift register 6 is D _1, and the signal when the third display information I ₃ is input to the shift register 6 is D 1.
_Set to ₃ .

Now, as shown in FIG. 2 (B), in the display ₁ , R ₁ , G ₁ , and B ₁ of dot d ₁ are lit, and R of dot d ₂ is R.
A case where ₂ is turned on will be described.

In the pixel selection circuit 40, the dots d ₁ , R ₂ , R ₁ , G ₁ , B ₁ , and F ₁ are all H
When the RGBF information for 2 dots of the dot d ₂ in which G ₂ , B ₂ , and F ₂ are all L is input, I ₁ = R ₁ = H, I ₂ = from the pixel selection circuit 40 for the first row address ra _1. G ₁ = H, I ₃ = B ₂ = L, and I _F = F ₂ = L are selected and output. As a result, the inputs of the shift register 6 are: D ₁ = R ₁ = H, D ₂ = G ₁ = H, D ₃ = B ₂ = L. Next, for the second row address ra ₂ , I ₁ = B ₁ = H, I ₂ = R ₂ = L, I ₃ = G ₂ = L, I _F = F ₁ = H are selected and output. As a result, the inputs of the shift register 6 are: D ₁ = B ₁ = H, D ₂ = R ₂ = H, D ₃ = G ₂ = L. These results are led to the display device A, and the portion of the non-lighting information R ₂ stored in the storage element 30 in the display 1 is turned on.

As shown in FIG. 3, by configuring as in the present invention,
The drawback of FIG. 8 shown in the prior art can be solved.

In FIG. 3 (A) corresponding to FIG. 8 (A), the non-projection portions γ _{1 to} γ ₄ pixels are formed, and the straight line portion has a neat shape.

In FIG. 3 (C) corresponding to FIG. 8 (C), the pixels in the gap portions γ _{5 to} γ ₆ are turned on, and there is no gap in the connection portion.

In FIG. 3 (F) corresponding to FIG. 8 (F),
The numbers “6” indicate that α _{2 to} α ₆ and β _{1 to} β ₃ are lit up to form a clearer shape.

By the way, it is conceivable that the RGB color balance is lost and color unevenness is caused by such correction. However, since RGB is partially included regularly, it does not cause any problem, and RGB appear alternately in the pixels that are turned on by correction. Therefore, the number of global RGB is also the same, and thus the color unevenness is actually caused. Does not occur. Further, in the case of FIG. 3C, in the correction portions γ _{5 to} γ ₆ , only two pixels of RGB are turned on, so that only one dot is colored.
Considering the visual effect, the effect of reducing JAG by the correction is much larger than the effect of causing color unevenness. Also, when the slant of the oblique line becomes 45 °, the discontinuity point becomes maximum and the number of pixels turned on for correction becomes maximum, but in this case, the dots turned on by correction appear alternately in RGB. On average, the colors are visually mixed and white, and almost no color unevenness is felt.

FIG. 4 is a flow sheet showing one algorithm of such a series of display processing.

<Other Embodiments> The present invention is not limited to the configuration shown in FIG. For example, it may be configured as a block diagram of a liquid crystal display device showing another embodiment of the present invention in FIG. The structural difference between FIG. 1 and FIG. 5 lies in the correction element. That is, although the correction flag 8 which is a correction element is provided in the case of FIG. 1, it is possible to eliminate the correction flag 8 and always perform correction for a white dot. There is no particular problem with the one that displays only.
That is, the pixel information S _R , S _G , output from the storage element 3
In S _B , the correction flag information is provided to the pixel selection circuit when all of the three primary colors forming one dot pixel indicate line segments that are on information.
It should output to 40.

As a specific example, all the pixel information S _R , S _G , and S _B are input to a correction element such as an AND gate pixel 30b, that is, when all the information is (H), the AND gate circuit 30b.
It may be configured to direct the output S _{F o} to the pixel selection circuit 40 from. By doing so, in addition to FIGS. 4 (A) to (D), in FIG. 4 (E) corresponding to FIG. 8 (E), the portions γ _{7 to} γ ₈ light up, and FIG. 8 (F). In FIG. 4 (F) corresponding to, the numeral “6” is α _{1 to} β ₆ , β _{1 to} β.
It can be seen that ₄ and δ are turned on, and “6” is formed more clearly.

In the above description, the case where all white dots are corrected has been described, but it goes without saying that the same correction can be performed for black dots by taking a negative logic, for example.

The shift registers 6 and 21 are parallel-serial / serial for transmitting display information from the display information generating section B to the display section A.
Since it is a serial-parallel conversion circuit, it is essentially unnecessary, and it goes without saying that this may be removed depending on the design.

<Effects of the Invention> As described above in detail with reference to the embodiments of the present invention,
A display device having a display unit in which a plurality of one-dot pixels of three primary colors are arranged, a storage element for storing the pixel information of the plurality of dots, and pixel information read from the storage element is input to the first to A liquid crystal display device comprising a pixel selection circuit for outputting three display information and a control device for controlling each of them, wherein when the three primary colors indicate line segments in the pixel information output from the storage element, a correction element is used. According to the liquid crystal display device of the present invention, the correction flag information is output to the pixel selection circuit, and the second display information and the correction flag information out of the output from the pixel selection circuit are obtained through the OR gate circuit. With a simple structure, it is possible to easily correct a jagged pattern shape that is inherent in a dot called JAG, which is caused by a connection relationship when a shape having a pixel arrangement relationship is expressed. There is an effect that excellent shape sex can be obtained at low cost.

[Brief description of drawings]

FIG. 1 is a block diagram of a liquid crystal display device which is a specific embodiment of the present invention, FIGS. 2 to 4 are diagrams for explaining the present invention, and FIG. 5 is another embodiment of the present invention. FIG. 6 is a block diagram of the liquid crystal display device shown in FIG. 6, FIG. 6 is a pixel layout diagram of a dot matrix color liquid crystal display device, FIG. 7 is a block diagram of a conventional liquid crystal display device, and FIG. FIG. A ... Display unit, 1 ... Display unit, 2 ... Driver circuit, F
...... Display information generator, 3,30,300 …… Memory element, 4,40
...... Pixel selection circuit, 5 ...... Control unit, 6 ...... Shift register, 8,10 …… Correction element, 9 …… OR gate circuit.

Claims (1)

[Claims] 1. A display device in which RGB pixels forming one dot are arranged in a mosaic shape in a key shape on adjacent lines, and two lines in the row direction of the display device are unitized based on an address designated by a control unit. The storage element that outputs a plurality of pixel information of the RGB pixel and the correction flag that identifies the illuminated dot (extinguished dot) when all the RGB pixels that form one dot are illuminated (unlit) and drawn The control unit selects a correction element to be stored according to an address, a correction flag and pixel information input from the correction element and the storage element based on a row address designating a row of the display unit, and outputs to the display unit. A pixel selection circuit for turning on and off, and data for turning on (turning off) an unlit pixel (lighted pixel) sandwiched between lit (unlit) RGB pixels is inputted to the pixel selection circuit. A liquid crystal display device, which is obtained based on a pattern and prevents a drawing pattern from being jagged (JAG).