JPH0645645A - Light-emitting element - Google Patents

Light-emitting element

Info

Publication number
JPH0645645A
JPH0645645A JP4195687A JP19568792A JPH0645645A JP H0645645 A JPH0645645 A JP H0645645A JP 4195687 A JP4195687 A JP 4195687A JP 19568792 A JP19568792 A JP 19568792A JP H0645645 A JPH0645645 A JP H0645645A
Authority
JP
Japan
Prior art keywords
type semiconductor
light
current
light emitting
emitting element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4195687A
Other languages
Japanese (ja)
Inventor
Masayoshi Koike
正好 小池
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Eastman Kodak Japan Ltd
Original Assignee
Eastman Kodak Japan Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Eastman Kodak Japan Ltd filed Critical Eastman Kodak Japan Ltd
Priority to JP4195687A priority Critical patent/JPH0645645A/en
Publication of JPH0645645A publication Critical patent/JPH0645645A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To provide a light-emitting element wherein the increase rate of the amount of light with reference to an increase in an electric current can be made definite and the amount of light is easy to control when the element is used in various kinds of apparatuses in the light-emitting element wherein the element is provided with the junction part of a P-type semiconductor to an N-type semiconductor and a junction face emits light by applying a voltage in the forward direction to the junction face. CONSTITUTION:An inner-layer part and a surface-layer part, in which the mixed crystal ratio of phosphorus is different from each other, are formed in an N-type semiconductor 1, zinc is diffused to a prescribed region by using a selective diffused film 5, a P-type semiconductor 2 is formed, an N-type semiconductor 1a and a P-type semiconductor 1b, whose forbidden band width is larger than that of an N-type semiconductor 2a and a P-type semiconductor 2b at the inner- layer part, are formed, a positive electrode 3 is formed on the surface of the P-type semiconductor 2 and a negative electrode 4 is formed on the rear of the N-type electrode 1.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は発光素子、特に表面発光
型の発光素子に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light emitting device, and more particularly to a surface emitting type light emitting device.

【0002】[0002]

【従来の技術】小型・軽量である発光素子は、様々な分
野において広く活用されている。そして、近年において
は、光照射によって情報を記録する光プリンタや光の反
射強度を用いて画像やバーコードデータを読み取るイメ
ージリーダ、あるいは光信号を利用した光通信機器にお
いて、発光素子が利用されている。
2. Description of the Related Art Light emitting devices that are small and lightweight are widely used in various fields. In recent years, light emitting elements have been used in optical printers that record information by light irradiation, image readers that read images and bar code data using the reflection intensity of light, or optical communication devices that use optical signals. There is.

【0003】図6は従来から用いられている発光素子の
構造を示す断面模式図であり、図7は従来の発光素子の
平面模式図である。
FIG. 6 is a schematic sectional view showing the structure of a conventional light emitting element, and FIG. 7 is a schematic plan view of a conventional light emitting element.

【0004】前記図6、7に示される発光素子において
テルルを含有するガリウム砒素リン半導体は第1導電型
の基盤、すなわち、N型半導体1を形成する。前記N型
半導体1に亜鉛が拡散されて、第2導電型の拡散層、す
なわち、P型ガリウム砒素リン半導体2(以下P型半導
体2という)が形成されている。前記N型半導体1に亜
鉛を拡散する時、前記N型半導体1の上面を拡散窓を有
する選択拡散膜5によってマスキングをして、前記拡散
窓より拡散を行うので所望の範囲に前記P型半導体2を
形成することができる。
In the light emitting device shown in FIGS. 6 and 7, the gallium arsenide phosphide semiconductor containing tellurium forms the first conductivity type substrate, that is, the N type semiconductor 1. Zinc is diffused in the N-type semiconductor 1 to form a second conductivity type diffusion layer, that is, a P-type gallium arsenide phosphide semiconductor 2 (hereinafter referred to as P-type semiconductor 2). When zinc is diffused into the N-type semiconductor 1, the upper surface of the N-type semiconductor 1 is masked by a selective diffusion film 5 having a diffusion window, and diffusion is performed from the diffusion window. 2 can be formed.

【0005】そして前記P型半導体2の上面に正電極3
が設けられ、前記N型半導体1の裏面に負電極4が形成
され、順方向の電圧がP型半導体2とN型半導体1の接
合面に印加され、拡散された多数キャリアが拡散するこ
とによって電気エネルギーが光エネルギーに変換されて
光が射出される。
A positive electrode 3 is formed on the upper surface of the P-type semiconductor 2.
Is provided, the negative electrode 4 is formed on the back surface of the N-type semiconductor 1, a forward voltage is applied to the junction surface of the P-type semiconductor 2 and the N-type semiconductor 1, and the diffused majority carriers are diffused. Electric energy is converted into light energy and light is emitted.

【0006】[0006]

【発明が解決しようとする課題】しかし前記のようなP
N接合面を有する発光素子の前記PN接合面に順方向の
電圧を印加すると発光素子に流れる電流は、図8に示す
ようにPN接合面全体に流れる。この時の発光素子に流
れる電流と光出力の関係は、図9に実線で示すように、
電流が小さい領域では、電流の増加にともなう光出力の
増加の割合が一定でなく、電流の増加にともなう光出力
の増加の割合が電流に強く依存している。(ここで、増
加率が一定にならない実線との違いを明らかにするため
破線で、電流と光量の関係が線形になる場合を示す。)
すなわち、PN接合面に印加する電圧をVとしたとき流
れる電流は、exp(eV/kT)に比例する成分(以下成分Aと
いう)と、exp(eV/2kT) に比例する成分(以下成分Bと
いう)に分割される。ここで、発光素子から射出される
光量は電流成分Aに比例する。
However, the above-mentioned P
When a forward voltage is applied to the PN junction surface of the light emitting element having an N junction surface, the current flowing through the light emitting element flows in the entire PN junction surface as shown in FIG. The relationship between the current flowing through the light emitting element and the light output at this time is as shown by the solid line in FIG.
In a region where the current is small, the rate of increase in light output with increase in current is not constant, and the rate of increase in light output with increase in current strongly depends on the current. (Here, in order to clarify the difference from the solid line in which the increase rate is not constant, a broken line shows a case where the relationship between the current and the light amount is linear.)
That is, when the voltage applied to the PN junction surface is V, the current flowing is a component proportional to exp (eV / kT) (hereinafter referred to as component A) and a component proportional to exp (eV / 2kT) (hereinafter referred to as component B). Called). Here, the amount of light emitted from the light emitting element is proportional to the current component A.

【0007】電流が大きい領域では全電流のうち、成分
Aが電流の大部分を占め、発光素子から射出される光量
が成分Aに比例するので、電流の増加に対する光量の増
加率は一定になる。
In the region where the current is large, the component A occupies most of the total current, and the amount of light emitted from the light emitting element is proportional to the component A. Therefore, the rate of increase of the amount of light with respect to the increase of the current becomes constant. .

【0008】つまり、電流が大きい領域では電流と光出
力の比は電流値に依存せず、安定したものになるが、電
流が小さい領域では成分Bの占める割合が比較的大き
く、成分Aと成分Bの比が電圧に依存するので、電流の
増加に対する光量の増加率は一定にならない。ここで、
電流成分Bの主な成分は半導体表面に露出したPN接合
面近傍の空乏層で起こる電子とホールの再結合電流であ
る。
That is, in the region where the current is large, the ratio of the current to the light output does not depend on the current value and becomes stable, but in the region where the current is small, the ratio of the component B is relatively large, and the component A and the component Since the ratio of B depends on the voltage, the rate of increase in the amount of light with respect to the increase in current is not constant. here,
The main component of the current component B is the recombination current of electrons and holes that occurs in the depletion layer near the PN junction surface exposed on the semiconductor surface.

【0009】発光素子において、電流の増加に対する光
量の増加率が一定にならない場合、電流による光量の制
御性に問題があり光プリンタやイメージリーダあるいは
光通信機器の光源に用いた場合、制御しにくいという問
題があった。
In the light emitting element, if the rate of increase of the light quantity with respect to the increase of the current is not constant, there is a problem in the controllability of the light quantity due to the current, and it is difficult to control when used as a light source of an optical printer, an image reader or an optical communication device. There was a problem.

【0010】そこで本発明は、電流の増加に対する光量
の増加率が一定になり各種機器に用いた場合、光量の制
御のし易い発光素子を提供することを目的とする。
Therefore, an object of the present invention is to provide a light emitting element in which the rate of increase of the light quantity with respect to the increase of the current becomes constant and the light quantity can be easily controlled when used in various devices.

【0011】[0011]

【課題を解決するための手段】本発明は、前記問題点を
解決するため、第1導電型の基盤と、不純物拡散によっ
て前記基盤の一部に形成された第2導電型の拡散層と、
を含み、前記基盤および前記拡散層の表面に形成された
電極間に順方向の電圧を印加して前記基盤と前記拡散層
の接合面において発光させる発光素子において、前記基
盤および前記拡散層は、三元系以上の元素による混晶か
ら構成され、前記基盤および前記拡散層は、その表面部
に各本体とは異なった混晶比を有する一層以上の表層部
を有し、少なくとも前記表層部の禁制帯幅の値が各本体
の禁制帯幅の値より大きく設定され、発光する前記接合
面は、前記表層部より深いことを特徴とするものであ
る。
In order to solve the above problems, the present invention provides a first conductivity type substrate and a second conductivity type diffusion layer formed on a part of the substrate by impurity diffusion.
In the light-emitting element that includes a forward voltage applied between the electrodes formed on the surface of the base and the diffusion layer to emit light at the bonding surface between the base and the diffusion layer, the base and the diffusion layer include It is composed of a mixed crystal of ternary or more elements, and the base and the diffusion layer have at least one surface layer portion having a mixed crystal ratio different from that of each main body on the surface portion, and at least the surface layer portion The forbidden band width value is set to be larger than the forbidden band width value of each main body, and the light emitting junction surface is deeper than the surface layer portion.

【0012】[0012]

【作用】本発明においては、発光素子の第1導電型の基
盤および第2導電型の拡散層に異なった混晶比を有する
内層部と表層部を形成し、禁制帯幅の値が前記内層部よ
りも前記表層部が大きくなるように設定し、前記表層部
である露出した前記基盤と前記拡散層との接合面近傍の
空乏層に流れ込む電流を少なくして、空乏層内での電子
とホールの再結合を抑制することによって、発光に関与
しない電流成分の発生を抑えられるので発光素子に流れ
る電流の増加に対する光量の増加率が一定になる。
In the present invention, the inner layer portion and the surface layer portion having different mixed crystal ratios are formed on the first conductive type substrate and the second conductive type diffusion layer of the light emitting device, and the forbidden band width value is the inner layer. Set so that the surface layer portion is larger than the portion, the current flowing into the depletion layer in the vicinity of the junction between the exposed substrate and the diffusion layer, which is the surface layer portion, is reduced, and the electrons in the depletion layer are By suppressing the recombination of holes, it is possible to suppress the generation of a current component that is not involved in light emission, so that the rate of increase in the amount of light with respect to the increase in the current flowing through the light emitting element becomes constant.

【0013】[0013]

【実施例】本発明の良好な実施例を図面を利用して説明
する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS A preferred embodiment of the present invention will be described with reference to the drawings.

【0014】第1実施例として、本発明に基づく発光素
子は、図1の断面模式図に示すように、テルルを含有す
るガリウム砒素リン半導体はN型半導体1を形成し、こ
のN型半導体1の上面に配設された拡散選択膜5によっ
て所望の領域に亜鉛が拡散され、P型ガリウム砒素リン
半導体(以下P型半導体2という)が形成されている。
また、前記P型半導体2の上面に正電極3が形成され、
前記N型半導体1の裏面に負電極4が形成されている。
As a first embodiment, in a light emitting device according to the present invention, a gallium arsenide phosphide semiconductor containing tellurium forms an N-type semiconductor 1 as shown in the schematic sectional view of FIG. Zinc is diffused into a desired region by the diffusion selection film 5 provided on the upper surface of the P-type semiconductor to form a P-type gallium arsenide phosphide semiconductor (hereinafter referred to as P-type semiconductor 2).
In addition, a positive electrode 3 is formed on the upper surface of the P-type semiconductor 2,
A negative electrode 4 is formed on the back surface of the N-type semiconductor 1.

【0015】本発明の特徴とするところは、図1に示す
ように、発光素子は、結晶中のリンの混晶比が内層部で
あるN型半導体1b およびP型半導体2b より大きな表
層部であるN型半導体1a およびP型半導体2a と、を
有し、前記表層部の禁制帯幅が前記内層部の禁制帯幅よ
り大きく形成していることである。
A feature of the present invention is that, as shown in FIG. 1, the light emitting device has a surface layer portion in which the mixed crystal ratio of phosphorus in the crystal is larger than that of the N type semiconductor 1b and the P type semiconductor 2b which are the inner layer portions. A certain N-type semiconductor 1a and a P-type semiconductor 2a, and the forbidden band width of the surface layer portion is formed larger than the forbidden band width of the inner layer portion.

【0016】図2に亜鉛拡散前のN型半導体1を示す。
該N型半導体1は、結晶中のリンの混晶比が異なる二層
から形成され、内層部であるN型半導体1b よりリンの
混晶比が大きい表層部であるN型半導体1a を形成す
る。次に、前記N型半導体1aの上面に配設された拡散
口を有する拡散選択膜5によって所望の領域に亜鉛を拡
散する。
FIG. 2 shows the N-type semiconductor 1 before zinc diffusion.
The N-type semiconductor 1 is formed of two layers having different mixed crystal ratios of phosphorus in the crystal, and forms an N-type semiconductor 1a which is a surface layer portion having a larger mixed crystal ratio of phosphorus than the N-type semiconductor 1b which is an inner layer portion. . Next, zinc is diffused into a desired region by the diffusion selection film 5 having a diffusion port provided on the upper surface of the N-type semiconductor 1a.

【0017】したがって、発光素子の表層部に、リンの
混晶比が内層部のN型半導体1b およびP型半導体2b
より大きいN型半導体1a およびP型半導体2a が形成
される。
Therefore, in the surface layer portion of the light emitting device, the N-type semiconductor 1b and the P-type semiconductor 2b in which the mixed crystal ratio of phosphorus is the inner layer portion.
Larger N-type semiconductor 1a and P-type semiconductor 2a are formed.

【0018】上述のように形成された二層構造を有する
発光素子の動作状態について説明する。
The operation state of the light emitting device having the two-layer structure formed as described above will be described.

【0019】発光素子に流れる電流は、P型半導体2と
N型半導体1が接合しているPN接合面に加わる電圧を
Vとしたとき、exp(eV/kT)に比例する成分(以下成分A
という)と、exp(eV/2kT) に比例する成分(以下成分B
という)に分割される。そして、発光素子から射出され
る光量は電流成分Aに比例する。
The current flowing through the light emitting element is a component proportional to exp (eV / kT) (hereinafter component A), where V is the voltage applied to the PN junction surface where the P-type semiconductor 2 and the N-type semiconductor 1 are joined.
, And a component proportional to exp (eV / 2kT) (hereinafter component B
Called). The amount of light emitted from the light emitting element is proportional to the current component A.

【0020】電流が大きい場合、つまり、電圧Vが大き
い領域では全電流のうち、成分Aが電流の大部分を占め
る。
When the current is large, that is, in the region where the voltage V is large, the component A occupies the majority of the total current.

【0021】従って、発光素子から射出される光量が成
分Aに比例するので、電流の増加に対する光量の増加率
は一定になる。つまり、電圧Vが大きい領域では電流と
光出力の比は電流値に依存せず、安定したものになる。
Therefore, since the amount of light emitted from the light emitting element is proportional to the component A, the rate of increase in the amount of light with respect to the increase in current becomes constant. That is, in the region where the voltage V is large, the ratio of the current to the light output does not depend on the current value and becomes stable.

【0022】次に電流値が小さい場合、つまり電圧Vが
小さい領域では、成分Bの占める割合が比較的大きく、
成分Aと成分Bの比が電圧に依存するので、電流の増加
に対する光量の増加率は一定にならない。つまり、電圧
Vが小さい領域では電流と光出力の比は電流値に依存す
るようになる。ここで、電流成分Bの主な成分は発光素
子表面に露出したPN接合面近傍の空乏層内で起こる電
子とホールの再結合電流である。
Next, when the current value is small, that is, in the region where the voltage V is small, the ratio of the component B is relatively large,
Since the ratio of the component A and the component B depends on the voltage, the rate of increase in the amount of light with respect to the increase in current is not constant. That is, in the region where the voltage V is small, the ratio of the current to the light output depends on the current value. Here, the main component of the current component B is the recombination current of electrons and holes that occurs in the depletion layer near the PN junction surface exposed on the surface of the light emitting element.

【0023】従って、発光素子表面に露出したPN接合
面近傍、すなわち表層部に流れ込む電流を抑制すれば、
発生する電流成分Bを減少させることができる。
Therefore, if the current flowing near the PN junction surface exposed on the surface of the light emitting element, that is, the surface layer portion is suppressed,
The generated current component B can be reduced.

【0024】ところで、発光素子を流れる電流Iは、大
きく分けて拡散電流Id と再結合電流Ir の和として次
のように表すことができる。
By the way, the current I flowing through the light emitting element can be broadly expressed as the sum of the diffusion current I d and the recombination current I r as follows.

【0025】 I=Id +Ir ・・・・式1 また、拡散電流Id は、印加電圧Vに対して飽和電流を
s とすると次式で表せることが知られている。
I = I d + I r ··· Equation 1 Further, it is known that the diffusion current I d can be expressed by the following equation when the saturation current is I s with respect to the applied voltage V.

【0026】 Id =Is {exp (qV/kT)−1} ・・・・式2 ここで、qは素電荷、kはボルツマン定数、Tは絶対温
度である。
I d = I s {exp (qV / kT) −1} ... Equation 2 where q is elementary charge, k is Boltzmann constant, and T is absolute temperature.

【0027】さらに、飽和電流Is は、N、P型半導体
中の熱平衡における少数キャリア密度:Np 、Pn によ
って次式で表せることが知られている。
Further, it is known that the saturation current I s can be expressed by the following equation by the minority carrier densities in thermal equilibrium in N, P type semiconductors: N p , P n .

【0028】 Is =qS(Np ・Dp /Lp +Nn ・Dn /Ln )・・・・式3 ここで、SはPN接合面積、Lp 、Ln はそれぞれホー
ル、電子の拡散長、Dp、Dn はそれぞれホール、電子
の拡散係数である。
I s = qS (N p · D p / L p + N n · D n / L n ) · Equation 3 Here, S is a PN junction area, L p and L n are holes and electrons, respectively. Diffusion lengths, D p and D n are diffusion coefficients of holes and electrons, respectively.

【0029】また、ボルツマン統計により少数キャリア
密度Np 、Pn は擬フェルミエネルギー:Efn 、Ef
p 、伝導帯、価電子帯のエネルギーをEc、Evとする
と次式で表せることが知られている。
Also, according to Boltzmann statistics, the minority carrier densities N p and P n are pseudo-Fermi energies: Ef n and Ef.
It is known that the energies of p , the conduction band, and the valence band are Ec and Ev, which can be expressed by the following equations.

【0030】 Pn =Nv・exp {−(Efn −Ev)/kT} ・・・・式4 Np =Nc・exp {−(Ec−Efp )/kT} ・・・・式5 ここで、Nv、Ncは価電子帯、伝導帯の実行状態密度
である。
P n = Nv · exp {− (Ef n −Ev) / kT} ··· Equation 4 N p = Nc · exp {-(Ec-Ef p ) / kT} ··· Equation 5 Here Where Nv and Nc are the effective densities of valence band and conduction band.

【0031】さらに、半導体の禁制帯幅をEgとする
と、近似的に次の比例関係が成り立つことが知られてい
る。
Further, it is known that the following proportional relationship is approximately established when the forbidden band width of a semiconductor is Eg.

【0032】 (Efn −Ev) or (Ec−Efp )∝ Eg ・・・・式6 従って、式4、式5、式6より次の関係が導き出され
る。
(Ef n −Ev) or (Ec−Ef p ) ∝Eg Equation 6 Therefore, the following relationships are derived from Equation 4, Equation 5, and Equation 6.

【0033】 Pn or Np ∝ exp (−Eg/kT) ・・・・式7 すなわち、式3および式7より半導体の禁制帯幅Egが
大きくなると飽和電流Is は小さくなり式2より拡散電
流Id は小さくなる。
P n or N p ∝ exp (−Eg / kT) Equation 7 That is, according to Equations 3 and 7, when the semiconductor band gap Eg increases, the saturation current I s decreases and the diffusion spreads from Equation 2. The current I d becomes smaller.

【0034】次に再結合電流Ir は拡散電位Vd とする
と、印加電圧Vに対して次式で表せることが知られてい
る。
Next, it is known that the recombination current I r can be expressed by the following equation with respect to the applied voltage V, where the diffusion potential V d is used.

【0035】 Ir =(ni /τ){kT/(Vd −V)}・W・exp (qV/2k T) ・・・・式8 ここで、ni は真性状態のキャリア密度、τはキャリア
のライフタイム、Wは遷移領域の幅である。
I r = (n i / τ) {kT / (V d −V)} · W · exp (qV / 2k T) ··· Equation 8 Here, n i is the carrier density in the intrinsic state, τ is the carrier lifetime, and W is the width of the transition region.

【0036】また、拡散電位Vd は、擬フェルミエネル
ギーEfn 、価電子帯のエネルギーEvを用いて次式で
表されることが知られている。
It is known that the diffusion potential V d can be expressed by the following equation using the pseudo-Fermi energy Ef n and the valence band energy Ev.

【0037】 Vd =Efn −Ev+kT・ln(Pp /Nv ) ・・・・式9 ここで、Nv は、価電子帯の実行状態密度であり、Pp
は、P型半導体中の多数キャリアであるホールの密度で
あり、Nv は、価電子帯の実効状態密度である。
V d = Ef n −Ev + kT · ln (P p / N v ) · Equation 9 Here, N v is the effective state density of the valence band, and P p
Is the density of holes, which are the majority carriers in the P-type semiconductor, and N v is the effective density of states in the valence band.

【0038】従って、式6の比例関係を用いて、式9よ
り次のような関係を導くことができる。
Therefore, the following relation can be derived from the equation 9 using the proportional relation of the equation 6.

【0039】 Vd ∝ Eg ・・・・式10 従って、式8、式9、式10より半導体の禁制帯幅Eg
が大きくなると再結合電流Ir は小さくなる。
V d ∝ Eg (Equation 10) Therefore, from the equations (8), (9) and (10), the forbidden band width Eg of the semiconductor is calculated.
Becomes larger, the recombination current I r becomes smaller.

【0040】つまり、同一の印加電圧に対して禁制帯幅
の大きい半導体のPN接合面を流れる電流は、禁制帯幅
の小さな半導体の中のPN接合面を流れる電流より小さ
くなる。
That is, the current flowing through the PN junction surface of a semiconductor having a large forbidden band width is smaller than the current flowing through the PN junction surface of a semiconductor having a small forbidden band width for the same applied voltage.

【0041】一般に、ガリウム砒素リン半導体の禁制帯
幅はリンの混晶比に比例して大きくなることが知られて
いる(ベガース則)。
It is generally known that the forbidden band width of a gallium arsenide phosphide semiconductor increases in proportion to the mixed crystal ratio of phosphorus (Begers law).

【0042】従って、発光素子を形成する結晶に、リン
の混晶比の異なる表層部と、内層部とを形成し、混晶比
が前記内層部よりも前記表層部が大きくなるように設定
し、前記表層部の禁制帯幅を前記内層部の禁制帯幅より
高く形成することによって、前記表層部に流れ込む電流
を抑制することができる。
Therefore, the crystal forming the light emitting device is formed with the surface layer portion having a different phosphorus mixed crystal ratio and the inner layer portion, and the mixed crystal ratio is set so that the surface layer portion is larger than the inner layer portion. By forming the forbidden band width of the surface layer portion higher than the forbidden band width of the inner layer portion, the current flowing into the surface layer portion can be suppressed.

【0043】つまり、図3に示すように、リンの混晶比
の大きい表層部、すなわち、禁制帯幅の大きいN型半導
体1a およびP型半導体2a を流れる電流成分I1 は、
リンの混晶比の小さい内層部、すなわち、禁制帯幅の小
さいN型半導体1b およびP型半導体2b を流れる電流
成分I2 に比べて小さくなる。
That is, as shown in FIG. 3, the current component I 1 flowing through the surface layer portion having a large phosphorus mixed crystal ratio, that is, the N-type semiconductor 1a and the P-type semiconductor 2a having a large forbidden band width is
It becomes smaller than the current component I 2 flowing through the inner layer portion having a small mixed crystal ratio of phosphorus, that is, the N-type semiconductor 1b and the P-type semiconductor 2b having a small forbidden band width.

【0044】従って、発光素子の表面に露出したPN接
合面近傍に流れる発光に関与しない電流成分の発生を抑
えることができるので、図4の実線に示すように電流が
小さい領域でも、発光素子に流れる電流の増加に対する
光量の増加率を一定にすることができる。
Therefore, it is possible to suppress the generation of a current component that does not participate in light emission and flows in the vicinity of the PN junction surface exposed on the surface of the light emitting element. Therefore, as shown by the solid line in FIG. The rate of increase of the amount of light with respect to the increase of the flowing current can be made constant.

【0045】なお、実施例においてリンの混晶比の大き
なP型半導体1a とリンの混晶比の小さいP型半導体1
b との間に混晶比の違いによるヘテロバリヤーが存在す
るが、前記P型半導体1a 、1b は共にP型であるから
多数キャリアであるホールに対してはポテンシャルバリ
ヤーとしては、ほとんど作用しない。
In the embodiment, the P-type semiconductor 1a having a large phosphorus mixed crystal ratio and the P-type semiconductor 1 having a small phosphorus mixed crystal ratio are used.
Although a hetero barrier exists between b and b due to the difference in mixed crystal ratio, since both P-type semiconductors 1a and 1b are P-type, they hardly act as potential barriers for holes that are majority carriers.

【0046】本発明に基づく第2実施例を図5を用いて
説明する。
A second embodiment based on the present invention will be described with reference to FIG.

【0047】第1実施例では、ガリウム砒素リン半導体
がリンの混晶比の異なる二層構造を有している場合につ
いて説明したが、二層構造に限定されず、図5に示すよ
うにリンの混晶比が異なる三層構造から形成されてもよ
い。
In the first embodiment, the case where the gallium arsenide phosphide semiconductor has a two-layer structure in which the mixed crystal ratio of phosphorus is different has been described, but the present invention is not limited to the two-layer structure, and as shown in FIG. It may be formed from a three-layer structure having different mixed crystal ratios.

【0048】表層部のリンの混晶比は第1実施例と同様
に表面が最も大きく、内層部に向かうに従って小さく形
成する。つまり、N型半導体1a 、1b 、1c およびP
型半導体2a 、2b 、2c は、リンの混晶比が順に小さ
くなるように形成することによって、第1実施例と同様
の効果が期待できる。さらに、各層のリンの混晶比の差
を小さくすることによって、前記N型半導体1a と、前
記N型半導体1b の層の境界、および、前記N型半導体
1b と、前記N型半導体1c の層の境界部分に働く応力
を小さくすることができる。、つまり、混晶比の異なる
層を形成したことによって、各層の格子定数が変化する
ことによって発生する各層間の応力を小さくすることが
できる。この場合、図5中の表層部第2層の前記N型半
導体1bと前記P型半導体2b は、内層部前記N型半導
体1c と前記P型半導体2c に対してバッファー層とし
ての効果を生じ、発光素子の構造において、境界面のミ
スフィット転位を少なくすることができる。
As in the first embodiment, the mixed crystal ratio of phosphorus in the surface layer portion is the largest on the surface, and becomes smaller toward the inner layer portion. That is, the N-type semiconductors 1a, 1b, 1c and P
By forming the type semiconductors 2a, 2b, and 2c so that the mixed crystal ratio of phosphorus decreases in order, the same effect as that of the first embodiment can be expected. Furthermore, by reducing the difference in the mixed crystal ratio of phosphorus between the layers, the boundary between the layers of the N-type semiconductor 1a and the N-type semiconductor 1b, and the layer of the N-type semiconductor 1b and the N-type semiconductor 1c. The stress acting on the boundary part of can be reduced. That is, by forming the layers having different mixed crystal ratios, it is possible to reduce the stress between the layers caused by the change in the lattice constant of each layer. In this case, the N-type semiconductor 1b and the P-type semiconductor 2b in the surface layer second layer in FIG. 5 have an effect as a buffer layer for the inner layer section N-type semiconductor 1c and P-type semiconductor 2c, In the structure of the light emitting device, misfit dislocations on the boundary surface can be reduced.

【0049】前記実施例において、N型半導体にP型不
純物を拡散してP型半導体を形成する拡散型発光素子で
説明したが、P型半導体にN型不純物を拡散してN型半
導体を形成してもよい。また、半導体材料はガリウム砒
素リンに限定されず、アルミニウムガリウム砒素でもよ
い。さらに、ガリウム砒素リンのような三元系の混晶に
限定されず、インジウムガリウム砒素リン等の四元系の
混晶にも適応される。また、前記実施例においては、不
純物を拡散してP型半導体を形成する方法で説明した
が、不純物を拡散させる方法は前記方法に限られず、例
えば、イオン打ち込み法でP型半導体を形成してもよ
い。
In the above embodiment, the diffusion type light emitting device in which the P-type impurity is diffused into the N-type semiconductor to form the P-type semiconductor has been described. However, the N-type impurity is diffused into the P-type semiconductor to form the N-type semiconductor. You may. The semiconductor material is not limited to gallium arsenide phosphide and may be aluminum gallium arsenide. Furthermore, the present invention is not limited to a ternary mixed crystal such as gallium arsenide and phosphorus, but is also applicable to a quaternary mixed crystal such as indium gallium arsenide and phosphorus. Further, in the above-mentioned embodiment, the method of diffusing the impurities to form the P-type semiconductor has been described, but the method of diffusing the impurities is not limited to the above-mentioned method, and for example, the P-type semiconductor is formed by the ion implantation method. Good.

【0050】また、前記実施例では、PN接合を有する
発光素子を用いて本発明を説明したが、本発明はPN接
合に限定されるものではなく、例えば、PIN接合にも
用いることができる。
Further, although the present invention has been described in the above embodiment using the light emitting device having the PN junction, the present invention is not limited to the PN junction and can be used for a PIN junction, for example.

【0051】[0051]

【発明の効果】本発明に基づく発光素子によれば、電流
の増加に対する光量の増加率を一定にすることができる
ので制御性のよい発光素子を作ることができる。
According to the light emitting device of the present invention, the rate of increase in the amount of light with respect to the increase in current can be kept constant, so that a light emitting device with good controllability can be manufactured.

【0052】従って、本発明の発光素子を電子写真方式
のプリンタ露光光源として用いた場合には、光量を電流
で制御容易な露光装置が実現できる。またイメージリー
ダの光源として用いた場合にも制御し易い装置が可能と
なる。さらに、本発明に基づく発光装置を光通信機器の
光源として用いた場合にも制御しやすい装置を作ること
ができる。
Therefore, when the light emitting device of the present invention is used as an exposure light source for an electrophotographic printer, it is possible to realize an exposure device in which the amount of light can be easily controlled by a current. Further, a device that can be easily controlled when used as a light source of an image reader becomes possible. Further, even when the light emitting device according to the present invention is used as a light source of an optical communication device, a device that can be easily controlled can be manufactured.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明に基づく発光素子の第1実施例を説明す
る断面模式図である。
FIG. 1 is a schematic sectional view illustrating a first embodiment of a light emitting device according to the present invention.

【図2】本発明に基づく発光素子の第1実施例を説明す
る亜鉛拡散前のN型半導体の基盤の平面模式図である。
FIG. 2 is a schematic plan view of an N-type semiconductor substrate before zinc diffusion for explaining a first embodiment of a light emitting device according to the present invention.

【図3】本発明に基づく発光素子の第1実施例の順方向
に電圧を印加した時の電流分布を示した模式図である。
FIG. 3 is a schematic diagram showing a current distribution when a voltage is applied in the forward direction of the first embodiment of the light emitting device according to the present invention.

【図4】本発明に基づく発光素子における電流−光量特
性を示した特性図である。
FIG. 4 is a characteristic diagram showing current-light quantity characteristics in a light emitting device according to the present invention.

【図5】本発明に基づく発光素子の第2実施例を説明す
る断面模式図である。
FIG. 5 is a schematic sectional view illustrating a second embodiment of the light emitting device according to the present invention.

【図6】従来の発光素子の断面模式図である。FIG. 6 is a schematic cross-sectional view of a conventional light emitting device.

【図7】従来の発光素子の平面模式図である。FIG. 7 is a schematic plan view of a conventional light emitting device.

【図8】従来の発光素子の順方向に電圧を印加した時の
電流分布を示した模式図である。
FIG. 8 is a schematic diagram showing a current distribution when a voltage is applied in the forward direction of a conventional light emitting device.

【図9】従来の発光素子における電流−光量特性を示し
た特性図である。
FIG. 9 is a characteristic diagram showing current-light quantity characteristics in a conventional light emitting device.

【符号の説明】[Explanation of symbols]

1 N型半導体(第1導電型の基盤) 1a N型半導体表層部(高リン混晶) 1b N型半導体内層部 2 P型半導体(第2導電型の拡散層) 2a P型半導体(高リン混晶) 2b P型半導体 3 正電極 4 負電極 5 選択拡散膜 1 N-type semiconductor (first conductivity type substrate) 1a N-type semiconductor surface layer part (high phosphorus mixed crystal) 1b N-type semiconductor inner layer part 2 P-type semiconductor (second conductivity type diffusion layer) 2a P-type semiconductor (high phosphorus content) Mixed crystal) 2b P-type semiconductor 3 Positive electrode 4 Negative electrode 5 Selective diffusion film

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 第1導電型の基盤と、不純物拡散によっ
て前記基盤の一部に形成された第2導電型の拡散層と、
を含み、 前記基盤および前記拡散層の表面に形成された電極間に
順方向の電圧を印加して前記基盤と前記拡散層の接合面
において発光させる発光素子において、 前記基盤および前記拡散層は、三元系以上の元素による
混晶から構成され、 前記基盤および前記拡散層は、その表面部に各本体とは
異なった混晶比を有する一層以上の表層部を有し、 少なくとも前記表層部の禁制帯幅の値が各本体の禁制帯
幅の値より大きく設定され、 発光する前記接合面は、前記表層部より深いことを特徴
とする発光素子。
1. A first-conductivity-type substrate, and a second-conductivity-type diffusion layer formed on a part of the substrate by impurity diffusion.
In the light-emitting element that applies a forward voltage between the electrodes formed on the surface of the base and the diffusion layer to emit light at the bonding surface of the base and the diffusion layer, the base and the diffusion layer are It is composed of a mixed crystal of ternary or more elements, and the base and the diffusion layer have at least one surface layer portion having a mixed crystal ratio different from that of each main body on the surface portion, at least the surface layer portion A light-emitting device characterized in that a band gap value is set to be larger than a band gap value of each body, and the junction surface for emitting light is deeper than the surface layer portion.
JP4195687A 1992-07-22 1992-07-22 Light-emitting element Pending JPH0645645A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4195687A JPH0645645A (en) 1992-07-22 1992-07-22 Light-emitting element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4195687A JPH0645645A (en) 1992-07-22 1992-07-22 Light-emitting element

Publications (1)

Publication Number Publication Date
JPH0645645A true JPH0645645A (en) 1994-02-18

Family

ID=16345333

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4195687A Pending JPH0645645A (en) 1992-07-22 1992-07-22 Light-emitting element

Country Status (1)

Country Link
JP (1) JPH0645645A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11186601A (en) * 1997-12-19 1999-07-09 Showa Denko Kk Compound semiconductor light-emitting device
US6930330B2 (en) * 2002-01-10 2005-08-16 Samsung Electronics Co., Ltd. Silicon optoelectronic device and light emitting apparatus using the same
US7537956B2 (en) 2004-11-27 2009-05-26 Samsung Electronics Co., Ltd. Silicon optoelectronic device manufacturing method and silicon optoelectronic device manufactured by thereof and image input and/or output apparatus having the same
US7670862B2 (en) 2004-11-24 2010-03-02 Samsung Electronics Co., Ltd. Silicon optoelectronic device, manufacturing method thereof, and image input and/or output apparatus using the same
US7750353B2 (en) 2002-01-10 2010-07-06 Samsung Electronics Co., Ltd. Method of manufacturing silicon optoelectronic device, silicon optoelectronic device manufactured by the method, and image input and/or output apparatus using the silicon optoelectronic device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11186601A (en) * 1997-12-19 1999-07-09 Showa Denko Kk Compound semiconductor light-emitting device
US6930330B2 (en) * 2002-01-10 2005-08-16 Samsung Electronics Co., Ltd. Silicon optoelectronic device and light emitting apparatus using the same
US7750353B2 (en) 2002-01-10 2010-07-06 Samsung Electronics Co., Ltd. Method of manufacturing silicon optoelectronic device, silicon optoelectronic device manufactured by the method, and image input and/or output apparatus using the silicon optoelectronic device
US7754508B2 (en) 2002-01-10 2010-07-13 Samsung Electronics Co., Ltd. Method of manufacturing silicon optoelectronic device, silicon optoelectronic device manufactured by the method, and image input and/or output apparatus using the silicon optoelectronic device
US7670862B2 (en) 2004-11-24 2010-03-02 Samsung Electronics Co., Ltd. Silicon optoelectronic device, manufacturing method thereof, and image input and/or output apparatus using the same
US7537956B2 (en) 2004-11-27 2009-05-26 Samsung Electronics Co., Ltd. Silicon optoelectronic device manufacturing method and silicon optoelectronic device manufactured by thereof and image input and/or output apparatus having the same

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