JPH0645238A - Electron beam lithography equipment - Google Patents
Electron beam lithography equipmentInfo
- Publication number
- JPH0645238A JPH0645238A JP19513992A JP19513992A JPH0645238A JP H0645238 A JPH0645238 A JP H0645238A JP 19513992 A JP19513992 A JP 19513992A JP 19513992 A JP19513992 A JP 19513992A JP H0645238 A JPH0645238 A JP H0645238A
- Authority
- JP
- Japan
- Prior art keywords
- stage
- electron beam
- mask substrate
- sample
- conductive layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は電子線描画装置に係り、
とくに露光用マスク基板やレチクル等の保持方法を改善
した電子線描画装置とそのマスク基板に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electron beam drawing apparatus,
In particular, the present invention relates to an electron beam drawing apparatus and its mask substrate in which a method for holding an exposure mask substrate, a reticle and the like is improved.
【０００２】[0002]
【従来の技術】図８は従来の電子線描画装置におけるマ
スク基板の保持方法を説明する斜視図である。まず、マ
スク基板１をカセット２に入れ、押しバネＡ３でブロッ
クＡ４に押しつけてカセット２に保持したのち、カセッ
ト２をステ−ジ７に送って押しバネ９によりステ−ジ７
に固定されたブロック８にカセット２を押しつけ保持す
る。このようにしてカセット２に保持したマスク基板１
に電子線５を照射してマスク基板１に半導体回路パタ−
ンを描画する。偏向器６の電子線偏向領域は高々３ｍｍ
程度と小さいため、ステ−ジを移動させてマスク基板１
の全面に描画する。2. Description of the Related Art FIG. 8 is a perspective view for explaining a method of holding a mask substrate in a conventional electron beam drawing apparatus. First, the mask substrate 1 is put into the cassette 2, and the pressing spring A3 presses it against the block A4 to hold it in the cassette 2. Then, the cassette 2 is sent to the stage 7, and the pressing spring 9 causes the stage 7 to move.
The cassette 2 is pressed against and held by the block 8 fixed to. The mask substrate 1 thus held in the cassette 2
The mask substrate 1 is irradiated with the electron beam 5 on the semiconductor circuit pattern.
Drawing The electron beam deflection area of the deflector 6 is at most 3 mm.
Because it is small, move the stage to move the mask substrate 1
Draw on the entire surface of.
【０００２】[0002]
【発明が解決しようとする課題】上記従来装置において
は、カセット２とマスク基板１間、およびカセット２と
ステ−ジ７間の保持力が不足するとステ−ジ７の移動に
よりマスク基板がずれ、保持力を大きくするとマスク基
板が歪み描画位置精度が劣化するという問題があった。In the above conventional apparatus, when the holding force between the cassette 2 and the mask substrate 1 and between the cassette 2 and the stage 7 is insufficient, the mask substrate shifts due to the movement of the stage 7. When the holding force is increased, the mask substrate is distorted and the drawing position accuracy is deteriorated.
【０００３】図９は上記保持力を大きくした場合のマス
ク基板１の歪を示す図である。描画位置精度を上げるた
めには、カセット２の平坦度を確保して上記歪みを低減
する必要があるが製作費や製作時間等が膨大になるとい
う問題があった。さらに、描画中の温度変動による伸縮
を押さえる必要上、カセット２をセラッミクスのような
低膨張係数材料などで製作していたので高価であること
も問題であった。本発明の目的はマスク基板１をステ−
ジ７上に直接保持することによりカセット２を省略して
装置を低価格化し、さらにマスク基板１を十分平坦に保
持することのできる電子線描画装置を提供することのに
ある。FIG. 9 is a diagram showing the distortion of the mask substrate 1 when the holding force is increased. In order to improve the drawing position accuracy, it is necessary to secure the flatness of the cassette 2 and reduce the above distortion, but there is a problem that the manufacturing cost, the manufacturing time, etc. become enormous. Furthermore, since it is necessary to suppress expansion and contraction due to temperature fluctuation during drawing, the cassette 2 is expensive because it is made of a material having a low expansion coefficient such as ceramics. The object of the present invention is to maintain the mask substrate 1
It is an object of the present invention to provide an electron beam drawing apparatus that can hold the mask substrate 1 sufficiently flat by omitting the cassette 2 by holding the mask substrate 1 directly on the substrate 7.
【０００４】[0004]
【課題を解決するための手段】上記課題を解決するため
に、ステ−ジ上に誘電体層を設け、上記誘電体層上に載
置したマスク基板や半導体ウエハ等の被描画試料とステ
−ジ間に電圧を印加するようにする。また、上記ステ−
ジの表面部に誘電体層と電極層と絶縁層とを順次設けて
被描画試料を載置し、上記被描画試料と電極層間に電圧
を印加するようにする。さらに、上記被描画試料を接地
するようにする。In order to solve the above-mentioned problems, a dielectric layer is provided on a stage, and a sample to be drawn such as a mask substrate or a semiconductor wafer mounted on the dielectric layer and a stage. Voltage is applied between the two. In addition, the above
A dielectric layer, an electrode layer, and an insulating layer are sequentially provided on the surface of the substrate, the sample to be drawn is placed, and a voltage is applied between the sample to be drawn and the electrode layer. Further, the sample to be drawn is grounded.
【０００５】また、上記ステ−ジの表面部に誘電体層と
導電層と誘電体層の３層構造のシ−トを設けて被描画試
料を載置し、上記シ−トの導電層と被描画試料およびス
テ−ジ間にに電圧を印加するようにする。さらに、上記
被描画試料およびステ−ジを接地するようにする。Further, a sheet having a three-layer structure of a dielectric layer, a conductive layer, and a dielectric layer is provided on the surface of the stage, and a sample to be drawn is placed on the surface of the stage. A voltage is applied between the sample to be drawn and the stage. Further, the drawn sample and the stage are grounded.
【０００６】また、マスク基板や半導体ウエハ等の上記
被描画試料のステ−ジ側の面に導電層を設けてこれを上
記電圧の片側に接続するようにする。また、上記被描画
試料の導電層を上記被描画試料の描画領域内に設けるよ
うにする。また、上記被描画試料の導電層を上記被描画
試料の描画領域内に部分的に設けるようにする。Further, a conductive layer is provided on the surface of the sample to be drawn such as a mask substrate or a semiconductor wafer on the stage side and is connected to one side of the voltage. Further, the conductive layer of the sample to be drawn is provided in the drawing region of the sample to be drawn. Further, the conductive layer of the sample to be drawn is partially provided in the drawing region of the sample to be drawn.
【０００７】[0007]
【作用】マスク基板や半導体ウエハ等の被描画試料は誘
電体層を介して上記電圧によりステ−ジ上に静電吸着さ
れる。また、上記被描画試料を接地することにより、電
子線は上記電圧により形成される電界の影響を受けなく
なる。The sample to be drawn such as a mask substrate or a semiconductor wafer is electrostatically adsorbed on the stage by the above voltage through the dielectric layer. Further, by grounding the sample to be drawn, the electron beam is not affected by the electric field formed by the voltage.
【０００８】また、上記被描画試料のステ−ジ面側に設
けた導電層は上記電圧により誘起される電荷をステ−ジ
面側に分布して上記静電吸着力を高める。また、上記被
描画試料の導電層を上記被描画試料の描画領域内に設け
たり、同領域内に部分的に設けることにより、上記電圧
により形成される電界の電子線照射側への漏洩が防止さ
れる。The conductive layer provided on the stage surface side of the sample to be drawn distributes the electric charges induced by the voltage to the stage surface side to enhance the electrostatic attraction force. Further, the conductive layer of the sample to be drawn is provided in the drawing region of the sample to be drawn or partially provided in the same region, thereby preventing the electric field formed by the voltage from leaking to the electron beam irradiation side. To be done.
【０００９】[0009]
【実施例】〔実施例 １〕図１は本発明によるマスク基
板とステ−ジ部の断面図である。図１においては従来装
置におけるカセット２が省略されている。本発明におい
ては、マスク基板１の裏面に導電層１０を設け、これを
誘電層１０を挟んでステ−ジ７上に載置し、電源３０に
より導電層１０とステ−ジ７間に電圧を印加してマスク
基板１をステ−ジ７上に静電吸着して固定するようにす
る。[Embodiment 1] FIG. 1 is a sectional view of a mask substrate and a stage portion according to the present invention. In FIG. 1, the cassette 2 in the conventional device is omitted. In the present invention, the conductive layer 10 is provided on the back surface of the mask substrate 1, and the conductive layer 10 is placed on the stage 7 with the dielectric layer 10 interposed therebetween, and a voltage is applied between the conductive layer 10 and the stage 7 by the power supply 30. It is applied so that the mask substrate 1 is electrostatically adsorbed and fixed on the stage 7.
【００１０】ステ−ジ７の表面は例えば２μｍ／１０×
１０ｍｍ2以下の平坦度に加工されているので、上記静
電吸着によりマスク基板１はステ−ジ７の平坦度と同程
度に平坦に吸着され、さらに均一に吸着力を与えること
ができ、また、電圧により静電吸着力を任意に制御する
ことができる。また、図２に示すように、導電層１０を
マスク基板１の裏面周辺部に設けるようにすることもで
きる。The surface of the stage 7 is, for example, 2 μm / 10 ×.
Since it is processed to have a flatness of 10 mm 2 or less, the electrostatic attraction causes the mask substrate 1 to be as flat as the flatness of the stage 7 and to give a more uniform suction force. The electrostatic attraction force can be arbitrarily controlled by the voltage. Further, as shown in FIG. 2, the conductive layer 10 may be provided on the periphery of the back surface of the mask substrate 1.
【００１１】１２はマスク基板１の上面に形成された透
光性のクロ−ム膜であり、電子線５を透過すると同時に
電子線５電流を接地回路１３を通してバイパスし、マス
ク基板１の帯電を防止する。また、ステ−ジ７は電子線
描画装置本体と導電的に接触し、通常接地電位に保たれ
るので、電源３０のステ−ジ７側端子を接地電位とし、
マスク基板１の導電層１０を接地電位から浮いた電位に
する。Numeral 12 is a light-transmitting chrome film formed on the upper surface of the mask substrate 1, and at the same time the electron beam 5 is transmitted, the electron beam 5 current is bypassed through the ground circuit 13 to charge the mask substrate 1. To prevent. Further, since the stage 7 is in conductive contact with the main body of the electron beam drawing apparatus and is normally kept at the ground potential, the stage 7 side terminal of the power source 30 is set to the ground potential,
The conductive layer 10 of the mask substrate 1 is set to a potential floating above the ground potential.
【００１２】〔実施例 ２〕電子線描画装置の描画精細
度が向上すると、上記マスク基板１の導電層１０の電位
により電子線５の照射位置がずれることが懸念される。
上記電子線５の位置ずれを防止するためには上記導電層
１０を接地電位とする必要がある。そこで図３に示すよ
うに、ステ−ジ７側に絶縁層１５を介して平坦な電極層
１６を設けて電極層１６に電源３０を接続し、誘電層１
１を挟んでステ−ジ７上に載置したマスク基板１の導電
層１０を接地するようにする。[Embodiment 2] When the drawing definition of the electron beam drawing apparatus is improved, there is a concern that the irradiation position of the electron beam 5 may be shifted due to the potential of the conductive layer 10 of the mask substrate 1.
In order to prevent the displacement of the electron beam 5, it is necessary to set the conductive layer 10 to the ground potential. Therefore, as shown in FIG. 3, a flat electrode layer 16 is provided on the stage 7 side through an insulating layer 15 and a power source 30 is connected to the electrode layer 16 so that the dielectric layer 1 is formed.
The conductive layer 10 of the mask substrate 1 placed on the stage 7 with 1 interposed therebetween is grounded.
【００１３】なお、１６１は電極層１６の端子部であ
り、その面積は狭いのでこの部分の電位が電子線に与え
る影響は無視できる程度に小さい。また、上記端子部を
ステ−ジ７の下側から取り出すようにして上記電位の影
響を完全に無くすることができる。また、上記電位の洩
れを少なくするためには、電極層１６がマスク基板１の
導電層１０の下に隠れる程度に小さくする必要がある。Reference numeral 161 denotes a terminal portion of the electrode layer 16, and since the area thereof is small, the influence of the potential of this portion on the electron beam is negligibly small. Further, the influence of the potential can be completely eliminated by taking out the terminal portion from the lower side of the stage 7. Further, in order to reduce the potential leakage, the electrode layer 16 needs to be small enough to be hidden under the conductive layer 10 of the mask substrate 1.
【００１４】図４はマスク基板１の上面図の一例であ
る。一辺が１２７ｍｍのマスク基板１の内部の１１５ｍ
ｍの部分が電子線５の描画領域である。このように描画
領域はマスク基板のサイズより小さいので、マスク基板
１の裏面全面に導電層１０を設け、電極層１６を上記描
画領域と同程度にすることにより電極層１６が導電層１
０の下に隠れるようにすることができる。また、電極層
１６を図４の点線のようにしてマスク基板１を部分的に
吸着するようにしてもよい。FIG. 4 is an example of a top view of the mask substrate 1. 115m inside the mask substrate 1 with a side of 127mm
The portion m is the drawing area of the electron beam 5. Since the drawing area is smaller than the size of the mask substrate in this manner, the conductive layer 10 is provided on the entire back surface of the mask substrate 1 and the electrode layer 16 is made to have substantially the same size as the drawing area, so that the electrode layer 16 is made conductive.
You can hide under 0. The electrode layer 16 may be partially adsorbed on the mask substrate 1 as shown by the dotted line in FIG.
【００１５】〔実施例 ３〕図３の方法においては、マ
スク基板１のサイズが変わるとステ−ジ７の電極層１６
がマスク基板１の導電層１０からはみ出したり、導電層
１０に対して電極層１６の面積が極端に不足したりする
場合が生じる。図５は上記面積の過不足を解消する本発
明実施例の断面図である。[Embodiment 3] In the method of FIG. 3, when the size of the mask substrate 1 is changed, the electrode layer 16 of the stage 7 is changed.
May protrude from the conductive layer 10 of the mask substrate 1 or the area of the electrode layer 16 may be extremely insufficient with respect to the conductive layer 10. FIG. 5 is a cross-sectional view of an embodiment of the present invention which solves the above-mentioned excess and deficiency of the area.
【００１６】図５においては、誘電層１１１の中間に導
電層１７を挾んだサンドウイッチ構造のシ−ト１１２の
上にマスク基板１を載置する。マスク基板１の導電層１
０とステ−ジ７を接地し、導電層１７に電源３０を接続
するようにする。なお、図示を明快にするため誘電層１
１１を厚み方向に誇張して示した。In FIG. 5, the mask substrate 1 is placed on the sheet 112 having a sandwich structure in which the conductive layer 17 is sandwiched between the dielectric layers 111. Conductive layer 1 of mask substrate 1
0 and the stage 7 are grounded, and the power source 30 is connected to the conductive layer 17. The dielectric layer 1 is shown for clarity.
11 is exaggerated in the thickness direction.
【００１７】導電層１７とマスク基板１の導電層１０及
びステ−ジ７間にはそれぞれ静電吸引力が作用するの
で、マスク基板１をステ−ジ７に吸着することができ
る。また、マスク基板１のサイズに合わせた誘電層１１
１を複数用意して適宜選定して使用することにより、誘
電層１１１の導電層１７を導電層１０の下に隠れるよう
にすることができる。Since electrostatic attraction acts between the conductive layer 17 and the conductive layer 10 of the mask substrate 1 and the stage 7, the mask substrate 1 can be attracted to the stage 7. In addition, the dielectric layer 11 according to the size of the mask substrate 1
The conductive layer 17 of the dielectric layer 111 can be hidden under the conductive layer 10 by preparing a plurality of 1 and appropriately selecting and using them.
【００１８】〔実施例 ４〕本発明はウエハ上に直接電
子線描画する場合にも適用することができる。図６は上
記直接電子線描画における本発明実施例の断面図であ
る。図６において、ステ−ジ７上には図５に示したシ−
ト１１２を介して導電層１０１を有するウエハ１０２を
載置する。ウエハ１０２の導電層１０１とステ−ジ７を
接地しシ−ト１１２の導電層１７に電源３０を接続する
と、図５の場合と同様にウエハ１０２がステ−ジ７に静
電吸着される。[Embodiment 4] The present invention can also be applied to the case where an electron beam is directly drawn on a wafer. FIG. 6 is a sectional view of an embodiment of the present invention in the above direct electron beam drawing. In FIG. 6, the stage 7 shown in FIG.
The wafer 102 having the conductive layer 101 is placed via the wafer 112. When the conductive layer 101 of the wafer 102 and the stage 7 are grounded and the power source 30 is connected to the conductive layer 17 of the sheet 112, the wafer 102 is electrostatically attracted to the stage 7 as in the case of FIG.
【００１９】なお、導電層１０１を省略してウエハ１０
２を直接接地するようにしても、ウエハ１０２を同様に
ステ−ジ７に静電吸着することができる。The conductive layer 101 is omitted and the wafer 10
Even if 2 is directly grounded, the wafer 102 can be electrostatically attracted to the stage 7 similarly.
【００２０】〔実施例 ５〕図７は上記本発明によりマ
スク基板１やウエハ１０２等をステ−ジ７に搭載する電
子線描画装置実施例のブロック図である。電子銃４１か
らの電子線５は電子レンズ４４、４７と絞り４３、４６
によって所望の形状と電流密度に制御されてマスク基板
１上に照射される。[Embodiment 5] FIG. 7 is a block diagram of an embodiment of an electron beam drawing apparatus for mounting the mask substrate 1, the wafer 102 and the like on a stage 7 according to the present invention. The electron beam 5 from the electron gun 41 receives electron lenses 44 and 47 and diaphragms 43 and 46.
The mask substrate 1 is irradiated with the light having a desired shape and current density controlled by.
【００２１】磁気ディスクなどの外部メモリ−に格納さ
れている描画デ−タはコンピュ−タ２３によりパタ−ン
発生装置２４に転送され、偏向器６の偏向位置信号やブ
ランカ−２５の電子線５オン、オフ信号等に変換され
る。マスク基板１は３ｍｍ程度のフィ−ルド毎に順次電
子線５により描画される。フィ−ルド間の移動はステ−
ジ７の移動により行なわれる。The drawing data stored in the external memory such as a magnetic disk is transferred to the pattern generator 24 by the computer 23, and the deflection position signal of the deflector 6 and the electron beam 5 of the blanker 25 are transferred. It is converted into an on / off signal or the like. The mask substrate 1 is sequentially drawn by the electron beam 5 for each field of about 3 mm. Moving between fields is
This is done by moving J7.
【００２２】上記フィ−ルドの位置はレ−ザ干渉測長系
２７によりステ−ジ７の位置を計測して行なわれる。レ
−ザ１６の光ビ−ムはハ−フミラ−１７によって基準光
と計測光に分けられ、基準光は基準ミラ−１９に入射す
る。計測光は計測ミラ−２０により反射されハ−フミラ
−１８を介してレシ−バ２１に受光され、基準光と比較
されて位置デ−タ化されコンピュ−タ２３に読み込まれ
る。The position of the field is measured by measuring the position of the stage 7 by the laser interference measuring system 27. The light beam of the laser 16 is divided into reference light and measurement light by the half mirror 17, and the reference light is incident on the reference mirror 19. The measurement light is reflected by the measurement mirror 20, received by the receiver 21 via the half mirror 18, compared with the reference light, converted into position data, and read into the computer 23.
【００２３】レ−ザ干渉測長系２７はステ−ジ駆動系２
８に目標位置を与えてモ−タ１５を起動し、レ−ザ干渉
測長系２７はステ−ジ７が目標位置に達したことを検出
してステ−ジ駆動系２８を停止する。コンピュ−タ２３
はレ−ザ干渉測長系２７からステ−ジ７の停止誤差を読
み取ってパタ−ン発生装置２４に位置補正デ−タを送り
電子ビ−ムの一を補正する。The laser interference measuring system 27 is a stage drive system 2
The laser interferometer length measuring system 27 detects that the stage 7 has reached the target position, and stops the stage drive system 28. Computer 23
Reads the stop error of the stage 7 from the laser interference measuring system 27 and sends position correction data to the pattern generator 24 to correct one of the electronic beams.
【００２４】上記ビ−ム偏向とステ−ジ移動をステップ
アンドリピ−トで実行してマスク基板１の全面にパタ−
ン描画を行う。描画が完了すると電源３０の電圧を解除
してステ−ジ７上のマスク基板１を交換し、電源３０の
電圧を印加して新しいマスク基板１をステ−ジ７上に保
持して次の描画を行なう。The above beam deflection and stage movement are executed by step and repeat to pattern the entire surface of the mask substrate 1.
Drawing. When the drawing is completed, the voltage of the power supply 30 is released and the mask substrate 1 on the stage 7 is replaced, and the voltage of the power supply 30 is applied to hold a new mask substrate 1 on the stage 7 to perform the next drawing. Do.
【００２５】[0025]
【発明の効果】本発明により、マスク基板１を直接ステ
−ジに固定してこれを保持する高価なカセットを省略す
ることができる。また、マスク基板は薄い誘電層を介し
て十分な平坦度を有するステ−ジ上に均一に吸着され、
またカセットによるマスク基板の歪みもなくなるので描
画位置精度を向上することができる。According to the present invention, the expensive cassette for fixing the mask substrate 1 directly to the stage and holding it can be omitted. Also, the mask substrate is uniformly adsorbed on the stage having sufficient flatness through the thin dielectric layer,
Further, since the mask substrate is not distorted by the cassette, the drawing position accuracy can be improved.
【図１】本発明の実施例１の部分断面図である。FIG. 1 is a partial cross-sectional view of a first embodiment of the present invention.
【図２】本発明によるマスク基板の断面図である。FIG. 2 is a sectional view of a mask substrate according to the present invention.
【図３】本発明の実施例２の部分断面図である。FIG. 3 is a partial cross-sectional view of a second embodiment of the present invention.
【図４】本発明によるマスク基板実施例の平面図であ
る。FIG. 4 is a plan view of an embodiment of a mask substrate according to the present invention.
【図５】本発明の実施例３の部分断面図である。FIG. 5 is a partial cross-sectional view of a third embodiment of the present invention.
【図６】本発明の実施例４の部分断面図である。FIG. 6 is a partial cross-sectional view of a fourth embodiment of the present invention.
【図７】本発明による電子線描画装置のブロック図であ
る。FIG. 7 is a block diagram of an electron beam drawing apparatus according to the present invention.
【図８】従来装置におけるマスク基板の保持方法を説明
する斜視図である。FIG. 8 is a perspective view illustrating a method of holding a mask substrate in a conventional device.
【図９】従来装置におけるマスク基板の曲がりを説明す
る断面図である。FIG. 9 is a cross-sectional view illustrating bending of a mask substrate in a conventional device.
１…マスク基板、２…カセット、３、９…押しバネ、
４、８…ブロック、５…電子線、６…偏向器、７…ステ
−ジ、１０…導電層、１１、１１１…誘電層、１２…ク
ロム膜、３０…電源、１５…絶縁層、１６…電極層、１
７、１０１…導電層、４１…電子銃、４４，４７…電子
レンズ、４３，４６…絞り、２３…コンピュ−タ、２４
…パタ−ン発生装置、２５…ブランカ、２７…レ−ザ干
渉測長系、１６…レ−ザ、１７，１８…ハ−フミラ−、
１９…基準ミラ−、２０…計測ミラ−、２１…レシ−
バ、２８…ステ−ジ駆動系、１１２…シ−ト、１０２…
ウエハ。1 ... Mask substrate, 2 ... Cassette, 3, 9 ... Push spring,
4, 8 ... Block, 5 ... Electron beam, 6 ... Deflector, 7 ... Stage, 10 ... Conductive layer, 11, 111 ... Dielectric layer, 12 ... Chrome film, 30 ... Power supply, 15 ... Insulating layer, 16 ... Electrode layer, 1
7, 101 ... Conductive layer, 41 ... Electron gun, 44, 47 ... Electron lens, 43, 46 ... Aperture, 23 ... Computer, 24
... Pattern generator, 25 ... Blanker, 27 ... Laser interferometer, 16 ... Laser, 17,18 ... Half mirror,
19 ... Standard mirror, 20 ... Measuring mirror, 21 ... Receiving
28, stage drive system, 112 ... sheet, 102 ...
Wafer.
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.5 識別記号 庁内整理番号 ＦＩ 技術表示箇所 Ｈ０１Ｌ 21/68 Ｒ 8418−4Ｍ (72)発明者 河野 利彦 東京都小平市上水本町五丁目20番１号 株 式会社日立製作所武蔵工場内─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 5 Identification number Reference number within the agency FI Technical indication location H01L 21/68 R 8418-4M (72) Inventor Toshihiko Kono 5-20, Kamimizumoto-cho, Kodaira-shi, Tokyo No. 1 Incorporated company Hitachi Ltd. Musashi factory
Claims (9)
して描画する電子線描画装置において、上記ステ−ジ上
に誘電体層を設け、上記誘電体層上に載置した被描画試
料とステ−ジ間に電圧を印加する電源装置を備えたこと
を特徴とする電子線描画装置。1. An electron beam drawing apparatus for irradiating an object to be drawn on a stage with an electron beam to draw the sample, wherein a dielectric layer is provided on the stage, and the object is placed on the dielectric layer. An electron beam drawing apparatus comprising a power supply device for applying a voltage between a drawing sample and a stage.
して描画する電子線描画装置において、上記ステ−ジの
表面部に誘電体層と電極層と絶縁層とを順次設け、上記
誘電体層上に載置した被描画試料と上記電極層間に電圧
を印加する電源装置を備えたことを特徴とする電子線描
画装置。2. An electron beam drawing apparatus for irradiating an object to be drawn on a stage with an electron beam to draw the sample, wherein a dielectric layer, an electrode layer and an insulating layer are sequentially provided on the surface of the stage, An electron beam drawing apparatus comprising: a sample to be drawn placed on the dielectric layer and a power supply device for applying a voltage between the electrode layers.
地電位（基準電位）に接続するようにしたことを特徴と
する電子線描画装置。3. An electron beam drawing apparatus according to claim 2, wherein the sample to be drawn is connected to a ground potential (reference potential).
して描画する電子線描画装置において、上記ステ−ジの
表面部に誘電体層と導電層と誘電体層の３層構造のシ−
トを設けて被描画試料を載置し、上記シ−トの導電層と
被描画試料およびステ−ジ間にに電圧を印加する電源装
置を備えたことを特徴とする電子線描画装置。4. An electron beam drawing apparatus for irradiating an object to be drawn on a stage with an electron beam for drawing, and a three-layer structure of a dielectric layer, a conductive layer and a dielectric layer on the surface of the stage. The sea
An electron beam drawing apparatus comprising a power supply device for mounting a sample on which a drawing sample is mounted and applying a voltage between the conductive layer of the sheet and the drawing sample and the stage.
びステ−ジを接地電位（基準電位）に接続するようにし
たことを特徴とする電子線描画装置。5. The electron beam drawing apparatus according to claim 4, wherein the sample to be drawn and the stage are connected to a ground potential (reference potential).
上記被描画試料のステ−ジに載置する側に導電層を設
け、この導電層に上記電源装置の電圧の片側を接続する
ようにしたことを特徴とする電子線描画装置。6. The method according to any one of claims 1 to 5,
An electron beam drawing apparatus, characterized in that a conductive layer is provided on the stage of the sample to be drawn on the stage, and one side of the voltage of the power supply device is connected to this conductive layer.
電層を上記被描画試料の描画領域内に設けるようにした
ことを特徴とする電子線描画装置。7. The electron beam drawing apparatus according to claim 6, wherein the conductive layer of the sample to be drawn is provided in a drawing region of the sample to be drawn.
電層を上記被描画試料の描画領域内に部分的に設けるよ
うにしたことを特徴とする電子線描画装置。8. The electron beam drawing apparatus according to claim 7, wherein the conductive layer of the sample to be drawn is partially provided in a drawing region of the sample to be drawn.
上記被描画試料をマスク基板または半導体ウエハとした
ことを特徴とする電子線描画装置。9. The method according to claim 1, wherein
An electron beam drawing apparatus wherein the sample to be drawn is a mask substrate or a semiconductor wafer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19513992A JP2751981B2 (en) | 1992-07-22 | 1992-07-22 | Electron beam drawing equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19513992A JP2751981B2 (en) | 1992-07-22 | 1992-07-22 | Electron beam drawing equipment |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0645238A true JPH0645238A (en) | 1994-02-18 |
| JP2751981B2 JP2751981B2 (en) | 1998-05-18 |
Family
ID=16336103
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19513992A Expired - Fee Related JP2751981B2 (en) | 1992-07-22 | 1992-07-22 | Electron beam drawing equipment |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2751981B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003501823A (en) * | 1999-06-07 | 2003-01-14 | ザ、リージェンツ、オブ、ザ、ユニバーシティ、オブ、カリフォルニア | Reflective mask substrate coating |
| CN111880374A (en) * | 2019-05-02 | 2020-11-03 | 三星电子株式会社 | Extreme ultraviolet exposure apparatus and method of manufacturing semiconductor device using the same |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01296639A (en) * | 1988-05-25 | 1989-11-30 | Nec Corp | Wafer fixing device using static chuck |
| JPH03181117A (en) * | 1989-12-11 | 1991-08-07 | Fujitsu Ltd | Electron beam exposure system and electron beam exposing method |
-
1992
- 1992-07-22 JP JP19513992A patent/JP2751981B2/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01296639A (en) * | 1988-05-25 | 1989-11-30 | Nec Corp | Wafer fixing device using static chuck |
| JPH03181117A (en) * | 1989-12-11 | 1991-08-07 | Fujitsu Ltd | Electron beam exposure system and electron beam exposing method |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003501823A (en) * | 1999-06-07 | 2003-01-14 | ザ、リージェンツ、オブ、ザ、ユニバーシティ、オブ、カリフォルニア | Reflective mask substrate coating |
| CN111880374A (en) * | 2019-05-02 | 2020-11-03 | 三星电子株式会社 | Extreme ultraviolet exposure apparatus and method of manufacturing semiconductor device using the same |
| CN111880374B (en) * | 2019-05-02 | 2023-12-26 | 三星电子株式会社 | Extreme ultraviolet exposure apparatus and method of manufacturing semiconductor device using the same |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2751981B2 (en) | 1998-05-18 |
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