JPH0642501B2 - Positioning method for small semiconductor chips - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Outline] The present invention relates to an improvement in a method of aligning a micro semiconductor chip, and by forming an alignment mark that can be easily carried out, a connection pad of a micro semiconductor chip and a connection pad of a connection substrate can be improved. A method for aligning a fine semiconductor chip and a connection board, which is for the purpose of providing a method for aligning a fine semiconductor chip that can be connected with accuracy, wherein an alignment mark is formed on the connection board,
Incident light having a wavelength that passes through the chip substrate of the micro semiconductor chip is irradiated from the back surface of the surface of the micro semiconductor chip on which the connection pads are not formed, and from the back surface, the light reflected by the alignment mark and the micro semiconductor The light absorption layer of the chip is confirmed to be aligned with the image, and the alignment is performed.

[Industrial application field]

The present invention relates to a method of aligning a semiconductor chip, and more particularly to improvement of a method of aligning a minute semiconductor chip.

Various methods have been performed as a method for aligning a semiconductor chip with a connection substrate with high accuracy. However, since the size of the semiconductor chip is as large as several mm in the related art, the alignment can be easily performed.

However, in recent years, a minute semiconductor chip of about several hundred μm, such as a semiconductor chip of an optical semiconductor device, has become
It has become necessary to perform alignment with the following accuracy.

Under the circumstances as described above, there is a demand for a method of aligning a micro semiconductor chip having a size of several hundreds of μm with an accuracy of several μm or less.

[Conventional technology]

In the conventional semiconductor chip alignment method, since the size of the semiconductor chip is about several mm, as shown in FIG.
The alignment mark 23 is formed on the connection substrate 22 by the lithography technique, and the alignment mark 23 and the chip substrate are formed.
A method of aligning with the outer shape of 21a is performed.

In this case, since the size of the semiconductor chip is large, even if the outer shape cutting accuracy of the semiconductor chip is somewhat poor, the deviation between the connection pads is within an allowable range.

[Problems to be solved by the invention]

The problem with the conventional semiconductor chip alignment method described above is that alignment is performed using the alignment mark and the outer shape of the semiconductor chip.

That is, in the case of a semiconductor chip having an outer shape size of several hundreds of μm to 1 mm, if the outer shape cutting accuracy of the semiconductor chip is poor, when the alignment mark and the outer shape of the semiconductor chip are used for alignment, a gap between the connection pads is misaligned. Will not be within the acceptable range.

In view of the above situation, the present invention is a micro semiconductor chip capable of highly accurately connecting the connection pad of the micro semiconductor chip and the connection pad of the connection substrate by forming the alignment mark that can be easily implemented. The purpose is to provide a method of aligning.

[Means for solving problems]

The above-mentioned problem is a method of aligning a micro semiconductor chip and a connection substrate, wherein an alignment mark is formed on the connection substrate, and incident light of a wavelength that passes through the chip substrate of the micro semiconductor chip is Irradiation is performed from the back surface of the surface of the micro semiconductor chip on which the connection pads are not formed, and the light reflected by the alignment mark and the image of the light absorption layer of the micro semiconductor chip are confirmed from the back surface for alignment. This is solved by the method for aligning the micro semiconductor chip according to the present invention.

[Action]

That is, in the present invention, the alignment mark is formed on the connection substrate, and the incident light of the wavelength that passes through the chip substrate of the micro semiconductor chip mounted on the connection substrate is not formed on the connection pad of the micro semiconductor chip. When irradiated from the surface, this incident light is absorbed in the part where the light absorption layer is formed and is not reflected at all, is transmitted in the part where the light absorption layer is not formed, and is reflected by the alignment mark formed below it. Therefore, it is possible to recognize the shape of this alignment mark.

By aligning the reflected light in the shape of the alignment mark and the image of the light absorption layer, the connection pad of the minute semiconductor chip and the connection pad of the connection substrate can be connected with high accuracy.

〔Example〕

An embodiment of the present invention will be described below with reference to FIGS.

As shown in FIGS. 1 (a) and 2 (b), the micro semiconductor chip 1 has a diameter of 10 μm on the surface of a chip substrate 1a of 200 μm × 200 μm × thickness of about 100 μm made of indium phosphide (InP).
× 1.5 μm thick indium gallium and arsenic (InGaA
s) light absorption layer 1b and four 40μm squares × thickness 1.5μ
m indium-gallium-arsenic (InGaAs) light-absorbing layer 1b 'is formed, and the transparent layer 1c, 1 made of indium-phosphorus (InP) and having a thickness of 1 μm is formed on the surface of the light-absorbing layers 1b, 1b'.
c'is formed, and the connection pads 1d and 1d 'are further formed thereon.

On the other hand, a connection pad 2a connected to the connection pad 1d and a connection pad 2a 'connected to the connection pad 1d' are formed on the surface of the connection substrate 2.

When the incident light 4 having a wavelength of 1.3 μm which is transmitted through the chip substrate 1a is irradiated as shown in the figure, the incident light 4 transmitted through only the portion of the chip substrate 1a has an annular position formed by depositing a metal on the connection substrate 2. The ring-shaped reflected light 5 is reflected by the alignment mark 3 and is reflected as shown in the drawing.

On the other hand, the incident light 4 applied to the portion of the light absorption layer 1b is absorbed by the light absorption layer 1b, so that it appears as a black circle as shown in FIG. 1 (b).

When the position of the chip substrate 1a is finely adjusted so that the black circle is located in the center of the circular reflected light, the center of the connection pad 1d of the minute semiconductor chip 1 and the connection pad of the connection substrate 2
It is possible to exactly match the center of 2a.

However, when the diameter of the connection pad 2a is much larger than that of the light absorption layer 1b, the inner diameter of the alignment mark 3 is inevitably large, and it is large between this inner diameter and the outer diameter of the light absorption layer 1b. If there is a difference, the alignment becomes difficult and the alignment accuracy decreases.

Another embodiment applicable to such a case will be described with reference to FIG.

In this case, the light absorption layer 11b is not used for the alignment, and as shown in FIGS. 2A and 2B, a part of the light absorption layer 11b between the connection pads 11d 'is removed in a circular shape, The alignment mark 13 is formed on the connection substrate 12 corresponding to this position by depositing metal.

When the incident light 14 having a wavelength of 1.3 μm transmitted through the chip substrate 11a is irradiated as shown in the figure, the incident light 14 transmitted through only the chip substrate 11a is an alignment mark formed by vapor-depositing metal on the connection substrate 12. The circular reflected light 15 reflects at 13 and is reflected as shown.

On the other hand, since the incident light 14 applied to the light absorbing layer 11b 'is absorbed by the light absorbing layer 11b', it is circular in a black background as shown by the diagonal lines in FIG. 2 (c). The shining alignment mark 13 can be seen in the reflected light from the surface of the connecting substrate 12 in the window.

By finely adjusting the position of the chip substrate 11a so that the above-mentioned bright alignment mark 13 is located in the center of the window, the center of the connection pad 11d of the minute semiconductor chip 11 and the connection pad of the connection substrate 12 It is possible to exactly match the center of 12a.

In this case, since the bright alignment mark 13 is aligned with the reflected light from the surface of the connection substrate 12 in the circular window in the black background, the contrast is slightly insufficient.

In order to improve this point, the advantages of one embodiment and the other embodiments are combined, and the center of the circular removed portion of the light absorption layer 11b ′ for alignment formed in the other embodiment is provided with By leaving the one corresponding to the light absorption layer 1b used in the example and forming an annular alignment mark corresponding to this on the surface of the connection substrate, alignment in which the defects of one example and other examples are removed It becomes possible to do.

The fine semiconductor chip 1 and the connection substrate 2 with the centers of the connection pads thus aligned are integrated by heating and melting the gold-tin alloy formed on the respective surfaces of the connection pads, and the state shown in FIG. 3 is obtained. It is possible to assemble it.

[Effects of the Invention] As is clear from the above description, according to the present invention, by forming the alignment mark having an extremely simple structure on the connection substrate, Has the advantage that it can be aligned with high accuracy, and can be expected to have a remarkable effect of improving the quality, which is extremely useful industrially.

[Brief description of drawings]

FIG. 1 is a diagram showing an embodiment according to the present invention, FIG. 2 is a diagram showing another embodiment according to the present invention, and FIG. 3 is an assembled state of a micro semiconductor chip and a connection substrate according to an embodiment of the present invention. FIG. 4 is a side sectional view showing the above, and FIG. 4 is a view showing a conventional method for aligning a semiconductor chip. In the figure, 1 and 11 are minute semiconductor chips, 1a and 11a are chip substrates, 1b and 11b are light absorbing layers, 1b 'and 11b' are light absorbing layers, 1c and 11c are transparent layers, and 1c 'and 11c' are transparent. Layers, 1d and 11d are connection pads, 1d ′ and 11d ′ are connection pads, 2 and 12 connection boards, 2a and 12a are connection pads, 3 and 13 are alignment marks, 4 and 14 are incident light, 5 and 15 are Reflected light.

Claims (1)

[Claims] 1. A method for aligning a micro semiconductor chip (1) and a connection board (2), wherein an alignment mark (3) is formed on the connection board (2), and the micro semiconductor chip (3) is formed. Incident light (4) having a wavelength that passes through the chip substrate (1a) of 1) is irradiated from the back surface of the surface on which the connection pads (1d) of the micro semiconductor chip (1) are not formed, and from the back surface, A method for aligning a micro semiconductor chip, which comprises performing alignment by confirming the reflected light (5) from the alignment mark (3) and the image of the light absorption layer (1b) of the micro semiconductor chip (1). .