JPH0642488B2 - Crystal composition control method of crystal layer interface by ion implantation - Google Patents

Crystal composition control method of crystal layer interface by ion implantation

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Publication number
JPH0642488B2
JPH0642488B2 JP57078015A JP7801582A JPH0642488B2 JP H0642488 B2 JPH0642488 B2 JP H0642488B2 JP 57078015 A JP57078015 A JP 57078015A JP 7801582 A JP7801582 A JP 7801582A JP H0642488 B2 JPH0642488 B2 JP H0642488B2
Authority
JP
Japan
Prior art keywords
crystal
gaalas
layer
gaas
crystal composition
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57078015A
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Japanese (ja)
Other versions
JPS58194333A (en
Inventor
功年 土居
克信 青柳
荘八 岩井
勝 三原
進 難波
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
RIKEN Institute of Physical and Chemical Research
Original Assignee
RIKEN Institute of Physical and Chemical Research
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by RIKEN Institute of Physical and Chemical Research filed Critical RIKEN Institute of Physical and Chemical Research
Priority to JP57078015A priority Critical patent/JPH0642488B2/en
Publication of JPS58194333A publication Critical patent/JPS58194333A/en
Publication of JPH0642488B2 publication Critical patent/JPH0642488B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation

Description

【発明の詳細な説明】 本発明は、結晶組成の異なる少くとも2領域からなるGa
1-xAlxAs(0≦x≦1)半導体の結晶界面近傍における
結晶組成の制御方法に関するものである。ここで、Ga
1-x Alx As(0≦x≦1)半導体とは、x=0の場合
はGaAsを、x=1の場合はAlAsを,そして0<x<1の
場合はGaAlAsをそれぞれ表し、これらの物質の少なくと
も2領域から成るのであるから(1)GaAsの層とAlAsの層
の堆積,(2)GaAsの層とGaAlAsの層の堆積、(3)AlAsの層
とGaAlAsの層の堆積、そして(4)異なるxの値を持ったG
aAlAsの2層以上の堆積からそれぞれ成る半導体を表し
ている。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to Ga containing at least two regions having different crystal compositions.
The present invention relates to a method for controlling a crystal composition in the vicinity of a crystal interface of a 1-x Al x As (0 ≦ x ≦ 1) semiconductor. Where Ga
1-x Al x As (0 ≦ x ≦ 1) semiconductor means GaAs when x = 0, AlAs when x = 1, and GaAlAs when 0 <x <1. (1) deposition of GaAs layer and AlAs layer, (2) deposition of GaAs layer and GaAlAs layer, (3) deposition of AlAs layer and GaAlAs layer, And (4) G with different x values
It represents a semiconductor each consisting of a stack of two or more layers of aAlAs.

従来、結晶組成の異なるGaAlAs界面近傍における結晶組
成の制御は、Znを結晶界面の領域に拡散することによつ
て行われていた。〔参照文献:(1)W.D.Laidig etal.,AP
L38,776(1981),(2)N,Holonyak,Jr.,etal.,A
PL39,102(1981),(3)S.W.Kirchoefer etal.,
JAP53,766(1982)〕。しかし、この方法で
は、AlAs濃度の高い領域でのZn拡散係数が大きい(参考
文献(3))のために、所望の狭い領域を制御するのが困
難である。さらに、Zn濃度が約4×1019/cm3と高い
(参照文献(1))ため、結晶組成のみならず伝導型をも
変えてしまう欠点を有していた。
Conventionally, the control of the crystal composition in the vicinity of the GaAlAs interface having different crystal compositions has been performed by diffusing Zn into the region of the crystal interface. [Reference: (1) WDLaidig et al., AP
L 38 , 776 (1981), (2) N, Holonyak, Jr., et al., A
PL 39 , 102 (1981), (3) SWKirchoefer et al.,
JAP 53 , 766 (1982)]. However, with this method, it is difficult to control a desired narrow region because the Zn diffusion coefficient is large in the region where the AlAs concentration is high (reference document (3)). Further, since the Zn concentration is as high as about 4 × 10 19 / cm 3 (reference (1)), there is a drawback that not only the crystal composition but also the conductivity type is changed.

本発明は、上記の欠点を無くした結晶組成の異なるGaAl
As界面近傍の結晶組成の制御方法を提供することを目的
とする。
The present invention is a GaAl having a different crystal composition that eliminates the above drawbacks.
It is an object to provide a method for controlling the crystal composition near the As interface.

本発明では、上記目的を達成するために、イオン注入技
術を用いて不純物イオンを、結晶組成の異なるGaAlAs界
面近傍に注入するものである。本発明によれば、不純物
イオンを所望の狭い領域に注入することができるため、
GaAlAs界面近傍の結晶組成を微細制御できる。例えば、
ZnイオンをGaAlAs界面に注入する場合は、注入イオンの
ピーク濃度を拡散法で制御するときに要する濃度(〜4
×1019cm-3)より低くしても同等の制御をすることが
でき、結晶組成と伝導型を別々に制御することができ
る。又高輝度イオンビーム又はマスクを用いることによ
り、GaAlAs界面近傍に結晶組成の異なる2次元結晶パタ
ーンを形成することができる。
In order to achieve the above object, the present invention uses an ion implantation technique to implant impurity ions in the vicinity of a GaAlAs interface having a different crystal composition. According to the present invention, it is possible to implant impurity ions into a desired narrow region,
The crystal composition near the GaAlAs interface can be finely controlled. For example,
When implanting Zn ions into the GaAlAs interface, the concentration required to control the peak concentration of the implanted ions by the diffusion method (~ 4
Even if it is lower than × 10 19 cm -3 ), the same control can be performed, and the crystal composition and the conductivity type can be controlled separately. Further, by using a high-intensity ion beam or mask, it is possible to form a two-dimensional crystal pattern having a different crystal composition near the GaAlAs interface.

以下、実施例により本発明を詳しく説明する。Hereinafter, the present invention will be described in detail with reference to examples.

〔実施例1〕 第1図は、結晶構造としてGaAs/GaAlAsダブルヘテロ構
造、電極構造としてオキサイドストライプ構造をもつGa
As/GaAlAs半導体レーザーに本発明を適用してレーザー
発振用共振器を形成した素子の側面及び断面図である。
1はn-GaAs基板結晶、2はn-GaAlAs層(x=0.4、厚
さ2μm)、3はGaAs活性層(厚さ0.1μm)、4は
p-GaAlAs層(x=0.4、厚さ2μm)、5はGaAs電極
層である。これらのGaAs/GaAlAsダブルヘテロ構造の結
晶層を液相エピタキシヤル成長法で成長させた後、SiO2
膜をスパッタ法で被着し、ホトリングラフイー技術でSi
O2膜にストライプ状の窓を形成した。次にZn拡散を封管
法で行い、n-GaAs電極層5をぬけてp-GaAlAs層4に達す
るまでZn拡散ストライプ層を形成した。次に基板結晶1
を研磨して約100μmの厚さにした後、p側電極6と
してCr/Au、n側電極7としてAuGeを蒸着した。次に長
さ300〜400μmでヘキ開してフアブリペロ共振器
を形成し、その後、本発明を適用して、フアブリペロ共
振器端面にZnイオンを180Kevのエネルギーで5×1
15/cm2注入した。
Example 1 FIG. 1 shows a Ga having a GaAs / GaAlAs double hetero structure as a crystal structure and an oxide stripe structure as an electrode structure.
FIG. 3 is a side view and a cross-sectional view of an element in which the present invention is applied to an As / GaAlAs semiconductor laser to form a laser oscillation resonator.
1 is an n-GaAs substrate crystal, 2 is an n-GaAlAs layer (x = 0.4, thickness 2 μm), 3 is a GaAs active layer (thickness 0.1 μm), 4 is
p-GaAlAs layers (x = 0.4, thickness 2 μm), 5 are GaAs electrode layers. After the crystal layers of these GaAs / GaAlAs double heterostructure grown by liquid phase epitaxial growth method, SiO 2
The film is deposited by the sputtering method and the Si
Striped windows were formed in the O 2 film. Next, Zn diffusion was performed by a sealed tube method, and a Zn diffusion stripe layer was formed until the n-GaAs electrode layer 5 was reached and the p-GaAlAs layer 4 was reached. Next, substrate crystal 1
Was polished to a thickness of about 100 μm, Cr / Au was deposited as the p-side electrode 6, and AuGe was deposited as the n-side electrode 7. Then, the Fabry-Perot resonator is cleaved with a length of 300 to 400 μm to form a Fabry-Perot resonator, and then the present invention is applied to Zn ions on the end face of the Fabry-Perot resonator at an energy of 180 Kev of 5 × 1.
0 15 / cm 2 was injected.

以上のようにして得られた半導体レーザーチツプをヒー
トシンクにマウントするときの熱処理でイオン注入領域
の欠陥も回復し、イオン注入層のうちGaAs/GaAlAs界面
近傍では、両結晶領域の中間の結晶組成をもつGaAlAs領
域8、9、10を形成することができた。
Defects in the ion-implanted region are also recovered by heat treatment when mounting the semiconductor laser chip obtained as described above on a heat sink, and in the vicinity of the GaAs / GaAlAs interface in the ion-implanted layer, the crystal composition in the middle of both crystal regions is It was possible to form GaAlAs regions 8, 9 and 10.

以上の工程により、GaAs活性層3の端面は、レーザー発
振波長で透明なGaAlAs層9でおゝわれているため、光出
力を増大させた時に起るフアブリペロ共振器の端面破壊
を防ぐための保護膜が形成できた。
Through the above steps, the end surface of the GaAs active layer 3 is covered with the GaAlAs layer 9 which is transparent at the laser oscillation wavelength. Therefore, protection for preventing the end surface destruction of the Fabry-Perot resonator that occurs when the optical output is increased. A film could be formed.

本実施例におけるイオン注入されたZn濃度のピーク値は
〜5×1018cm-3である。拡散法と比較すれば、本発明
による方法を適用することにより、1桁程度低いZn濃度
でも、拡散法と同等な加工制御ができることが理解され
る。
The peak value of the ion-implanted Zn concentration in this example is ˜5 × 10 18 cm −3 . As compared with the diffusion method, it is understood that by applying the method according to the present invention, processing control equivalent to that of the diffusion method can be achieved even with a Zn concentration lower by one digit.

〔実施例2〕 第2図は、本発明を適用した形成したGaAs光導波路の作
製工程を示す断面図である。GaAs基板結晶21の上にTe
ドープGaAlAs層(x=0.4、厚さ2μm、n=4×1
18cm-3)22、GaAs層(厚さ0.08μm)23を連
続的に液相成長法で形成し、その後ホトリングラフイー
技術を用いて、結晶表面に形成したSiO2スパツタ膜(厚
さ0.4μm)24を幅1μmのストライプ状にした。
次にイオン注入技術を用いてZnイオンを3×1015cm-3
の濃度で注入した。たゞし、加速電圧は180KVであ
る。Znイオン注入領域25第2図に示す通りである。
[Embodiment 2] FIG. 2 is a cross-sectional view showing a manufacturing process of a GaAs optical waveguide formed by applying the present invention. Te on the GaAs substrate crystal 21
Doped GaAlAs layer (x = 0.4, thickness 2 μm, n = 4 × 1)
0 18 cm -3 ) 22 and a GaAs layer (thickness 0.08 μm) 23 are continuously formed by the liquid phase epitaxy method, and then the SiO 2 sputtering film ( (Thickness 0.4 μm) 24 was formed into a stripe with a width of 1 μm.
Next, using the ion implantation technique, Zn ions are added at 3 × 10 15 cm -3.
Was injected at a concentration of. However, the acceleration voltage is 180 KV. Zn ion implantation region 25 is as shown in FIG.

以上のようにして得られたサンプルを480℃で10分
間熱処理することにより、イオン注入で発生した欠陥を
除去すると同時に、GaAlAs層22とGaAs23の界面に層
22と23の中間の結晶組成をもつGaAlAs層26が得ら
れた。これらによりGaAs光導波路が形成された。
The sample obtained as described above is heat-treated at 480 ° C. for 10 minutes to remove the defects generated by the ion implantation, and at the same time, the interface between the GaAlAs layer 22 and the GaAs 23 has a crystal composition intermediate between the layers 22 and 23. The GaAlAs layer 26 was obtained. These formed a GaAs optical waveguide.

本実施例では、低イオン濃度の注入で加工制御ができた
ために、GaAlAs層2の伝導型を変えることなく所望の構
造が得られた。本発明のもつこの特徴は光素子、電気素
子の集積化に極めて有用である。本実施例の素子構造を
拡散法で作る場合には、Znの拡散がGaAs層中よりGaAlAs
層中の方が速いこと及びZn濃度が高いこと等のため、伝
導型反転を起すのを避け難く、さらに、上記と同じ理由
により微細構造の加工制御ができないため、SiO2ストラ
イプの幅を広くする必要がある。
In this embodiment, since the processing can be controlled by the implantation of the low ion concentration, the desired structure was obtained without changing the conductivity type of the GaAlAs layer 2. This feature of the present invention is extremely useful for integrating optical devices and electric devices. When the device structure of this embodiment is formed by the diffusion method, Zn diffusion is more likely to occur in the GaAs layer than GaAlAs.
Due to the fact that the layer is faster and the Zn concentration is high, it is difficult to avoid conduction type inversion, and because the processing control of the fine structure is not possible for the same reason as above, the width of the SiO 2 stripe is wide. There is a need to.

〔実施例3〕 GaAs基板上にモレキユラーエピタキシヤル成長法により
GaAlAs層(厚さ600Å)を形成し、高輝度イオンビー
ム源により60Kevに加速したZnイオンビームで幅1μ
m、間隔1μmで照射掃引することにより、結晶組成の
異なるストライプ構造の2次元パターンからなる半導体
領域を製作することができた。
[Embodiment 3] On a GaAs substrate by a molecular epitaxial growth method.
A GaAlAs layer (thickness 600 Å) is formed and the width is 1μ with a Zn ion beam accelerated to 60 Kev by a high-intensity ion beam source.
By performing the irradiation sweep with m and an interval of 1 μm, it was possible to fabricate a semiconductor region having a two-dimensional pattern with a stripe structure having different crystal compositions.

以上詳述したように、本発明は従来の拡散法による結晶
界面の結晶組成の加工制御技術の欠点を改善し、伝導型
の反転を併わずに結晶組成の加工制御を行うことがで
き、又微細構造の加工制御ができ、さらには2次元パタ
ーンの加工制御ができるなど多くの効果を有するので、
工業的に極めて有用である。
As described in detail above, the present invention improves the drawbacks of the processing control technique of the crystal composition of the crystal interface by the conventional diffusion method, and can perform the processing control of the crystal composition without the inversion of the conduction type. In addition, it has many effects such as the processing control of the fine structure and the processing control of the two-dimensional pattern.
It is extremely useful industrially.

【図面の簡単な説明】[Brief description of drawings]

第1図は、本発明を適用したGaAs/GaAlAsダブルヘテロ
構造の半導体レーザーの側面図と断面図である。 第2図は本発明を適用したGaAs光導波素子の製作工程を
示す断面図である。 図中の符号; 1…n−GaAs基板結晶、2…n−GaAlAs層、3…GaAs活
性層、4…p−GaAlAs層、5…GaAs電極層、6…p側電
極、7…n側電極、8、9、10…GaAlAs領域、21…
GaAs基板結晶、22…TeドープGaAlAs層、23…GaAs
層、24…SiO2スパツタ膜、25…Znイオン注入領域、
26…GaAlAs層
FIG. 1 is a side view and a sectional view of a GaAs / GaAlAs double heterostructure semiconductor laser to which the present invention is applied. FIG. 2 is a sectional view showing a manufacturing process of a GaAs optical waveguide device to which the present invention is applied. Reference numerals in the figure: 1 ... n-GaAs substrate crystal, 2 ... n-GaAlAs layer, 3 ... GaAs active layer, 4 ... p-GaAlAs layer, 5 ... GaAs electrode layer, 6 ... p-side electrode, 7 ... n-side electrode , 8, 9, 10 ... GaAlAs region, 21 ...
GaAs substrate crystal, 22 ... Te-doped GaAlAs layer, 23 ... GaAs
Layer, 24 ... SiO 2 sputter film, 25 ... Zn ion implantation region,
26 ... GaAlAs layer

───────────────────────────────────────────────────── フロントページの続き (72)発明者 難波 進 東京都新宿区中落合4−8−5 (56)参考文献 特開 昭48−65882(JP,A) 1.Appl.Phys.Lett.38 [10],(1981),pp.776〜778 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Susumu Namba 4-8-5 Nakaochiai, Shinjuku-ku, Tokyo (56) References JP-A-48-65882 (JP, A) 1. Appl. Phys. Lett. 38 [10], (1981), pp. 776 ~ 778

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】AlAs濃度(x)の異なる結晶層を少なくとも
2層含むGa1-x Alx As(0≦x≦1)半導体に1016
/cm2未満の濃度のZnイオンを注入することによって前
記の結晶層の界面近傍にそれらのAlAs濃度(x)とは異な
るAlAs濃度(y)を有する第3のGa1-y Aly As(0<y
<1)半導体領域を形成することを特徴とする結晶層界
面の結晶組成制御方法。
1. A Ga 1-x Al x A s (0 ≦ x ≦ 1) semiconductor 10 16 different crystal layers of AlAs concentration (x) comprising at least two layers
Third Ga 1-y Al y A having an AlAs concentration (y) different from their AlAs concentration (x) near the interface of said crystal layer by implanting Zn ions with a concentration of less than 1 / cm 2 s (0 <y
<1) A method for controlling the crystal composition of a crystal layer interface, which comprises forming a semiconductor region.
【請求項2】第3のGa1-y Aly As(0<y<1)半導
体領域を2次元パターンとして形成する請求項1に記載
の結晶層界面の結晶組成制御方法。
2. A third Ga 1-y Al y A s (0 <y <1) crystal composition control method of a crystalline layer interface according to claim 1 for forming a semiconductor region a two-dimensional pattern.
JP57078015A 1982-05-10 1982-05-10 Crystal composition control method of crystal layer interface by ion implantation Expired - Lifetime JPH0642488B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57078015A JPH0642488B2 (en) 1982-05-10 1982-05-10 Crystal composition control method of crystal layer interface by ion implantation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57078015A JPH0642488B2 (en) 1982-05-10 1982-05-10 Crystal composition control method of crystal layer interface by ion implantation

Publications (2)

Publication Number Publication Date
JPS58194333A JPS58194333A (en) 1983-11-12
JPH0642488B2 true JPH0642488B2 (en) 1994-06-01

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Country Status (1)

Country Link
JP (1) JPH0642488B2 (en)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE791929A (en) * 1971-12-02 1973-03-16 Western Electric Co PROCESS FOR MANUFACTURING INSULATING REGIONS IN A SEMICONDUCTOR BODY

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
1.Appl.Phys.Lett.38[10,(1981),pp.776〜778

Also Published As

Publication number Publication date
JPS58194333A (en) 1983-11-12

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