JP2757258B2 - Superlattice element manufacturing method - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a superlattice element in which the degree of freedom of confined electrons or holes is one-dimensional, and a method of manufacturing the same.

[Conventional technology]

In a semiconductor device, the degree of freedom (dimension) of the movement of electrons or holes in the active layer greatly affects the characteristics of the device. For example, the relationship between the lasing threshold current density of a semiconductor laser and the number of dimensions of electrons or holes confined in the active layer was calculated and reported by Asada et al. (IEEE Journal of Quan).
tum Elecotrnics. Vol QE-22 1955 [1986]). According to this, the calculation example is 1050 A / cm ² for a normal laser in which the degree of freedom of electrons or holes is extended in three dimensions, while 38 in a laser having two-dimensional electrons in the active layer.
0A / cm ² , 140A / c for laser with one-dimensional electron in active layer
For a laser having an m ² , 0-dimensional electron in the active layer, it is expected to be 45 A / cm ² . Such an improvement in characteristics is largely due to the modulation of the state density function.

5 (a) to 5 (d) are explanatory diagrams schematically showing this density of state function. 6A to 6D correspond to three dimensions, two dimensions, one dimension, and zero dimension, respectively, and the shape of the state density function at the laser oscillation energy indicated by the arrow on the horizontal axis plays an important role. That is, in the two-dimensional case, the state density function at the oscillation energy increases more steeply in the two-dimensional case than in the three-dimensional case. In the case of one dimension, the state density function becomes steeper, and in the case of zero dimension, it becomes like a delta function. One of the aims of the superlattice element is to improve the characteristics associated with the modulation of the state density function caused by the reduction in the number of dimensions.

The most common structure of the conventional superlattice element has a layered structure composed of alternating layers of two kinds of semiconductor layers, and electrons or holes confined in one semiconductor have two-dimensional degrees of freedom. doing. The thickness of one of the alternating layers of this structure needs to be equal to or less than the de Broglie wavelength of electrons or holes in order to confine electrons or holes in a two-dimensional state. As a technique for realizing this, a molecular beam epitaxy method or a metal organic chemical vapor deposition method having excellent film thickness controllability is used, and a semiconductor laser having a threshold current of 1 mA or less has been realized.

If the degree of freedom of electrons or holes is limited to one dimension, further improvement in characteristics is expected, and a structure that realizes this is called a quantum wire structure. The method of manufacturing the quantum wire structure according to the prior art is roughly divided into three methods.

First, in the first method, the above-mentioned layered structure is manufactured in advance, a cross-sectional portion thereof is exposed, and a gate electrode is formed thereon to induce one-dimensional electrons.

The second method was reported by Fukui et al. (Journal of Vac
Uum Science and Technology. Vol B5) uses a vertical superlattice, which is built into a part of the layered structure.

The third method is the most general method in the prior art, and forms a fine line pattern on a substrate by electron beam drawing or focused ion beam implantation, and performs processes such as etching, regrowth, and superlattice mixed crystal. Are combined to obtain a quantum wire structure.

FIG. 6 is a sectional view of a superlattice element manufactured by using the third method. First, the Al _x Ga _1-x As layer 6
2, a GaAs layer 63 and an Al _x Ga _1-x As layer 64 are grown in this order.
Then, this layered structure is ridge-processed to a width of 100 nm or less by electron beam lithography and reactive ion etching, and finally embedded and regrown with an Al _x Ga _1-x As layer 65. As a result, a GaAs layer 63 (quantum wire) surrounded by each of the Al _x Ga _{1 -x} As layers 62, 64, 65 can be formed.

[Problems to be solved by the invention]

However, the conventional superlattice element having the above configuration has the following disadvantages.

The first method is suitable for a device having an active layer on a substrate surface such as a field effect transistor, but has a drawback that it is not suitable for a device having a structure in which an active layer is embedded like a semiconductor laser.

The second method has a drawback that the growth method is limited to the metal organic chemical vapor deposition method and that doping is difficult.

The third method has a drawback that the width of the quantum wire fluctuates due to fluctuations of an electron beam, fluctuations of an ion beam, and statistical fluctuations in resist development, an etching process, a heat treatment mixed crystal, and the like. This fluctuation is difficult to be suppressed to ± 3 nm or less by the conventional technology, and blurs the sharp state density function formed by the quantum wire structure, thereby canceling out the advantage itself of the quantum wire.

The present invention has been made in order to solve the above-mentioned drawbacks, and has as its object to obtain a quantum wire structure in which the fluctuation of the width of the quantum wire is extremely small.

[Means for solving the problem]

The method for manufacturing a superlattice element according to the present invention includes a step of forming a buffer layer on an upper surface of a semiconductor substrate, a step of forming a first cladding layer on the upper surface of the buffer layer, and a step of forming a first cladding layer on the upper surface of the first cladding layer. Forming a superlattice layer composed of alternating layers of at least two or more types of semiconductors, forming an oblique side surface of the superlattice layer by an etching process or selective growth, and forming a saw-toothed surface on the oblique side surface of the superlattice layer. A step of forming a step, a step of forming a semiconductor thin line by ion-implanting and heat-treating the sawtooth-shaped step, and a step of forming a semiconductor layer on the upper surface of a superlattice layer including the semiconductor thin line, Forming a second clad layer on the upper surface of the semiconductor layer; and forming a cap layer on the upper surface of the second clad layer.

In the above method for manufacturing a superlattice element, a metal organic chemical vapor deposition method or a migration enhanced epitaxy method is used as a method for forming a semiconductor layer.

[Action]

Quantum thin wires having extremely uniform cross-sectional dimensions are formed at high densities on the sawtooth-shaped steps.

〔Example〕

Reference Example 1 First, a reference example will be described with reference to the drawings in order to facilitate understanding of the present invention. 1 (a) and 1 (b) are cross-sectional views of a superlattice element showing Reference Example 1. FIG. Here, FIG.
Shows an enlarged structure of a portion A in FIG. In the figure, 1 is an n-type GaAs substrate, 2 is a buffer layer, and 6 is an n-type Al
_0.4 Ga _0.6 As clad layer, 7 is a superlattice layer composed of n-type Al _0.4 Ga _0.6 As layer 11, undoped Al _0.1 Ga _0.9 As layer 12, and GaAs quantum wire 16, 8 is p-type AlGaAs clad layer, 9 is P −GaAs
A cap layer, 30 is a p-type electrode layer, and 31 is an n-type electrode layer.
Reference numeral 17 denotes an undoped Al _0.2 Ga _0.8 As corresponding to a semiconductor layer.
The layer 18 is a p-type Al _0.2 Ga _0.8 As layer, and the numeral 19 is a p-type Al _0.4 Ga _0.6 As layer.

Next, FIGS. 2 (a) to 2 (d) are cross-sectional views of relevant parts showing the steps of manufacturing the superlattice element in FIG. First, GaAs
On the substrate 1, two buffer layers of n-type GaAs or GaAs-AlGaAs are grown. Thereafter, an n-type Al _0.4 Ga _0.6 As cladding layer 6 is grown to a thickness of 2 μm by a molecular beam epitaxy method or a metal organic chemical vapor deposition method, and then a 5 nm undoped Al _0.1 Ga _0.9 As layer 1 is formed.
A superlattice layer 7 composed of alternating layers of 2 and 25 nm n-type Al _0.4 Ga _0.6 As layers 11 is grown to a thickness of 0.1 to 1 μm. Then, as a protective layer for the etching process described below, 0.1 to 0.5 μm
A GaAs layer 10 is grown.

Next, this substrate is processed into a shape shown by a broken line A in the same drawing (a) by a photolithography process and an etching process, and the cross section of the superlattice layer 7 is formed on the side of the mesa (oblique side)
To form the structure that appears. Then, only the n-type Al _0.4 Ga _0.6 As layer 11 is selectively etched with a hydrofluoric acid-based etchant to form a saw-toothed step on the side surface of the mesa as shown in an enlarged view in FIG. The GaAs layer 10 is entirely removed in this step. After this step, as shown in FIG. 3C, a Ga molecular beam flying from the direction shown by arrow 14 and an As molecular beam flying from the direction shown by arrow 14 or 15 are used by molecular beam epitaxy. Undoped Al _0.1 Ga _0.9 As layer 12
The GaAs quantum wires 16 are grown using the protruding portion, that is, the step 12a as a mask. Thereafter, similarly to FIG. 9C, a molecular beam epitaxy method using Ga and Al molecular beams flying from the direction shown by arrow 15 and As molecular beams flying from the direction shown by arrow 14 or 15, or Horikoshi. And others (Jpn.J.Appl.Phys.Vol.25 L868 [1986]), a migration enhanced epitaxy method (MEE).
Method) or metal organic chemical vapor deposition (MOCVD)
An undoped Al _0.2 Ga _0.8 As layer 17 is formed as shown in FIG. Subsequently, the p-type Al _0.2 Ga _0.8 As layer 18 and the p-type Al
_{A 0.4} Ga _0.6 As layer 19 is grown. Here, MEE method and MOCVD
In the method, since the mobility of atoms or molecules contributing to crystal growth on the growth surface is large, a high-quality layer is obtained in the growth of the undoped Al _0.2 Ga _0.8 As layer 17, which is a growth on a surface with significant irregularities. There is an advantage that it is easy. Thereafter, although not shown, a p-type AlGaAs cladding layer 8 and a P-GaAs cap layer 9 are formed on the upper surface of the superlattice layer 7 and a p-type electrode layer is formed.
30 and an n-type electrode layer 31 are formed.

The holes and electrons injected from the p-type and n-type electrode layers 30 and 31 emit recombination light in a potential well formed by the GaAs quantum wires 16 embedded in the undoped Al _0.2 Ga _0.8 As layer 17. Then, this light is irradiated with undoped Al _0.2 Ga _0.8 As layer 17 having a lower refractive index than the surrounding cladding layer and p-type Al
_It is confined in the _0.2 Ga _0.8 As layer 18 and emits laser light.

In the first embodiment, the cross-sectional dimension of the GaAs quantum wire 16 which is the most important parameter of the quantum well wire can be accurately determined. That is, since each molecular beam in the molecular beam epitaxy method goes straight in a vacuum, the deposition amount is Ga in the case of GaAs.
It is determined by the supply amount of the molecular beam. Therefore, the width of the GaAs quantum wire 16 is determined by the mesa angle, the period of the superlattice layer 7, the Ga molecular beam 14
The height of the GaAs quantum wire 16 is determined by the supply amount of the Ga molecular beam from the arrow 14 shown in FIG. 2 (c). The height of the GaAs quantum wires 16 and the period of the superlattice layer 7 can be controlled with a precision of one atomic layer.
In addition, the angle of the mesa can be accurately controlled by using a facet having a low index surface. Further, in contrast to the structure in which the GaAs layers 63 (quantum fine wires) shown in FIG.
In this case, since they are arranged three-dimensionally, there is also an advantage that the fine line density in the active layer can be increased.

As is apparent from these results, in Reference Example 1, the fluctuation of the dimension of the thin wire that determines the quantization level of the quantum wire is extremely small and uniform over the entire active layer of the laser. Can be realized.

If the quantum level energy of two-dimensional electrons and holes confined in the undoped Al _0.1 Ga _0.9 As layer 12 is larger than the quantum level energy of one-dimensional electrons and holes confined in the GaAs quantum wires 16, the undoped Al _0.1 Ga _0.9 As layer
12 may be replaced by a GaAs layer.

Reference Example 2 Next, a second reference example will be described. In Reference Example 2, Asai et al. Reported the structure shown in FIG. 3 (Appl. Phys. Lett. 51 No.) instead of the shape shown by the wavy line A in FIG. .9 1518 [1987]), and the same steps as in Reference Example 1 are carried out thereafter. The structure in FIG.
0) An SiO 2 stripe 21 is formed in the (110) direction on the surface of the n-type Al _0.4 Ga _0.6 As layer 20 grown on the GaAs substrate,
This is to grow a superlattice layer 22 corresponding to the superlattice layer 7 in FIG. Here, according to the metal organic chemical vapor deposition method, Si
Since the crystal does not grow on the O ₂ stripe 21, the facet growth of the (111) plane can be achieved by appropriately setting the growth conditions, so that the structure shown in FIG. 3 can be obtained. In the subsequent step of MBE growth, a polycrystalline layer grows at the initial stage of growth on the SiO ₂ stripe 21, but the surrounding single crystal layer becomes dominant in subsequent growth by reducing the stripe width, There is no problem because it is covered with single crystal.

Reference Example 3 Next, a third reference example will be described. In the reference example 3, a GaAs layer is grown instead of the n-type Al _0.4 Ga _0.6 As layer 11 constituting the superlattice layer 7 or 22 in the first and second reference examples. Then, after the mesa etching step, the GaAs layer is selectively etched with a mixed solution of ammonia and hydrogen peroxide solution, and a sawtooth-shaped step is formed using the undoped Al _0.1 Ga _0.9 As layer 12 as a mask. Next, In _x Ga _{1 -x} As to which In is added instead of the GaAs quantum wires 16 is used. In this case, the composition X of InAs indicates that the light emission from the quantum wire
Alternatively, it is necessary to set a value that is not absorbed by 22.

Reference Example 4 Next, a fourth reference example will be described. The fourth embodiment is different from the first and second embodiments in that the undoped Al _0.1 Ga _0.9 As layer 12 constituting the superlattice layer 7 or 22 is replaced with Al _0.4 Ga _0.6 As.
The n-type Al _0.4 Ga _0.6 As layer 11 is replaced with n-type Al
_This is obtained by growing a _0.1 Ga _0.9 As layer. Then, after the mesa etching step, the sample is loaded into a molecular beam epitaxy apparatus, and a heat treatment is performed while supplying an As molecular beam.
The Al _0.1 Ga _0.9 As layer is selectively etched. Thus, a saw-toothed step is formed using the Al _0.4 Ga _0.6 As layer as a mask. Here, it is said that when the composition ratio X of AlAs is large, a high-quality epitaxial layer is difficult to obtain due to oxidation when the regrowth on the Al _x Ga _1-x As layer is performed. Since this is performed in an ultra-high vacuum, this problem can be avoided, and a high-quality quantum wire 16 can be obtained.

Reference Example 5 Next, a fifth reference example will be described. In the fifth embodiment, a heat treatment in the molecular beam epitaxy apparatus shown in the fourth embodiment is used instead of the method of selective etching of the GaAs layer in the third embodiment.

Embodiment 1 Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
FIG. 4 is a partial sectional view of a superlattice element showing an embodiment according to the present invention. Here, as in FIG. 2D in Reference Example 1, a saw-tooth structure is shown. 20nm p
A superlattice composed of alternating layers of the p-type GaAs layer 24 and the p-type Al _0.4 Ga _0.6 As layer 23 of 30 nm is grown, and then a sawtooth step is formed by the method of the first reference example. Next, Si ions of 10 to 20 kV are implanted from the direction indicated by the arrow 27 to modify a part 25 of the GaAs layer 24 to an n-type conductivity type. Then, by growing the p-type GaAs layer 26, a structure in which the n-type GaAs thin line is surrounded by the p-type GaAs layer is formed.

In this embodiment, the holes spread in the p-type regions 24 and 26 and are not confined inside the fine wire structure, but the electrons are n-type fine wires.
It is confined to 25 and is expected to be applied as a one-dimensional electron.

As described above, the superlattice element of the present embodiment can form quantum wires with extremely uniform cross-sectional dimensions at a high density, so that the characteristics of the superlattice element can be remarkably improved.

In the above embodiment, GaAs-
Although the case of using the Al _x Ga _1-x As system has been described, InP-In _x Ga
_1-x As _y P _1-y system, GaAs-In _x Ga _1-x As system, and In _x Ga _1-x
Other material combinations such as As-Al _y Ga _1-y As may be used.

〔The invention's effect〕

As described above, according to the present invention, quantum wires having extremely uniform cross-sectional dimensions can be formed at a high density, and therefore, the present invention has the following excellent effects.

(1) A quantum well laser having an extremely low threshold current can be realized.

(2) A laser having a wide modulation bandwidth and a narrow spectral line width can be obtained.

(3) An FET element having a channel layer with extremely high mobility can be realized.

[Brief description of the drawings]

1 (a) and 1 (b) are cross-sectional views of a superlattice element showing a first reference example of the present invention, and FIGS. 2 (a) to (d) are cross-sectional views of main parts showing a manufacturing process of the superlattice element. FIG. 3 is a sectional view of a principal part of a superlattice element according to a second embodiment of the present invention. FIG. 4 is a sectional view of a principal part of a superlattice element according to an embodiment of the present invention. )
(D) is an explanatory diagram schematically showing a density of states function, FIG.
The figure is a sectional view of a conventional superlattice element. 1 ... n-type GaAs substrate, 2 ... buffer layer, 6 ... n-type Al
_0.4 Ga _0.6 As cladding layer, 7 superlattice layer, 8 AlGaAs
Cladding layer, 11 n-type Al _0.4 Ga _0.6 As layer, 12 undoped Al _0.1 Ga _0.9 As layer, 16 GaAs quantum wire, 17 undoped Al _0.2 Ga _0.8 As layer.

Claims (2)

(57) [Claims] A step of forming a buffer layer on an upper surface of a semiconductor substrate; a step of forming a first cladding layer on the upper surface of the buffer layer; and at least two types of semiconductors on the upper surface of the first cladding layer. Forming a superlattice layer composed of alternating layers of: a step of forming an inclined surface of the superlattice layer by an etching process or selective growth; and a step of forming a sawtooth-shaped step on the oblique side of the superlattice layer. Forming a semiconductor thin line by ion-implanting and heat-treating the sawtooth-shaped step; forming a semiconductor layer on the upper surface of the superlattice layer including the semiconductor thin line; and upper surface of the semiconductor layer Forming a second cladding layer, and forming a cap layer on the upper surface of the second cladding layer. 2. A method for manufacturing a superlattice element according to claim 1, wherein a metal organic chemical vapor deposition method or a migration enhanced epitaxy method is used as a method for forming a semiconductor layer.