JPH0640074A - Image printing mehtod and nonimpact printer employing the method - Google Patents

Abstract

PURPOSE:To make printing with a printer equipped with a printer head having small resolving power executed without marring picture quality by a method wherein data for calculated dot numbers are converted into gradation data signals corresponding to driving energy per dot to be printed. CONSTITUTION:A gradation data producing device 44 takes in signals for 4 dots X 4 lines, namely for 16 dots, in the direction of raster formed of output signals a-d outputted from each of stages of a selector 38 and latch circuits 41-43, and outputs gradation data signals 45a, 45b, 45c and 45d corresponding to weights in level 8, level 4, level 2 and level 1. A selector 46 selects real printing data signals 18 successively out of the gradation data signals 45a-45d. For latching the real printing data 18 outputted from the selector 46 to each line of LED heads, latch signals 17 that are composed of signals in the same frequency as line timing signals 12a and are outputted from a line timing signal generator 30 are used. The gradation data producing device 44 produces signals corresponding to dot numbers of inputted video signals.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image printing method and a non-impact printer.

[0002]

2. Description of the Related Art A non-impact printer represented by an electrophotographic printer receives print information from a host controller such as a microcomputer or workstation, and prints with a print head such as an LED head. When the information received by the non-impact printer from the host controller is a character code, the printing is performed with a resolution that matches the print head by developing the character code and the resolution of the print head that are specified in advance.

[0003]

On the other hand, when the non-impact printer receives a gradation image data signal (hereinafter referred to as a video signal) like a photograph from the host controller, the resolution edited by the host controller is , There is no problem if the resolutions of the heads of the non-impact printer match, but if they do not match, there is a problem. For example, when a non-impact printer having a print head resolution of 300 DPI receives a video signal edited to 1200 DPI from a host controller, the resolution is 1/4 in both the raster direction and the paper feed direction, and is 1/16 in the vertical and horizontal directions. The resolution deteriorates.

An object of the present invention is to prevent the print quality of a printer from being significantly degraded even when a video signal having a resolution higher than that of a print head is received and printing is performed with a smaller number of dots than an image created by a host controller. To obtain an image printing method.

[0005]

According to the present invention, there is provided a method of printing an image by using a print head having a raster direction resolution smaller than a resolution of a video signal forming an image to be printed. Of the dot matrix of the video signal corresponding to the dots, the number of dots corresponding to the signal to be printed is calculated, and the gradation data signal corresponding to the driving energy per dot printed by the print head is calculated based on the number of dots. An image printing method comprising a step of converting and a step of driving the print head using the gradation data signal.

According to the present invention, a buffer for storing M (M is a positive integer) lines of a video signal composed of an image whose resolution in the raster direction is N (N is an integer of 2 or more) times the resolution of the print head, A dot converter that sequentially extracts the stored video signals by N × M dots and converts them into 1-dot actual print data signals having L (L is an integer of 2 or more) gradation, and inputs the actual print data signals A non-impact printer having a print head for printing dots of L gradation.

The present invention provides a means for generating a basic line timing signal, a means for generating an additional line timing signal between each basic timing of the basic line timing signal, and a ratio of the resolution of the video signal to the resolution of the printing section. A dot converter that forms a dot matrix by a video signal of a corresponding number of lines and creates a gradation data signal corresponding to the data signal of the dot matrix;
A non-impact printer having a print head that drives a print head element by head drive energy set corresponding to a gradation data signal at the basic line timing and the additional line timing.

According to the present invention, means for generating a basic line timing signal, means for generating an additional line timing signal between respective basic timings of the basic line timing signal, and a video signal constituting gradation information are inputted. A non-impact printer including a print head that drives a print head element by the head drive energy set corresponding to the gradation data at the basic line timing and the additional line timing.

[0009]

According to the present invention, when printing an image using a print head having a raster direction resolution smaller than the resolution of a video signal constituting the image to be printed, each of the basic line timing signal and the basic timing signal is An additional line timing signal is generated during the timing, and a matrix is formed by the video signals of the number of lines corresponding to the ratio of the resolution of the video signal and the resolution of the printing unit, and this matrix forms the gradation of the dots of the matrix. A 1-dot gradation data signal having the following is created, and the print head is driven by the head drive energy set corresponding to the gradation data signal. As a result, the number of dots forming an image is reduced, so that the information amount is reduced and the resolution is reduced. On the other hand, the reduced dot information is converted into gradation information, so that the information amount is less reduced. Has the effect of becoming.

[0010]

【Example】

[First Embodiment] FIG. 1 is a block diagram of a control circuit of a non-impact printer showing a first embodiment of the present invention. In FIG. 1, the non-impact printer includes a print control unit 1
And an LED head 19. The print control unit 1 is composed of a ROM, a RAM, an input / output port, a timer circuit, etc. (not shown) or a logic circuit having a function equivalent to that, and is output from a host controller such as a personal computer or a workstation. The control signal 10 and the video signal 11 are input via an interface section (not shown), the print data conversion circuit 40 outputs the timing signal 12 to the host controller, and the LED head 19 receives the print drive signal 13 and the actual print data. Signal 18, clock signal 18a,
And a latch signal 17 are output. This makes this LE
The D head 19 is selectively turned on to form an electrostatic latent image on the developing device 27.

In addition to the input of the control signal 10 and the video signal 11 output from the host controller, the print control unit 1 has a paper inlet sensor 6, a paper outlet sensor 7 and a paper remaining amount provided in the non-impact printer itself. The sensor 8, the sheet size sensor 9, and the fixing device temperature sensor 29 detect the state of the non-impact printer itself to detect whether it is in a printable state. Then, for example, when the temperature of the fixing device 22 is lower than the set temperature, the print control unit 1 outputs the heater signal 21 to turn on the heater 22a and heat it to a printable temperature. In a printable state, the print control unit 1 outputs a drive signal to the driver 2 to rotate the developing / transferring process motor 3, and at the same time outputs a charge signal 23 to the charging high-voltage power supply 25 to output the developing device 2
7 is charged, the charge signal 24 is output to the high-voltage power supply 26 for transfer, and the transfer device 28 causes the developing device 27 to operate.
The toner image formed above is transferred onto a sheet.

The paper is supplied by the print controller 1 outputting a drive signal to the driver 4 and rotating the paper feed motor 5. The print control unit 1 determines the type of the set paper by the remaining paper amount sensor 8 and the paper size sensor 9.
Then, the paper feed suitable for the paper is started. Specifically, the print control unit 1 can bidirectionally rotate the paper feed motor 5 via the driver 4, and the paper set by rotating the paper feed motor 5 in the reverse direction first is reversed.
The sheet is fed by a preset amount until it is detected, and then a gear (not shown) is switched and forwardly rotated to convey the sheet to the printing mechanism of the printer. The print control unit 1 transmits a timing signal 12 (including a line timing signal and a video signal transfer clock signal) to the host controller when the paper reaches the printable position, and the video signal 11 is synchronized with the timing signal 12. To receive. Edited for each page by the host controller,
The video signal received by the print control unit 1 is converted into an actual print data signal 18 by the print data conversion circuit 40 and sent to the LED head 19.
As a result, an electrostatic latent image is formed on the developing device 27 as described above. The print control unit 1 fixes the transferred toner image on the conveyed sheet by the heat of the fixing device 22, and the sheet is fed to the outside of the printer by the sheet feed motor 5 via the sheet discharge port sensor 7.

The LED printer used here is an LED consisting of an LED array having a raster direction resolution of 300 DPI.
Since the head is used, the physical resolution is 300 DPI, and the resolution in the raster direction of the video signal 11 received by the LED printer from the host controller is 1200 DP.
An example will be described where I and 1200 DPI in the paper feed direction. In such a case, the print data conversion circuit 40 outputs the video signal 11 of 1200 DPI to 300 DP.
It is necessary to convert into the I actual print data signal 18. At this time, the resolution in the raster direction and the resolution in the paper feed direction are both reduced from 1200 DPI to 300 DPI and become 1/4 each. Therefore, the area is 1/16. In order to compensate for this and print a clear gray scale, the print data conversion circuit 40 of this embodiment uses the actual print data signal 18
As a result, the gradation data signal 45 of 16 gradations is output.

The print data conversion circuit 40 will be described with reference to FIG. The print data conversion circuit 40 has the following configuration. First, the print data conversion circuit 40 uses the video signal 11
33 as an input section of the four line buffer 31,
It has a 4-line buffer 32 and a selector 38. Four
The line buffer 31 and the 4-line buffer 32 store the video signal 11 input via the selector 33 by 4 lines in the raster direction. The selector 33 is provided on the input side of these 4-line buffers 31 and 32, and assigns the output destination to the 4-line buffer 31 or 32 each time the video signal 11 is output by 4 lines in the raster direction. The selector 38 selects the buffer 32 when the buffer 31 is selected by the selector 33, and selects the buffer 31 in the opposite case. The selector 33 sequentially inputs the serial video signal 11 and sequentially outputs the video signal 11 line by line to the 4-line buffer 31 or 32.
Lines are input in parallel and four lines are output in parallel to the latch circuit 41 in the subsequent stage.

Next, the print data conversion circuit 40 generates a line timing signal generator 30 for generating a timing signal for processing the video signal 11 for each line, and a clock signal for processing for each dot. Clock signal generator 34 for, and this clock signal generator 34
It has a counter 35 and a frequency divider 48 for processing the output signal of. The line timing signal generator 30 outputs the video signal 1
In order to transfer 1 from the upper controller to the print control unit 1 for each line, a line timing signal 12a for outputting 1 pulse corresponding to 1 line is output. The clock signal generator 34 generates the video signal transfer clock signal 12b in which one pulse is output corresponding to one dot in order to transfer the video signal 11 from the host controller to the print controller 1 for each dot. The line timing signal 12a is input to the selectors 33 and 38, and the selectors 33 and 38 feed the video signal 1 to the 4-line buffer 31 or 32.
It is used to switch the input / output destination in order to input / output 1 every 4 lines. The counter 35 inputs the video signal transfer clock signal 12b and sequentially increments the storage address of the video signal 11 stored in each of the 4-line buffers 31 and 32. The frequency divider 48 inputs the video signal transfer clock signal 12b, divides it into quarter frequencies, and outputs the clock signal 1 corresponding to the actual print data signal 18.
8a is generated.

Next, the print data conversion circuit 40 uses the latch circuits 41 to 43 for cutting the video signal 11 in parallel in the raster direction by 4 dots, and the gradation data signal 45 is generated by using these output signals. Key data generator 4
4 and the gradation data signal 45 are selected and the actual print data signal 1 is selected.
It has a selector 46 for outputting 8. Latch circuit 41 to
Reference numeral 43 inputs the video signal 11 stored in either one of the four-line buffers 31 or 32 in parallel via the selector 38 for every four lines and stores it. These 4
Line buffers 31, 32 and latch circuits 41-43
Inputs the video signal transfer clock signal 12b and transfers the video signal 11 dot by dot in the raster direction every clock. The gradation data generator 44 inputs a signal of 4 dots × 4 lines for a total of 16 dots in the raster direction, which is composed of the output signals a to d from the respective stages of the selector 38 and the latch circuits 41 to 43, and outputs the level 8, Grayscale data signals 45a, 45 corresponding to the weights of level 4, level 2 and level 1
b, 45c and 45d are output. The selector 46 sequentially selects the actual print data signal 18 from the gradation data signals 45a to 45d. In order to latch the actual print data signal 18 output from the selector 46 in the LED head 19 for each line, the latch signal 17 output from the line timing signal generator 30 and having the same frequency as the line timing signal 12a. Is used.

The operation of the print data conversion circuit 40 is shown in FIG.
Will be described in more detail with reference to FIGS. 3 to 8. 3 and 8 are time charts of the print data conversion circuit 40. The line timing signal 12a is set to 1 every time one line of the video signal 11 is requested from the host controller.
The video signal 11 is output pulse by pulse, and the video signal 11 including a data signal group including the number of dots 10240 corresponding to one line is input to the selector 33 during this one pulse. The video signal 11 is to be edited and output for each page by the host controller, and the video signal 1
Similarly, one individual data signal is composed of 10240 clocks, and one dot of the video signal 11 corresponds to one pulse and corresponds to the timing of the video signal transfer clock signal 12b.

The selector 33 receives the line timing signal 12a shown in FIG.
Every time 4 pulses of a are input, the output destination of the input video signal 11 is set to the 4 line buffer 31 and the 4 line buffer 32.
Switch to one of. The serial video signal 11 input to the selector 33 is the 4-line buffer 31 or 3
Sequentially stored in 2. For example, the selector 33 selects the 4-line buffer 31 to select TA1, TA2,
When four lines of the video signal 11 are output at four line timings of TA3 and TA4, the four line buffer 3
Since 1 is full, the 4-line buffer 32 is selected at the next 4 line timings of TB1, TB2, TB3 and TB4.

The selector 38 similarly inputs the line timing signal 12a shown in FIG. 2, and every time 4 pulses of this line timing signal 12a are input, the input source of the input video signal 11 is the 4 line buffer 32 and the 4 line buffer. Switch to any of 31. 4 to select at this time
The line buffer is selected by the selector 33 at the same time 4
4 line buffer 3 which is the reverse of line buffer 31 or 32
2 or 31. The selector 38 selects (n-4) to (n-1) from the 4-line buffer selected as shown in FIG.
The video signals 11 for four lines are taken out at once as parallel signals and output to the latch circuits 41 to 43 in the subsequent stage. The outputs of the selector 38 and the latch circuits 41 to 43 are output to the gradation data generator 44 as signals a to d. For example, the selector 33 is a 4-line buffer 3
When selecting 2 and inputting the video signal 11 sent from the host controller at the line timing of TB1 shown in FIG. 3, the selector 38 selects the 4-line buffer 31 and is inputted in advance over the timing of TA1 to TA4. The video signal 11 present is read over all the lines during the line timing of one pulse. Similarly, when the selector 33 inputs the video signal 11 sent from the host controller at the line timing of TB2 to the 4-line buffer 32, the selector 38 is input from the 4-line buffer 31 in advance at the timing of TA1 to TA4. The video signal 11 present is read over all the lines during one line timing. That is, the selector 38 reads the video signal 11 for four lines, which has been input in advance by the selector 33 at the timing of four lines, four times in parallel at the timing of one line. The video signal 11 read by the selector 38 is TB1 ...
It is the same at each line timing of TB4.

Here, the selector 33 and the selector 38 shown in FIG. 2 are controlled so that the four line buffers to be selected do not overlap each other. With this, while inputting the video signal 11 to the four line buffer 31, the four line buffers are input. The video signal 11 stored in 32 can be output to the latch circuits 41 to 43. That is, since the video signal 11 can be input to the 4-line buffer 31 or 32 and the video signal 11 can be output from the 4-line buffer 32 or 31 at the same time, high-speed input / output is possible.

Since the output signals a to d of the selector 38 and the latch circuits 41 to 43 are signals for 4 dots in the paper feed direction and 4 lines for each raster direction, they are input to the gradation data generator 44. The signals are 16 dots of 4 × 4 dots of 11 video signals.

FIG. 4 is a relationship diagram between the number of print dots input to the gradation data generator 44 and the gradation data 45 composed of binary data output from the gradation data generator 44. The gradation data generator 44 generates the gradation data signals 45a to 45d according to the number of dots of the input video signal 11. This can be created by logic according to the table shown in FIG. In this table, each gradation data signal 45
Is a signal corresponding to each digit obtained by converting the number of print dots into a binary data signal. Here, the gradation data signal 45 of the number of print dots 15 and the number of print dots 16 are the same because there are 17 different combinations of the number of print dots 0 to 16, but this is a 4-bit binary. This is because if the data is represented, the corresponding binary data is insufficient. Since the number of printed dots 15 and the number of printed dots 16 are practically almost the same, the same binary data is used. This will be described with reference to the example shown in FIG.

FIG. 5 is an explanatory diagram of the video signal 11 sent from the host controller. From the host controller 10
1200DP consisting of 240 dots x 12580 dots
When the I video signal 11 is input, each dot of the actual print data signal 18 of 300 DPI corresponds to each dot matrix M1 to M4 ... Of 4 rows × 4 columns. The number of dots of the video signal 11 of the dot matrices M1 to M4 is 5, 6, 4 and 3 when the bits are added, and the corresponding binary data signals (45a, 45b, 45c, 45)
d) is (0, 1, 0, 1), (0,
1,1,0), (0,1,0,0), (0,0,1,
1). As a concrete circuit of such a gradation data generator 44, an adder which inputs 16 bits in parallel and outputs the addition result can be used. 16
When all inputs are logic "H", the sum is 16 and (0,0,0,0) is output, but the output is (1,1,1,1) due to the carry signal. ) May be provided with an additional circuit.

FIG. 7 is a diagram showing an example of gradation level types and gradation level settings. The selector 46 inputs the line timing signal 12a, and the grayscale levels corresponding to the grayscale drive dots of (grayscale level 8, grayscale level 4, grayscale level 2, grayscale level 1) shown in FIG. The data signals (45a, 45b, 45c, 45d) are sequentially selected at each line timing and output as serial data. still,
In FIG. 7, the size of the circle represents the size of the LED head driving energies E1 to E4 and does not completely match the image actually printed (hereinafter referred to as "actual print image"). In reality, a print image having a large gradation level is slightly elliptical because the paper is fed during the exposure time. The gradation data signal 45 corresponds to the LED head drive energies E1 (45a), E4 (45d) and E3 shown in FIG. 3, respectively.
(45c) and E2 (45b), selector 46
Outputs the gradation data signal 45 corresponding to the LED head drive energy of E1, E4, E3, and E2 as the serial actual print data signal 18 sequentially at each line timing of TB1, TB2, TB3, and TB4.

The LED head 19 receives the actual print data signal 18 shown in FIG. 3 and latches it in an internal latch circuit (not shown) by the latch signal 17 to generate light corresponding to the LED head driving energy E1 to E4 at each line timing. An image consisting of dots for one line is formed on the photosensitive drum when it is output four times. This actual print data signal 18
Has a density of 1/4 in the raster direction with respect to the video signal 11, and therefore the clock signal for printing each dot is obtained by dividing the video signal transfer clock signal 12b into a 1/4 frequency by the frequency divider 48. Has become. However, in the paper feed direction, the density of the print data signal changes to 1/4, but since four gradation data signals are repeatedly printed per dot, in addition to the basic line timing as shown in FIG. Since the additional line timing, the second additional line timing, and the third additional line timing are required, the latch signal 17 having the same frequency as the line timing signal 12a can be used.

FIG. 6 shows the actual print data signal 1 when the video signal created by the gradation data creator 44 is printed on the paper.
FIG. 8 is an exploded view of FIG. 8.
The dot matrix M1, M2, M3, M4 in FIG. 5 corresponds to one dot D1, D2, D3, D4, and each dot D has a gradation level 8 (45a) and a gradation level 1 (45d). , Gradation level 2 (45c), gradation level 4
4 dots for each gradation of (45b) in units of one line
Printed repeatedly. Printing is done by arrow 1 including D1 and D2
The gradation level 8 of the line is first printed, and then the gradation level 1, the gradation level 2, and the gradation level 4 are sequentially printed. Next, the line of arrow 2 including D3 and D4 is similarly printed in the order of gradation level 8, gradation level 1, gradation level 2 and gradation level 4.

Here, the gradation data signal 45 which is a binary data signal output from the gradation data generator 44
It is possible to arbitrarily set the gradation level output from the LED head 19 in correspondence with a to 45d, but in the present embodiment, the gradation level 8 is set to the gradation data signals 45a, 45b, 45c and 45d. , Gradation level 4, gradation level 2
And the gradation level 1 are set. With this combination, the gradation level 0 shown in FIG. 7 (b) (the gradation level that is not printed)
16 gradations up to gradation level 15 can be continuously specified. It should be noted that from the grayscale data signal 45, the grayscale data signals 45a, 45d, 45c and 45b are selected in this order, and the LED head drive energy E1, shown in FIG.
Since E4, E3, and E2 are controlled so as to be applied to the LED head 19, the light emission time at the time of printing the gradation levels of the second line and the third line is short, and the actual print data using the time when no light is emitted is used. Transfer time can be extended,
The problem that the actual print image is divided into two due to waiting for the data transfer time is eliminated.

In the present embodiment, even when the LED head 19 having only the latch circuit for the print data signal for one line is used, as shown in FIG. 7A, in addition to the basic line timing, Since the grayscale data signals 45a to 45d can be sequentially input and the light emitting elements can be driven at the first to third additional line timings, the inexpensive LED head 19 having a small number of latch circuits can be used. vice versa,
When the LED head 19 having a plurality of stages of latch circuits is used, the selector 46 becomes unnecessary and the 4-bit grayscale data signals 45a to 45d are converted into parallel data at one time only by the basic line timing.
It can be transferred to the latch circuit of the head. At this time, light emission of each gradation level can be performed at any line timing.

In the image printing method described in this embodiment, in a non-impact printer having a page editing function, an image data signal is created at a resolution higher than the resolution of the printing unit in the page editing unit, and the generated image data signal is subjected to the above-mentioned processing. It can also be used to perform such processing, and even a printer using print heads of the same resolution can obtain a printer with good print quality.

[Second Embodiment] FIG. 10 is a time chart of the print data conversion circuit 40. In the first embodiment, as shown in FIG.
A 0 DPI video signal is input as a 1200 DPI line timing signal, converted to a 16-gradation actual print data signal 18 at 300 DPI, and printing is performed in the paper feed direction at each gradation with the latch signal frequency having the same frequency as the 1200 DPI line timing signal. While the dots are printed uniformly, the second embodiment of the present invention similarly
Input a video signal of 200 DPI and 16 at 300 DPI.
Printing is performed by converting into the actual print data signal 18 of gradation, but as shown in FIG. 10, printing of dots of all gradation data can be completed at the first portion in the paper feeding direction at the time of printing.

FIG. 9 is a block diagram of the print data conversion circuit 40 of the non-impact printer showing the second embodiment of the present invention. FIG. 13 is a more detailed time chart of the print data conversion circuit 40. As can be seen from FIGS. 9 and 13, the difference from the print data conversion circuit 40 according to the first embodiment of the present invention is that a read counter 61 is used as a counter for addressing the 4-line buffer 31 and the 4-line buffer 32. A write counter 62 is provided, the line timing signal generator 30 outputs the batch additional line timing signal 12d in addition to the line timing signal 12a, and the clock signal generator 34 adds internal data transfer in addition to the video signal transfer clock signal 12b. Signal 12e (1/4 in batch clock signal 18d
The clock signal before frequency division) is output. As shown in FIG. 10, the batch clock signal 18d, the batch latch signal 17d, and the batch addition timing signal 12d are all the first half of the timing for feeding the paper when the resolution is 300 DPI, that is, the basic line timing (that is, the additional line timing 12d in FIG. 10). (The first clock of the) is output so as to concentrate in the vicinity. This allows
The actual print data signal 18 is concentrated near the basic line timing, and the LED head driving energy is also concentrated near the basic line timing.

The operation of the print data conversion circuit 40 is shown in FIG.
Will be described in more detail with reference to FIGS. 10 to 13. As shown in FIGS. 10 and 13, the line timing signal 12a is output one pulse per line,
During this one pulse, the video signal 11 including a data signal group including the number of dots 10240 corresponding to one line is input to the selector 33 as in the first embodiment. The video signal 11 is to be edited and output for each page by the host controller, and the video signal 1
Similarly, one individual data signal is composed of 10240 clocks, and one dot of the video signal 11 corresponds to one pulse and corresponds to the timing of the video signal transfer clock signal 12b.

The selector 33 shown in FIG. 9 receives the line timing signal 12a and inputs the line timing signal 12a.
Each time 4 pulses of a are input, the output destination of the input video signal 11 is set to the 4 line buffer 31 and the 4 line buffer 32.
Switch to one of. The serial video signal 11 input to the selector 33 is the 4-line buffer 31 or 3
Sequentially stored in 2.

The selector 38 outputs the line timing signal 12
Similarly, every time 4 pulses of this line timing signal 12a are input, the input destination of the input video signal 11 is switched to either the 4 line buffer 32 or the 4 line buffer 31. The 4-line buffer selected at this time is a 4-line buffer that is the reverse of the 4-line buffer selected by the selector 33 at the same time. This selector 38
Outputs the video signals 11 for four lines from the selected four-line buffer as a parallel signal at a time as shown in FIG. 13, and outputs them to the latch circuits 41 to 43 in the subsequent stage. The output of the selector 38 and each of the latch circuits 41 to 43 is the signal a.
Is output to the gradation data generator 44 as a signal d.

The 4-line buffer 31 and the 4-line buffer 32 shown in FIG.
Although 1 is input and output by the selector 38, unlike the first embodiment, it operates at different timings during input and output. For example, the 4-line buffer 3 shown in FIG.
The write counter 62 for incrementing the address of the 4-line buffer 31 when the video signal 11 is input to 1 is the same as the video signal transfer clock signal 12b of the first embodiment shown in FIG. The clock signal 12b is input and the 4-line buffer 31 is incremented. While the video signal 11 is input to one 4-line buffer 31, the stored video signal 11 is read from the other 4-line buffer 32, but the video signal 11 stored in the 4-line buffer 32 is input to the selector 38. When outputting, the read counter 6 for incrementing the address of the 4-line buffer 32
1 receives the internal data transfer signal 12e and controls the 4-line buffer 32. Conversely, when the video signal 11 is input from the selector 33 to the 4-line buffer 32 and the video signal 11 is output from the 4-line buffer 31 to the selector 38, the write counter 62 is set to the 4-line buffer 3.
2 is incremented and the reading counter 61 is switched to increment the 4-line buffer 31.

Here, the selector 33 and the selector 38 shown in FIG. 9 are controlled so that the four line buffers to be selected do not overlap, as in the first embodiment.

Since the output signals a to d of the selector 38 and the latch circuits 41 to 43 are signals for 4 dots in the paper feeding direction and 4 lines for each raster direction, they are input to the gradation data generator 44. The signals are 16 dots of 4 × 4 dots of 11 video signals. FIG. 11 is a diagram showing the relationship between the number of print dots input to the gradation data generator and the binary data signal output by the gradation data generator.
The gradation data generator 44 generates the gradation data signals 63a to 63d according to the number of dots to be input. This is Figure 1
It can be created by logic according to the table shown in FIG.
In this table, each gradation data signal 63 is a signal corresponding to each digit obtained by converting the number of print dots into a binary data signal, as in FIG.

FIG. 12 is a diagram showing an example of gradation level setting. The selector 46 has gradation data signals (63a, 63b, 63c, 63) corresponding to the respective gradation levels 8, gradation levels 4, gradation levels 2 and gradation levels 1 shown in FIG.
d) is continuously selected and serial actual print data signal 18
Is output.

As described above, the 4-line buffer 31 or 3
The internal data transfer signal 12e used to read out the video signal 11 stored in 2 is the latch circuits 41 to 4
3 is also supplied to the video signal 11 and the actual print data signal 18
It is also used for processing timing. That is, the internal data transfer signal 12e is used as a timing signal for transferring the actual print data signal 18 to the LED head 19 as shown in FIG. On the other hand, the LED head 1
The batch latch signal 17d for driving 9 is a timing different from the timing of transferring a group of data signals of the actual print data signal 18 to the LED head 19.
This is the timing at which the LED head 19 outputs the actual print data signal 18 to the shift register provided as the input buffer of the actual print data signal 18 output by the print data conversion circuit 40, and the latch provided as the output register of the LED head. This is because high-speed printing is possible by setting the timings at which the circuit outputs the LED drive signals separately. The time required for the LED head 19 to complete the printing for one line after receiving the actual printing data signal 18 for one line is generally the actual printing data signal 18
To the shift register for one line and L
This is the total time required for the ED head 19 to emit light energy for generating an electrostatic latent image on a photosensitive drum (not shown). On the other hand, if the actual print data signal 18 is received and the light energy is emitted from the LED head 19 at the same time, the time required for printing is shortened by the overlapping time. Specifically, the LED head 19 prints and drives the actual print data signal 18 corresponding to a predetermined gradation data signal, and at the same time, outputs the actual print data signal 18 corresponding to the gradation data signal to be printed next. I am receiving.

In the non-impact printer of this embodiment, as compared with the non-impact printer of the first embodiment, the dots forming each gradation are closer to each other, as shown in FIG. It becomes easy to print a dot having a size proportional to. From the above, the clock group of the internal data transfer signal 12e is the conversion speed of the video signal 11 to the actual print data signal 18 by the print data conversion circuit 40, the transfer speed at which the actual print data signal 18 is transferred to the LED head 19, and LE of LED head
Considering the performance of the D element, it is preferable to make them as close as possible.

[Third Embodiment] FIG. 15 is a time chart of the print data conversion circuit 40. In the second embodiment, as shown in FIG.
The video signal 11 of 00 DPI is input by the line timing signal 12 a of 1200 DPI, converted into the actual print data signal 18 of 16 gradations by 300 DPI, and the gradation data signal 63
The actual print data signal 18 in which each line is serially arranged
Is output and one dot is printed for each gradation data signal 63, whereas the third embodiment of the present invention is
Similarly, input the video signal 11 of 1200 DPI and input 300
The DPI is converted into an actual print data signal 18 of 16 gradations for printing, but as shown in FIG. 15, a 4-bit signal is output as the actual print data signal 18 and gradation printing is performed with only one dot. .

FIG. 14 is a block diagram of a print data conversion circuit 40 of a non-impact printer showing a third embodiment of the present invention. FIG. 18 is a more detailed time chart of the print data conversion circuit 40. As can be seen from FIGS. 14 and 15, the difference from the print data conversion circuit 40 according to the second embodiment of the present invention is that the gradation data signals 63a to 63d are replaced with the actual print data signals 18e to 18d without providing the selector 46.
LED head 1 as a 4-bit parallel signal as h
9 and that the additional line timing signal 12d is not required.

FIG. 16 shows such an actual print data signal 18
It is a circuit diagram of the LED head 19 for receiving and printing. The LED head 19 inputs a 4-bit shift register 70, a 4-bit latch circuit 71 connected to each subsequent stage of these shift registers 70, and a strobe signal falling at the time of printing permission shown in FIG. Differentiating circuit 77 for detecting falling time and rising time
And a strobe time counter 78 which inputs a strobe clock signal consisting of one set of 15 pulses, counts the number of clocks, and outputs a 4-bit binary data signal.
And a magnitude comparator 72 which receives the output signal of the latch circuit 71 consisting of 4 bits and the output signal of the strobe time counter 78 consisting of 4 bits and outputs the logic "L" only while the output of the strobe time counter 78 is small. The NOR gate circuit 73 which inputs the output of the comparator 72 and the strobe signal and outputs the logic "H" when both are logic "L", and the gate signal is logic "."
A transistor 74 that outputs a drive signal when it is "H";
It has an LED element 75 and a current limiting resistor 76 connected to the transistor 74.

The operation of the LED head 19 will be described. Figure 1
1 input to the print data conversion circuit 40 as shown in FIG.
The 200 DPI video signal is converted into the actual print data signals 18e to 18h, which are 4-bit gradation data signals, by the same operation as in the first embodiment. The 4-bit actual print data signals 18e to 18h are sequentially transferred to the shift register 70 at the timing of the clock signal 18a. At the timing when this transfer ends, the latch signal 17 is input to the latch circuit 71 and the shift registers 70a, 70
b, 70c ... Latches the output signal output from the subsequent stage. As a result, the actual print data signal 18 stored in the shift register 70 is also stored in the latch circuit 71, so that the actual print data signal 18 stored in the shift register 70 becomes rewritable and the actual print of the next line is performed. The data signal 18 can be input. Since the printing in the LED element 75 is performed by this latch data signal in the following, the input of the actual print data signal 18 to the LED head 19 and the light emission timing of the LED element 75 can be performed at different timings.

Here, the strobe signal is the LED element 75.
Is a signal that permits the emission of light. The strobe clock signal is a signal for dividing the light emission time by the LED element 75 into 15 equal parts. The strobe clock signal is input to the strobe time counter 78 as shown in FIG.
It outputs a bit binary data signal. This count is reset by the falling signal or the rising signal of the strobe signal by the differentiating circuit 77, and the strobe time is repeatedly counted. The magnitude comparator 72 inputs the 4-bit strobe time count signal and the 4-bit output signal of the latch circuit 71, and compares their logical values. While the logical value of the output signal of the strobe time counter 78 is smaller than the logical value of the output signal of the latch circuit 71, the magnitude comparator 72 keeps the logical value.
The LED element 75 is configured such that the output of the magnitude comparator 72 emits light only during the logic "L", so that when the value of the actual print data signal is the gradation level 1, the strobe clock signal is output. Light is emitted for 1 pulse, and similarly, for the gradation levels 2 to 15, light is emitted for 2 pulses from the strobe clock signal for 15 pulses, which corresponds to each gradation level as shown in FIG. It is possible to emit light by driving energy.

The NOR gate circuit 73 functions to drive the transistor 74 by inverting the output signal of the magnitude comparator 72, and the strobe signal has a logic "
It has a function of preventing the drive signal from being input to the transistor 74 even when the output signal of the magnitude comparator 72 becomes a logic "L" due to noise or the like when it is other than L ".

Compared to the non-impact printer of the second embodiment, the non-impact printer of this embodiment does not have dots forming each gradation as shown in FIG.
One dot having a size proportional to the gradation can be printed at the basic line timing for one actual print data signal 18, and the printing quality is further improved.

[Fourth Embodiment] The first embodiment is
A non-impact printer that connects to a host controller that outputs a video signal of 200 DPI, converts into an actual print data signal 18 of 16 gradations at 300 DPI and prints an actual image is taken as an example.
Connected to a host controller that outputs I gradation data,
A non-impact printer that prints an actual image of 300 DPI will be described.

FIG. 19 is a print data conversion circuit 40 in a non-impact printer according to the fourth embodiment of the present invention.
It is a circuit diagram of. The print data conversion circuit 40 inputs the 4-bit gradation video signals 11a, 11b, 11c and 11d output by the same processing as that of the gradation data generator 44 of the first embodiment from the upper controller and inputs the first data. The same signal as the actual print data signal 18 of the embodiment is output.

The print data conversion circuit 40 has the following configuration. First, the print data conversion circuit 40 includes a selector 33, a 4-bit line buffer 51, a 4-bit line buffer 52, and a selector 38 as an input unit of the gradation video signal 11. The 4-bit line buffer 51 and the 4-bit line buffer 52 are the 4-bit gradation video signal 1
1 is stored in parallel in the raster direction. Selector 33
Is provided on the input side of these buffers 51 and 52 and receives the gradation video signal 11 and distributes it to the buffers 51 and 52 each time one line is input. The selector 38 selects the buffer 52 when the selector 51 selects the buffer 51, and selects the buffer 51 in the opposite case. The selectors 33 and 38 both have a 4-bit gradation video signal 11 in parallel with a 4-bit line buffer 31.
Or input / output to / from 32.

Next, the print data conversion circuit 40 generates a timing signal for processing the gradation video signal 11 for each line, and a line timing signal generator 3 for generating the timing signal.
A clock signal generator for generating a clock signal for processing every 0, 1 dot, and an additional line timing signal generator 54 for generating an additional line timing signal from the line timing signal output from this line timing signal generator 30. , And a multiplier 55 for multiplying the video signal transfer clock signal 12b output by the clock signal generator 34.

FIG. 20 is a time chart of the print data conversion circuit 40. The line timing signal generator 30
In order to transfer the gradation video signals 11a to 11d shown in FIG. 20 from the host controller to the print control unit 1 line by line, a line timing signal 12a is output which outputs one pulse for each line. Clock signal generator 34
Generates a video signal transfer clock signal 12b in which one pulse is output for each dot in order to transfer the gradation video signals 11a to 11d from the host controller to the print controller 1 for each dot. Line timing signal 12
a is input to the selectors 33 and 38, and is used to switch the selectors 33 and 38 to input / output the gradation video signal 11 to / from the 4-bit line buffer 51 or 52 line by line. The counter 35 inputs the video signal transfer clock signal 12b and sequentially increments the storage address of the gradation video signal 11 stored in each of the 4-bit line buffers 51 and 52. The additional line timing signal generator 54 multiplies the frequency of the line timing signal 12a by 4 to multiply the additional line timing signal 12a.
generate c. The additional line timing signal 12c can generate the first to third additional line timings in addition to the basic line timing described with reference to FIG. Also in this embodiment, each gradation level is printed at each of these line timings. Multiplier 55
Inputs a video signal transfer clock signal 12b and multiplies it by four to generate a clock signal 18a corresponding to each of the additional line timings. As a result, it is possible to print each dot even at each additional line timing.

Next, the print data conversion circuit 40 has a selector 53 for selecting a gradation data signal. Selector 53
Converts the parallel gradation video signals 11a to 11d output from the selector 38 into a serial actual print data signal 18. In order to latch the actual print data signal 18 output from the selector 53 in the LED head 19 for each line, the additional line timing signal generator 54 outputs it.
A latch signal 17 composed of a signal having a frequency four times that of the line timing signal 12a is used.

The operation of the print data conversion circuit 40 is shown in FIG.
9 will be mainly described with reference to FIGS. 20 to 25.

FIG. 20 is a time chart of the print data conversion circuit 40, and FIG. 21 is a diagram for explaining an example of the gradation video signals 11a to 11d input to the selector 33. 300DP
The line timing signal 12a of I is output one pulse for each line, and is composed of a data signal group including the number of dots 2560 corresponding to one line in one pulse.
Parallel gradation video signals 11 (b0, b1, b2, b3) of 4 bits each as shown in 1 are input to the selector 33. This gradation video signal 11 is 25 in the raster direction.
It is composed of 60 clocks, and one pulse corresponds to one dot of the gradation video signal 11 and corresponds to the timing of the video signal transfer clock signal 12b.

FIG. 22 is a diagram showing an example of a gradation video signal stored in the 4-bit line buffer 40. The selector 33 inputs the line timing signal 12a, and every time one pulse of this line timing signal 12a is input,
The output destination of the input gradation video signal 11 is switched to either the 4-bit line buffer 51 or the 4-bit line buffer 52. The gradation video signal 11 input to the selector 33 is sequentially input to the 4-bit line buffer 51 or 52 by the bit data signals (b0, b1, b2, b) shown in FIG.
It is stored in each buffer address as 3). The selector 38 similarly inputs the line timing signal 12a, and every time one pulse of the line timing signal 12a is input, the input destination of the input gradation video signal 11 is either the 4-bit line buffer 52 or the 4-bit line buffer 51. Switch to The 4-bit line buffer selected at this time is the 4-bit line buffer 52 or 51 which is the reverse of the 4-bit line buffer 51 or 52 simultaneously selected by the selector 33 as in the first embodiment.

FIG. 23 is a diagram for explaining the order of transferring the gradation video signal to the LED head by the selector 53.
The selector 53 inputs the additional line timing signal 12c and outputs the additional line timing signal 12c as shown in FIG. 7A described in the first embodiment (gray level 8, gray level 4, gray level 2, gray level 1). Corresponding gradation data signals (b0, b1, b2
, B3) are sequentially selected for each additional line timing, and FIG.
The data is transferred to the LED head 19 in the order shown in.

FIG. 24 is a diagram showing LED head driving energy, and FIG. 25 is a diagram showing an actual printing image on a sheet. The LED head 19 inputs the actual print data signal 18 as shown in FIG. 20, is latched by an internal latch circuit (not shown) by the latch signal 17, and corresponds to the LED head drive energy of these E1 to E4 by the additional line timing signal 12c. 4 for each additional line timing
When output is repeated, an image consisting of dots for one line is formed on the photosensitive drum, and an actual print image shown in FIG. 25 is formed. Since the LED head 19 is driven for each gradation (b0, b1, b2, b3), the printing by the actual print data signal 18 is performed by the additional line timing signal 12c having a frequency four times the basic line timing signal 12a.

This embodiment is similar to the first embodiment in LED
Even when the head 19 having only the latch circuit for the print data signal for one line is used, the gradation data signals b0 to b3 shown in FIG. LED head 1 that has a small number of latch circuits because it can drive
9 can be used. The effect of using the LED head 19 provided with a plurality of stages of latch circuits is similar to that of the first embodiment.

[Fifth Embodiment] FIG. 27 is a time chart of the print data conversion circuit 40. In this embodiment, as shown in FIG. 27, the print data conversion circuit 40 for inputting the grayscale video signals 11a to 11d of the fourth embodiment has all the grayscale data in the first portion in the paper feeding direction at the time of printing. Dot printing can be completed.

FIG. 26 is a block diagram of the print data conversion circuit 40 of the non-impact printer showing the fifth embodiment of the present invention. As can be seen from FIGS. 26 and 27, the difference from the print data conversion circuit 40 according to the fourth embodiment of the present invention is that the read counter 81 is a counter for addressing the 4-bit line buffer 51 and the 4-bit line buffer 52. A write counter 82, the line timing signal generator 30 outputs the batch additional line timing signal 12d in addition to the line timing signal 12a, and the clock signal generator 34.
Is to output the internal data transfer signal 12e in addition to the video signal transfer clock signal 12b.

As shown in FIG. 27, the collective clock signal 18
d, the batch latch signal 17d, and the batch addition timing signal 12d are all concentrated in the first half of the timing for feeding the paper when the resolution is 300 DPI, that is, near the basic line timing (that is, the first clock of the additional line timing 12d in FIG. 10). Is output. As a result, the actual print data signal 18 is concentrated near the basic line timing, and the LED head driving energy is also concentrated near the basic line timing.

The operation of the print data conversion circuit 40 is shown in FIG.
6 and FIG. 27 will be described in more detail. 300DP
The I line timing signal 12a is output one pulse at a time for each line, and the gradation video signals 11a to 11d composed of a 4-bit parallel data signal group including the number of dots 2560 corresponding to one line in one pulse. Is input to the selector 33. Each individual data signal of the gradation video signal 11 is similarly composed of 2560 clocks and corresponds to the timing of the video signal transfer clock signal 12b in which one pulse corresponds to one dot of the gradation video signal 11. The selector 33 inputs the line timing signal 12a, and every time one pulse of the line timing signal 12a is inputted, the output destination of the inputted gradation video signal 11 is changed to 4
Bit line buffer 51 and 4-bit line buffer 5
Switch to either 2. The selector 38 similarly inputs the line timing signal 12a, and every time one pulse of the line timing signal 12a is input, the input destination of the input gradation video signal 11 is either the 4-bit line buffer 52 or the 4-bit line buffer 51. Switch to
The 4-bit line buffer selected at this time is a 4-bit line buffer which is the reverse of the 4-bit line buffer simultaneously selected by the selector 33 as in the fourth embodiment.

4-bit line buffer 51 shown in FIG.
The 4-bit line buffer 52 and the 4-bit line buffer 52 are input with the video signal 11 by the selector 33 and output by the selector 38, but operate at different timings during input and output as in the case of the 4-line buffer 31 of the second embodiment. To do.
For example, when the video signal 11 is input to the 4-bit line buffer 51 shown in FIG. 26, the write counter 82 for incrementing the address of the 4-bit line buffer 51 is the video signal transfer clock signal of the fourth embodiment. The video signal transfer clock signal 12b composed of the clocks shown in FIG. 27 similar to 12b is input and the 4-bit line buffer 51 is incremented. One of four
While the video signal 11 is input to the bit line buffer 51, the stored video signal 11 is read from the other 4-bit line buffer 52, but the video signal 11 stored in the 4-bit line buffer 52 is input to the selector 38. When outputting, the read counter 81 for incrementing the address of the 4-bit line buffer 52 inputs the internal data transfer signal 12e and controls the 4-bit line buffer 52. Conversely, when the video signal 11 is input from the selector 33 to the 4-bit line buffer 52 and the video signal 11 is output from the 4-bit line buffer 51 to the selector 38, the write counter 8
2 increments the 4-bit line buffer 52, and the read counter 81 switches to increment the 4-bit line 4-bit line buffer 51.

FIG. 28 is a view for explaining the order of transferring the gradation video signal to the LED head by the selector 53.
FIG. 29 is a diagram showing LED head drive energy.
FIG. 30 is a diagram showing an actual print image on a sheet. The 4-bit parallel gradation video signal 11 shown in FIG. 28 selected by the selector 38 is the additional line timing signal 12
27 are sequentially selected by the selector 53 that inputs d.
Is output as a serial actual print data signal 18. With this actual print data signal 18, the LED drive energy is printed as shown in FIG. As a result, the actual print image on the paper is printed as dots having different sizes and close to a perfect circle. From the above, the clock group of the internal data transfer signal 12e is the conversion speed of the video signal 11 to the actual print data signal 18 by the print data conversion circuit 40, and the actual print data signal 18 is LED.
Transfer speed for transferring to the head 19, and LED head 19
It is preferable to make them as close as possible in consideration of the performance of the LED element 75.

In the non-impact printer of this embodiment, as compared with the non-impact printer of the fourth embodiment, the dots constituting each gradation are closer to each other as shown in FIG. It is possible to print dots of a size proportional to.

In the above description of the respective embodiments of the present invention, it is assumed that the video signal is 4 times the multiple N in the raster direction × 4 times the multiple M in the paper feed direction as compared with the resolution of the print head.
I explained an example of inputting double resolution,
It is also possible to have a resolution of (N =) 2 times x (M =) 2 times and four times. As described above, when N and M are the same value and the resolution is a power multiple of 2, the line timing can be used as the drive timing of the LED head when converted to the gradation data signal of the binary data signal. The circuit for generating the line timing signal can be simplified. If you do not consider this, (N
=) 3 × (M =) 3, it is possible to input a video signal of 9 times resolution, and (N =) 4 × (M =) 2, it is possible to input a video signal of 6 times resolution. .

In each of the second, third and fifth embodiments of the present invention,
(N =) 4 dots × (M =) 4 rows and 16 dots Video signal is converted into 16-gradation actual print data signal with 1 dot,
An example of printing this at a predetermined fixed print timing has been described, but the paper feed direction is set to the upper two rows (M1) and the lower two rows.
When the number of print dots in the upper two rows is larger than the number of print dots in the lower two rows, the dots are printed at a relatively fast timing, and in the opposite case, at a relatively slow timing. By printing dots with, the printing quality of gray scale is further improved.

Further, in the above embodiment, the gradation of printing is set to LED.
This is realized by adjusting the light emission time of the LED element that constitutes the head. For example, in the third embodiment, the LED is used.
It is also possible to realize it by changing the voltage applied to the head.

[0070]

According to the present invention, the dot matrix of the video signal corresponding to one dot of the print head is formed, and the dots corresponding to the signal to be printed are counted among the dots forming the dot matrix. Number data is calculated, and the print head prints this number data 1
Since the gradation data signal corresponding to the driving energy per dot is converted, it is possible to easily convert the high resolution video signal to the small resolution gradation data. This allows
It is possible to print with a printer having a print head with a small resolution without significantly impairing the image quality of grayscale data.

Further, according to the present invention, a buffer, a dot converter for taking a video signal from the buffer and converting it into actual print data composed of a gradation signal, and a print head for gradation printing according to the gradation signal are provided. Therefore, a non-impact printer capable of printing an output of a video signal having a resolution higher than that of the print head without impairing the resolution can be obtained.

[Brief description of drawings]

FIG. 1 is a block diagram of a non-impact printer according to a first embodiment of the present invention.

FIG. 2 is a block diagram of a print data conversion circuit of the non-impact printer according to the first embodiment of the present invention.

FIG. 3 is a time chart of the print data conversion circuit according to the first embodiment.

FIG. 4 is a diagram showing the relationship between the number of print dots input to the gradation data generator and the binary data signal output by the gradation data signal generator according to the first embodiment.

FIG. 5 is an explanatory diagram of a video signal sent from the host controller according to the first embodiment.

FIG. 6 is an exploded view of an actual print data signal when a video signal created by the gradation data creator according to the first embodiment is printed on a sheet.

FIG. 7 is a diagram showing an example of gradation level types and gradation level settings according to the first embodiment.

FIG. 8 is a time chart showing details of signals of the print data conversion circuit according to the first embodiment.

FIG. 9 is a block diagram of a print data conversion circuit of a non-impact printer according to a second embodiment.

FIG. 10 is a time chart of the print data conversion circuit according to the second embodiment.

FIG. 11 is a diagram showing the relationship between the number of print dots input to the gradation data generator and the binary data signal output by the gradation data generator according to the second embodiment.

FIG. 12 is a diagram showing an example of setting gradation levels according to the second embodiment.

FIG. 13 is a time chart showing details of signals of the print data conversion circuit according to the second embodiment.

FIG. 14 is a block diagram of a print data conversion circuit of a non-impact printer according to a third embodiment.

FIG. 15 is a time chart of the print data conversion circuit according to the third embodiment.

FIG. 16 is a circuit diagram of an LED head used in the third embodiment.

FIG. 17 is a diagram showing an example of setting gradation levels according to the third embodiment.

FIG. 18 is a time chart showing details of signals of the print data conversion circuit according to the third embodiment.

FIG. 19 is a block diagram of a print data conversion circuit of a non-impact printer according to a fourth embodiment.

FIG. 20 is a time chart of the print data conversion circuit according to the fourth embodiment.

FIG. 21 is a diagram illustrating an example of a gradation video signal input to the selector according to the fourth embodiment.

FIG. 22 is a diagram showing an example of a gradation video signal stored in a 4-bit line buffer according to the fourth embodiment.

FIG. 23 is a schematic diagram showing an LED according to the selector according to the fourth embodiment.
FIG. 6 is a diagram for explaining the order of transferring gradation video signals to the head.

FIG. 24 is a diagram showing LED head drive energy according to the fourth embodiment.

FIG. 25 is a diagram showing an actual print image on a sheet according to the fourth example.

FIG. 26 is a block diagram of a print data conversion circuit of a non-impact printer according to a fifth embodiment.

FIG. 27 is a time chart of the print data conversion circuit according to the fifth embodiment.

FIG. 28 is an LED diagram of a selector according to the fifth embodiment.
FIG. 6 is a diagram for explaining the order of transferring gradation video signals to the head.

FIG. 29 is a diagram showing LED head drive energy according to the fifth embodiment.

FIG. 30 is a diagram showing an actual print image on a sheet according to the fifth example.

[Explanation of symbols]

 1 Print Control Unit 2 Driver 3 Motor for Development / Transfer Process 4 Driver 5 Paper Feed Motor 6 Paper Inlet Sensor 7 Paper Ejection Sensor 8 Paper Remaining Sensor 9 Paper Size Sensor 10 Control Signal 11 Video Signal 11a Gradation Video Signal 11b Floor Tonal video signal 11c Grayscale video signal 11d Grayscale video signal 12 Timing signal 12a Line timing signal 12b Video signal transfer clock signal 12c Additional line timing signal 12d Batch additional line timing signal 12e Internal data transfer signal 13 Print drive signal 17 Latch signal 17d Batch latch signal 18 Actual print data signal 18e Actual print data signal 18f Actual print data signal 18g Actual print data signal 18h Actual print data signal 18a Clock signal 18d Batch clock signal 19 LED Pad 21 Heater signal 22 Fixer 22a Heater 23 Charge signal 24 Charge signal 25 Charging high voltage power supply 26 Transfer high voltage power supply 27 Developer 28 Transfer device 29 Fixer temperature sensor 30 Line timing signal generator 31 4 Line buffer 32 4 lines Buffer 33 Selector 34 Clock signal generator 35 Counter 38 Selector 40 Print data conversion circuit 41 Latch circuit 42 Latch circuit 43 Latch circuit 44 Grayscale data generator 45 Grayscale data signal 48 Divider 51 4 bit line buffer 52 4 bit line Buffer 53 Selector 54 Additional line timing signal generator 55 Multiplier 61 Read counter 62 Write counter 63 Grayscale data signal 70 Shift register 71 Latch circuit 72 Comparator 73 NOR gate Circuit 74 transistor 75 LED element 76 resistance 77 differentiating circuit 78 strobe time counter 81 read counter 82 write counter

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Claims (14)

[Claims] 1. A method of printing an image using a print head having a resolution in the raster direction smaller than the resolution of a video signal forming an image to be printed, the dot of the video signal corresponding to one dot of the print head. Calculating a number of dots corresponding to a signal to be printed in the matrix, and converting the number of dots into a gradation data signal corresponding to drive energy per dot printed by the print head based on the number of dots; Driving the print head using a data signal. 2. The value of the gradation data signal corresponding to the drive energy per dot is a multi-bit gradation data signal corresponding to the value corresponding to the drive time per dot of the print head. The image printing method according to item 1. 3. The image printing method according to claim 1, wherein the value of the gradation data signal corresponding to the drive energy per dot is each basic gradation drive dot corresponding to the basic gradation level. 4. The image printing method according to claim 1, wherein the value of the gradation data signal corresponding to the driving energy per dot is a combination of basic gradation drive dots corresponding to the basic gradation level. 5. The image printing method according to claim 1, wherein the number of gradations of the gradation data signal is equal to the number of dots of a dot matrix of a video signal corresponding to one dot of the print head. 6. The image printing method according to claim 4, wherein the gradation drive dots drive the print head at a timing close to each other. 7. The gradation data signal corresponding to the driving energy per dot is a gradation data signal corresponding to the emission intensity per dot of the LED head using the LED head as the print head. The image printing method described in 1. 8. A buffer for storing M (M is a positive integer) lines of a video signal composed of an image whose resolution in the raster direction is N (N is an integer of 2 or more) times the resolution of the print head, and the storage. A dot converter that sequentially extracts the generated video signals by N × M dots and converts them into 1-dot actual print data signals having L (L is an integer of 2 or more) gradation; A non-impact printer having a print head for printing gradation dots. 9. The non-impact printer according to claim 8, wherein the image data signal N × M dots converted into one dot of the actual print data signal is equal to the gradation number L. 10. The non-impact printer according to claim 8, wherein the gradations are gradations that overlap in dots to be printed. 11. The non-impact printer according to claim 10, wherein the overlapping gradations are a gradation corresponding to darkest printing and a gradation corresponding to one lighter printing. 12. A means for generating a basic line timing signal, a means for generating an additional line timing signal between each basic timing of the basic line timing signal, and a ratio of the resolution of the video signal to the resolution of the printing section. A dot converter that forms a dot matrix by video signals of several lines and creates a gradation data signal corresponding to the data signal of the dot matrix, and a dot data signal at the basic line timing and the additional line timing. A non-impact printer having a print head that drives a print head element by correspondingly set head drive energy. 13. A means for generating a basic line timing signal, a means for generating an additional line timing signal between respective basic timings of the basic line timing signal, and a video signal which constitutes gradation information is inputted to the basic line timing signal. A non-impact printer including a print head that drives a print head element by head drive energy set corresponding to the grayscale data at a line timing and an additional line timing. 14. The non-impact printer according to claim 13, wherein the means for generating the additional line timing signal generates the additional line timing at a timing close to the basic line timing.