JPH0635168A - Lithography mask for semiconductor device - Google Patents

Lithography mask for semiconductor device

Info

Publication number
JPH0635168A
JPH0635168A JP12490292A JP12490292A JPH0635168A JP H0635168 A JPH0635168 A JP H0635168A JP 12490292 A JP12490292 A JP 12490292A JP 12490292 A JP12490292 A JP 12490292A JP H0635168 A JPH0635168 A JP H0635168A
Authority
JP
Japan
Prior art keywords
resist
light shielding
shielding material
wafer
dark portion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12490292A
Other languages
Japanese (ja)
Inventor
Tomoaki Yabe
部 友 章 矢
Koji Hashimoto
本 耕 治 橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP12490292A priority Critical patent/JPH0635168A/en
Publication of JPH0635168A publication Critical patent/JPH0635168A/en
Pending legal-status Critical Current

Links

Landscapes

  • Preparing Plates And Mask In Photomechanical Process (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

PURPOSE:To form plural kinds of resist freed parts different from each other in width on a wafer and to cross them. CONSTITUTION:A shifter material 12 and a light shielding material 13 are disposed on a glass substrate 11 so that they partially overlap each other. First narrow dark parts are formed on a wafer by interference of light along edge parts 12a of the shifter material 12 not overlapping the light shielding material 13. Second broard dark parts are formed on the water by the light shielding material 13. The first and second dark parts cross.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は半導体装置の製造に用い
られる半導体装置用リソグラフィマスクに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a lithographic mask for a semiconductor device used for manufacturing a semiconductor device.

【0002】[0002]

【従来の技術】従来から半導体装置の製造方法として、
エッジ利用型位相シフト法による製造方法が知られてい
る。このエッジ利用型位相シフト法においては、レジス
トパターニング時に図4に示すようなリソグラフィマス
クが用いられる。図4(a)はリソグラフィマスクの平
面図であり、図4(b)はその側面図である。
2. Description of the Related Art Conventionally, as a method of manufacturing a semiconductor device,
A manufacturing method using an edge-based phase shift method is known. In this edge-using phase shift method, a lithography mask as shown in FIG. 4 is used at the time of resist patterning. FIG. 4A is a plan view of the lithography mask, and FIG. 4B is a side view thereof.

【0003】すなわち、このリソグラフィマスク30
は、ガラス基板31上にSiO等からなるシフタ材3
2を蒸着して構成されている。このようなリソグラフィ
マスク30を、ウェハ上に塗布されたレジスト上方に配
置し、リソグラフィマスク30を通して露光する。この
場合、シフタ材32を通過する光は通過しない光に比べ
て180℃位相が反転する。このため、図5に示すよう
に双方の光がレジスト上のシフタ材32のエッジ部に沿
った場所で干渉して暗部を形成する。そして、この暗部
によって幅0.2〜0.3μm程度のスリット(レジス
ト抜部)35をウェハ上に設けることができる。なお、
図5において符号36は、レジスト残り部を示す。
That is, this lithography mask 30
Is a shifter material 3 made of SiO 2 or the like on the glass substrate 31.
2 is vapor-deposited. Such a lithography mask 30 is arranged above the resist applied on the wafer, and exposure is performed through the lithography mask 30. In this case, the light passing through the shifter material 32 is 180 ° C. out of phase with the light not passing through. Therefore, as shown in FIG. 5, both lights interfere with each other at a location along the edge portion of the shifter material 32 on the resist to form a dark portion. Then, by this dark portion, a slit (resist removal portion) 35 having a width of about 0.2 to 0.3 μm can be provided on the wafer. In addition,
In FIG. 5, reference numeral 36 indicates the remaining resist portion.

【0004】[0004]

【発明が解決しようとする課題】このようなエッジ利用
型位相シフト法によれば、ガラス基板上にクロム等から
なる遮光材を蒸着した通常のマスクを用いた場合に比較
して、極めて狭いレジスト抜部をウェハに形成すること
ができる。
According to such an edge-use type phase shift method, as compared with the case where an ordinary mask in which a light shielding material made of chromium or the like is vapor-deposited on a glass substrate is used, the resist is extremely narrow. The punched portion can be formed on the wafer.

【0005】しかしながら、エッジ利用型位相シスト法
の場合、ウェハ上のレジスト抜部の幅は露光条件のみに
よって定まり、全領域で同一幅となる。このため幅の異
なるレジスト抜部を設けることはむずかしく、さらに幅
の異なるレジスト抜部同志を交差させることは不可能で
ある。
However, in the case of the edge-assisted phase cyst method, the width of the resist removal portion on the wafer is determined only by the exposure conditions, and is the same width in all regions. Therefore, it is difficult to provide resist-extracted portions having different widths, and it is impossible to cross resist-extracted portions having different widths.

【0006】本発明はこのような点を考慮してなされた
ものであり、ウェハ上に幅の狭いレジスト抜部を設ける
ことができるとともに、幅の異なるレジスト抜部を互い
に交差させパタン設計の自由度を向上させることができ
る半導体装置用リソグラフィマスクを提供することを目
的とする。
The present invention has been made in consideration of such a point, and it is possible to provide resist withdrawal portions having a narrow width on a wafer and to freely design resist patterns having different widths so as to intersect with each other. An object of the present invention is to provide a lithographic mask for a semiconductor device, which can improve the degree of precision.

【0007】[0007]

【課題を解決するための手段】本発明は、ウェハのレジ
スト上に配置されたガラス基板と、このガラス基板上に
部分的に互いに重なり合った状態で設けられた遮光材お
よびシフタ材とを備え、前記シフタ材のうち前記遮光材
と重ならない部分のエッジを用いて光の干渉により前記
レジスト上に第1暗部を形成するとともに、前記遮光材
により前記レジスト上に前記第1暗部より幅広の第2暗
部を形成し、前記第1暗部と前記第2暗部を交差させた
ことを特徴とする半導体装置用リソグラフィマスクであ
る。
The present invention comprises a glass substrate arranged on a resist of a wafer, and a light shielding material and a shifter material provided on the glass substrate so as to partially overlap each other, A first dark portion is formed on the resist by light interference by using an edge of a portion of the shifter material that does not overlap with the light shielding material, and a second darker portion that is wider than the first dark portion on the resist by the light shielding material. A lithographic mask for a semiconductor device, wherein a dark portion is formed, and the first dark portion and the second dark portion are intersected with each other.

【0008】[0008]

【作用】リソグラフィマスクをウェハに塗布されたレジ
スト上に配置し露光することにより、シフト材のうち遮
光材と重ならない部分のエッジを用いて光の干渉により
レジスト上に第1暗部を形成し、遮光材によりレジスト
上に第1暗部より幅広の第2暗部を形成し、これら第1
暗部と第2暗部とを交差させる。第1暗部によりウェハ
上に第1レジスト抜部が形成され、第2暗部によりウェ
ハ上に第2レジスト抜部が形成され、第1レジスト抜部
と第2レジスト抜部は互いに交差する。
A lithographic mask is placed on a resist applied on a wafer and exposed to form a first dark portion on the resist by light interference using an edge of a portion of the shift material that does not overlap with the light shielding material, A second dark portion, which is wider than the first dark portion, is formed on the resist by the light shielding material.
The dark part and the second dark part are intersected. The first dark portion forms a first resist removal portion on the wafer, the second dark portion forms a second resist removal portion on the wafer, and the first resist removal portion and the second resist removal portion intersect with each other.

【0009】[0009]

【実施例】以下、図面を参照して本発明の実施例につい
て説明する。図1乃至図3は本発明による半導体装置用
リソグラフィマスクの一実施例を示す図である。
Embodiments of the present invention will be described below with reference to the drawings. 1 to 3 are views showing an embodiment of a lithography mask for a semiconductor device according to the present invention.

【0010】図1および図2に示すように、リソグラフ
ィマスク10はガラス基板11と、ガラス基板11上に
蒸着されたSiO等からなるシフタ材12と、ガラス
基板11上に蒸着されたクロム等からなる遮光材13と
を備えている。
As shown in FIGS. 1 and 2, the lithographic mask 10 includes a glass substrate 11, a shifter material 12 made of SiO 2 or the like deposited on the glass substrate 11, and chromium or the like deposited on the glass substrate 11. And a light shielding material 13 made of

【0011】シフト材12と遮光材13とは、互いに部
分的に重なり合っている。この場合、図2(a)に示す
ように予めガラス基板11上に蒸着された遮光材13の
端部上にシフタ材12を一部重なり合った状態で蒸着し
ても良く、逆に予め蒸着されたシフタ材12の端部上に
遮光材13を一部重なり合った状態で蒸着しても良い。
また図1に示すように一部の遮光材13はシフタ材12
から独立してガラス基板11上に蒸着されている。
The shift material 12 and the light shielding material 13 partially overlap each other. In this case, as shown in FIG. 2A, the shifter material 12 may be vapor-deposited on the end portion of the light-shielding material 13 previously vapor-deposited on the glass substrate 11 in a state of being partially overlapped, or conversely vapor-deposited beforehand. Further, the light shielding material 13 may be vapor-deposited on the end portion of the shifter material 12 in a state of partially overlapping.
Further, as shown in FIG. 1, some of the light shielding materials 13 are shifter materials 12.
Is independently deposited on the glass substrate 11.

【0012】次にこのような構成からなる本実施例の作
用について説明する。
Next, the operation of this embodiment having such a configuration will be described.

【0013】このようなリソグラフィマスク10を、ウ
ェハ上に塗布されたレジスト20(図3)上に配置し、
このリソグラフィマスク10を通して露光する。この場
合、シフタ材12を通過する光は、通過しない光に比べ
て180℃位相が反転するこのため、シフタ材12のう
ち遮光材13と重ならない部分のエッジ12aに沿った
場所で、双方の光が干渉してレジスト20上に幅の狭い
第1暗部を形成する。そして、この第1暗部によって第
1レジスト抜部21をウェハ上に形成することができる
(図3参照)。すなわち、第1レジスト抜部21の位置
は第1暗部の位置に対応している。
Such a lithographic mask 10 is placed on a resist 20 (FIG. 3) applied on a wafer,
Exposure is performed through the lithography mask 10. In this case, the light passing through the shifter material 12 is 180 ° C. out of phase with the light not passing therethrough, so that both of the light passing through the shifter material 12 and the light shielding material 13 along the edge 12a of the shifter material 12 have a phase difference. The light interferes to form a narrow first dark portion on the resist 20. Then, the first resist removal portion 21 can be formed on the wafer by the first dark portion (see FIG. 3). That is, the position of the first resist removal portion 21 corresponds to the position of the first dark portion.

【0014】同時に図3に示すように、遮光材13によ
りレジスト20上に第1暗部より幅の広い第2暗部が形
成され、この第2暗部によって第1レジスト抜部21よ
り幅の広い第2レジスト抜部22をウェハ上に形成する
ことができる。この場合、第2レジスト抜部22に位置
は第2暗部の位置に対応している。また第1レジスト抜
部21および第2レジスト抜部22以外の部分は、レジ
スト残り部25としてウェハ上に残る。このようにし
て、ウェハ上に所望のパタンを形成することができる。
At the same time, as shown in FIG. 3, a second dark portion having a width wider than the first dark portion is formed on the resist 20 by the light shielding material 13, and the second dark portion has a second darker portion wider than the first resist removal portion 21. The resist removal portion 22 can be formed on the wafer. In this case, the position of the second resist removal portion 22 corresponds to the position of the second dark portion. The portions other than the first resist removal portion 21 and the second resist removal portion 22 remain on the wafer as a resist remaining portion 25. In this way, a desired pattern can be formed on the wafer.

【0015】このように、本実施例によれば、ウェハ上
に第1レジスト抜部21と、この第1レジスト抜部21
より幅の広い第2レジスト抜部22とを混在して形成す
ることができる。また、シフト材12のうち遮光材13
と重ならない部分のエッジ12aは、遮光材13と交差
しているので、エッジ12aに沿って形成される第1暗
部21と遮光材13により形成される第2暗部22とを
互いに交差させることができる。このため、第1暗部に
対応する第1レジスト抜部21と、第2暗部に対応する
第2レジスト抜部22とを互いに交差させ、パタン設計
の自由度を向上させることができる。
As described above, according to this embodiment, the first resist removal portion 21 and the first resist removal portion 21 are formed on the wafer.
The second resist removal portion 22 having a wider width can be formed in a mixed manner. In addition, the light shielding material 13 of the shift material 12
Since the edge 12a of the portion that does not overlap with the light shielding material 13 intersects with the light shielding material 13, the first dark portion 21 formed along the edge 12a and the second dark portion 22 formed by the light shielding material 13 may intersect with each other. it can. Therefore, the first resist removal portion 21 corresponding to the first dark portion and the second resist removal portion 22 corresponding to the second dark portion can intersect with each other, and the degree of freedom in pattern design can be improved.

【0016】[0016]

【発明の効果】以上説明したように、本発明によれば、
ウェハ上に第1レジスト抜部と、この第1レジスト抜部
より幅広の第2レジスト抜部を混在して形成することが
できる。また第1レジスト抜部と第2レジスト抜部を交
差させることができ、このようにしてパタン設計の自由
度を向上させることができる。
As described above, according to the present invention,
The first resist removal portion and the second resist removal portion wider than the first resist removal portion can be mixedly formed on the wafer. Further, the first resist removal portion and the second resist removal portion can intersect with each other, and thus the degree of freedom in pattern design can be improved.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明による半導体装置用リソグラフィマスク
の一実施例を示す平面図。
FIG. 1 is a plan view showing an embodiment of a lithography mask for a semiconductor device according to the present invention.

【図2】図1に示す半導体装置用リソグラフィマスクの
側面図。
FIG. 2 is a side view of the lithographic mask for a semiconductor device shown in FIG.

【図3】本発明による半導体装置用リソグラフィマスク
によって得られたレジストパタンの平面図。
FIG. 3 is a plan view of a resist pattern obtained by the lithography mask for a semiconductor device according to the present invention.

【図4】従来の半導体装置用リソグラフィマスクを示す
図。
FIG. 4 is a diagram showing a conventional lithography mask for a semiconductor device.

【図5】従来の半導体装置用リソグラフィマスクによっ
て得られたレジストパタンの平面図。
FIG. 5 is a plan view of a resist pattern obtained by a conventional lithography mask for semiconductor devices.

【符号の説明】[Explanation of symbols]

10 リソグラフィマスク 11 ガラス基板 12 シフタ材 12a エッジ 13 遮光材 20 レジスト 21 第1レジスト抜部 22 第2レジスト抜部 25 レジスト残り部 10 Lithography Mask 11 Glass Substrate 12 Shifter Material 12a Edge 13 Light-Shielding Material 20 Resist 21 First Resist Removal Portion 22 Second Resist Removal Portion 25 Resist Remaining Portion

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】ウェハのレジスト上に配置されたガラス基
板と、このガラス基板上に部分的に互いに重なり合った
状態で設けられた遮光材およびシフタ材とを備え、前記
シフタ材のうち前記遮光材と重ならない部分のエッジを
用いて光の干渉により前記レジスト上に第1暗部を形成
するとともに、前記遮光材により前記レジスト上に前記
第1暗部より幅広の第2暗部を形成し、前記第1暗部と
前記第2暗部を交差させたことを特徴とする半導体装置
用リソグラフィマスク。
1. A glass substrate disposed on a resist of a wafer, and a light shielding material and a shifter material provided on the glass substrate so as to partially overlap each other, and the light shielding material among the shifter materials. A first dark portion is formed on the resist by light interference using an edge of a portion that does not overlap with the first dark portion, and a second dark portion wider than the first dark portion is formed on the resist by the light shielding material; A lithographic mask for a semiconductor device, wherein a dark portion and the second dark portion are crossed.
JP12490292A 1992-05-18 1992-05-18 Lithography mask for semiconductor device Pending JPH0635168A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12490292A JPH0635168A (en) 1992-05-18 1992-05-18 Lithography mask for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12490292A JPH0635168A (en) 1992-05-18 1992-05-18 Lithography mask for semiconductor device

Publications (1)

Publication Number Publication Date
JPH0635168A true JPH0635168A (en) 1994-02-10

Family

ID=14896941

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12490292A Pending JPH0635168A (en) 1992-05-18 1992-05-18 Lithography mask for semiconductor device

Country Status (1)

Country Link
JP (1) JPH0635168A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2020154338A (en) * 2015-09-26 2020-09-24 Hoya株式会社 Method of manufacturing photomask, photomask, and method of manufacturing display device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0476551A (en) * 1990-07-18 1992-03-11 Oki Electric Ind Co Ltd Pattern formation

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0476551A (en) * 1990-07-18 1992-03-11 Oki Electric Ind Co Ltd Pattern formation

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2020154338A (en) * 2015-09-26 2020-09-24 Hoya株式会社 Method of manufacturing photomask, photomask, and method of manufacturing display device

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