JPH06350395A - Signal processing circuit - Google Patents

Abstract

PURPOSE:To obtain a signal processing circuit with high performance at a same data processing speed by providing a digital filter passing through only a desired frequency band from among data digitized by an A/D converter so as to decrease the sampling frequency. CONSTITUTION:Analog LPFs 1a, 1b filter an I/Q video signal respectively to eliminate the influence of folding of a frequency component caused at the time of discreteness of A/D converters 2a, 2b on a next stage. The pass band of the LPFs 1a, 1b is made a desired band and the sampling frequency of the A/D converters 2a, 2b is made twice or move the desired frequency band. A digital filter 3 passes through only a signal of an object frequency and a decimeter 4 thins the time series data to decrease an arithmetic operation rate. Then the data as the low speed are subjected to FET arithmetic operation by a FET processing unit 5 and the frequency of the desired signal is obtained from both the pass band of the filter 3 and the frequency of the folded signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal processing circuit used in a detector for detecting a Doppler frequency from a target, for example.

[0002]

2. Description of the Related Art In a conventional signal processing circuit of this type, an analog signal is digitized by an A / D converter at a desired sampling frequency, thinned by a decimator, and an FFT (fa
stFourier transform) processor performs Fourier transform processing. Therefore, high-speed sampling is required to detect a high-speed target, and multipoint FFT arithmetic processing is required to improve frequency resolution.

[0003]

As described above, in order to perform high-speed sampling and FFT operation processing of a large number of points, it is necessary to perform operation processing of a large amount of data at high speed, but this should be done in real time. Therefore, there is a limit to the detection of high-speed targets and high resolution, and a signal processing circuit with high performance has been desired.

The present invention has been made in order to solve the above problems, and it is possible to reduce the sampling frequency.
Even if the number of points in the FFT calculation processing is reduced, an equivalent frequency resolution can be obtained, and therefore an object is to provide a higher performance signal processing circuit at the same data processing speed.

[0005]

A signal processing circuit according to the present invention is provided with a digital filter which passes only a desired frequency band of data digitized by an A / D converter, and outputs the output of the FFT processing means. The frequency of the desired signal is obtained by the pass band of this filter.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings. Figure 1
Is a block diagram showing the basic configuration of the present embodiment. In the figure, 1a and 1b are analog low-pass filters and 2
a and 2b are A / D converters, 3 is a digital filter,
4 is a decimator and 5 is an FFT processor.

Next, the basic operation of the present invention will be described.
First, the analog low-pass filters 1a and 1b
Each Q video signal is filtered and A /
The influence of aliasing of frequency components that occurs during discretization by the D converter is eliminated. In this case, low-pass filter 1
A / D converters 2a, 2b
The sampling frequency of 2b is at least twice the desired band according to the sampling theorem. The reason why the two video signals of Ich and Qch are arithmetically processed is to determine whether the detection target is approaching or moving away. In the next digital filter 3, only the signal in the target frequency band is passed, the decimator 4 decimates the time-series data, the operation rate is reduced, and the FFT processor 5 performs the FFT operation with the low rate. Then, the frequency of the desired signal is converted from the pass band of the digital filter 3 and the frequency of the folded signal.

FIG. 2 is a diagram showing a folded spectrum of a digital signal when sampling is performed at the sampling frequency fs, and FIG. 3 is a sampling frequency fs1 (fs1).
FIG. 7 is a diagram showing a folded spectrum of a digital signal when sampling is performed at = fs / 2). As shown in these figures, when the sampling frequency is slowed down, the folding frequency becomes low, and thinning out this data causes ambiguity in the detection of the Doppler frequency as described later. That is, as shown in FIG. 4, when there are a plurality of signals (signal 1 and signal 2) through the low-pass filter, it is impossible to distinguish from which frequency band the folded spectrum is (FIG. 6). reference).

Therefore, in the present invention, a digital filter that passes only one folded frequency band is provided,
We decided to limit folding back from other frequency bands.
That is, in the present invention, a filter having a pass frequency characteristic as shown in FIG. 5 is provided as the digital filter 3 shown in FIG. 1 so that the signal 2 is removed and only the band including the signal 1 is passed. With this configuration, the spectrum is limited to the signal 1 as shown in FIG.
The actual signal frequency can be accurately calculated from the pass frequency band and the folded spectrum of the digital filter shown in FIG. As described above, the signal processing circuit of the present invention can reduce the sampling frequency as compared with the conventional circuit having the same frequency resolution, and can reduce the number of points in the FFT calculation processing.

Embodiments of the present invention will be described below with reference to the drawings. FIG. 7 is a block diagram showing an embodiment of the present invention. In the figure, 6a and 6b are analog low pass filters, 7a and 7b are sample and hold circuits, and 8a and
8b is an A / D converter, 9a to 9c are complex digital filters, 10a to 10c are digimeters, and 11a to 1
1c is a weighting calculator, 12a to 12c are FFT calculators, and 13 is a combiner.

Next, the operation of the embodiment shown in FIG. 7 will be described. As described above, the I / Qch video signals are respectively passed through the analog low-pass filters 6a and 6b to remove the influence of signal folding from outside the desired band, and the sample and hold circuits 7a and 7b and the A / D converter 8 are provided.
In steps a and 8b, a digital signal is converted at a desired sampling frequency. Next, the complex digital filters 9a-9
c, that is, a digital band pass filter or a low pass filter group having only the target band as the pass band is prepared, and the data is distributed to the respective pass bands. Then, for each of the distributed pass bands, the decimator 10 thins out the time series data, the weighting calculator 11 weights the data, and the FFT calculator 12
The FFT calculation processing is performed in step S1, and the respective outputs are combined by the combiner 13 so as to be continuous in frequency, and the FFT output for all the desired bands is obtained. By distributing each pass band as described above, each of the FFT calculators 12a to 12c
Can further reduce the number of points processed.

FIG. 8 is a block diagram showing another embodiment of the present invention. The same reference numerals as those in FIG. 7 denote the same or corresponding parts, 14a and 14b are buffer memories, 15 is a variable digital filter, and 16 is Decimator, 17 is a weighting calculator, 18 is an FFT calculator, 19 is a frequency calculator,
20 is a filter controller. In this embodiment, the digital filter groups 9a-9b are replaced by one variable filter, and the target band is the filter controller 20.
The frequency calculator 17 converts the actual frequency from the output of the FFT calculator 18 and the pass band information from the filter controller 20 so as to cover the desired band by switching the band. By doing so, the circuit scale can be reduced.

[0013]

As described above, the signal processing circuit of the present invention is expected to reduce the number of points in FFT calculation processing and to reduce the sampling frequency, which facilitates the construction of a real-time system. Further, there is an effect that a high-speed target can be detected at the same calculation speed and a signal processing circuit with improved frequency resolution can be provided.

[Brief description of drawings]

FIG. 1 is a block diagram showing a basic configuration of the present invention.

FIG. 2 is a diagram showing a folded spectrum at a sampling frequency fs.

FIG. 3 is a diagram showing a folded spectrum in the case of a sampling frequency fs1 (fs / 2).

FIG. 4 is a diagram for explaining a case where ambiguity occurs in Doppler frequency detection.

FIG. 5 is a diagram showing frequency characteristics of a digital filter according to the present invention.

FIG. 6 is a diagram showing a signal spectrum after passing through a decimator in the present invention.

FIG. 7 is a block diagram showing an embodiment of the present invention.

FIG. 8 is a block diagram showing another embodiment of the present invention.

[Explanation of symbols]

 6 analog low-pass filter 7 sample & hold circuit 8 A / D converter 9 complex digital filter 10 digimeter 11 weighting calculator 12 FFT calculator 13 combiner 14 buffer memory 19 frequency calculator 20 filter controller

Continuation of front page (51) Int.Cl. ⁵ Identification code Office reference number FI technical display location G01S 13/50 Z 8113-5J

Claims (3)

[Claims] 1. An A / D converter that digitizes an analog signal at a predetermined sampling frequency, a filter that passes only a desired frequency band of digitized data, and a decimation of time series data that has passed through this filter. A decimator for performing, a FFT (fast Fourier transform) processing means for performing a Fourier transform on the thinned data, and an operation means for obtaining a frequency of a desired signal based on the output of the FFT processing means and the pass band information of the filter. A signal processing circuit comprising: 2. The filter according to claim 1, wherein two or more filters each having a different frequency band to be passed are used, and each filter is provided with a decimator, a weighting calculator, and an FFT processing means at a stage subsequent to each filter. A signal processing circuit comprising: a combiner that combines outputs from the processing means so as to be continuous in frequency. 3. The filter according to claim 1, wherein a variable filter for varying a frequency band to be passed by being controlled by a filter controller is used, and a buffer memory is provided before the variable filter. A means for providing a decimator, a weighting calculator, an FFT processing means, and a frequency calculator in the subsequent stage of the filter, and the frequency calculator is based on the output from the FFT processor and the pass band information of the filter controller. A signal processing circuit comprising: means for converting a frequency.