JPH06350199A - Semiconductor light emitting device and its manufacturing method - Google Patents

Semiconductor light emitting device and its manufacturing method

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Publication number
JPH06350199A
JPH06350199A JP13713393A JP13713393A JPH06350199A JP H06350199 A JPH06350199 A JP H06350199A JP 13713393 A JP13713393 A JP 13713393A JP 13713393 A JP13713393 A JP 13713393A JP H06350199 A JPH06350199 A JP H06350199A
Authority
JP
Japan
Prior art keywords
type
film
semiconductor
layer
semiconductor film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13713393A
Other languages
Japanese (ja)
Other versions
JP3288479B2 (en
Inventor
Yukio Shakuda
幸男 尺田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP13713393A priority Critical patent/JP3288479B2/en
Priority to EP94108622A priority patent/EP0632510B1/en
Priority to DE69428835T priority patent/DE69428835T2/en
Priority to US08/255,933 priority patent/US5548127A/en
Publication of JPH06350199A publication Critical patent/JPH06350199A/en
Application granted granted Critical
Publication of JP3288479B2 publication Critical patent/JP3288479B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
  • Semiconductor Lasers (AREA)
  • Led Devices (AREA)

Abstract

PURPOSE:To improve the power consumption and temperature characteristics by causing the necessary current to flow at a low voltage between the p-type II-VI compound semiconductor film and the electrode. CONSTITUTION:After forming a ZnCdSSe type of II-VI semiconductor film 2 on an n-type GaAs substrate by the growing using MBE successively the n-type semiconductor layer 8, active layer 5, and p-type semiconductor layer 9 at a substrate temperature of 350 deg.C or less, a p-type AlGaAs film 10 with a carrier concentration of 10<19>/cm<3> or more and a p-type GaAs film 11 are grown using MBE successively on the p-type semiconductor layer 9 at a substrate temperature lower than the substrate temperature at which the II-VI compound semiconductor film 2 was grown, and finally the electrode 12 is formed on top of these layers. In this manner, the energy band gap is made to become successively higher from the electrode 12 to the II-VI compound semiconductor film 2, and the voltage-current characteristic is improved utilizing the fact that the current decreases exponentially with increasing height of the energy barrier.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、半導体レーザ装置、各
種電子機器類のディスプレイにおける表示パネル中の要
素である青色発光部分あるいは、表示装置に単体で用い
られる青色発光素子(LED)、その他CDプレーヤ、
LDプレーヤ、光磁気ディスクプレーヤ中の信号読み取
り、書き込み発光素子、バーコードリーダの発光素子等
として使用される半導体発光装置及びその製造方法に関
するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor laser device, a blue light emitting portion which is an element in a display panel of a display of various electronic devices, a blue light emitting element (LED) used alone in a display device, and other CDs. Player,
The present invention relates to a semiconductor light emitting device used as a signal reading and writing light emitting element in a LD player and a magneto-optical disk player, a light emitting element of a bar code reader, and the like, and a manufacturing method thereof.

【0002】[0002]

【従来の技術】図5はこの種の半導体発光装置としての
半導体レーザ装置の基本的構成と、それに対応するエネ
ルギバンドの状態を模式的に示している。一般に半導体
レーザ装置は、N型半導体基板Aの表面に、半導体N型
層B1、活性層B2、半導体P型層B3 をその順序でMB
E(Molecular Beam Epitaxy)成長してなる半導体膜B
を形成してあり、基板Aの裏面に設けた金属電極E1
と、半導体膜最上層の半導体P型層B3の表面に設けた
金属電極E2間に順方向、つまり電極E2から電極E1
バイアス電圧を印加することにより、活性層B2 から発
光するように構成されている。
2. Description of the Related Art FIG. 5 schematically shows a basic structure of a semiconductor laser device as a semiconductor light emitting device of this type and a state of an energy band corresponding to the basic structure. Generally, in a semiconductor laser device, a semiconductor N-type layer B1, an active layer B2, and a semiconductor P-type layer B3 are sequentially formed on a surface of an N-type semiconductor substrate A by MB.
Semiconductor film B formed by E (Molecular Beam Epitaxy) growth
And a metal electrode E 1 provided on the back surface of the substrate A.
When forward between the metal electrodes E2 provided on the surface of the semiconductor P-type layer B3 of the semiconductor film uppermost layer direction, i.e. by applying a bias voltage from the electrode E2 to electrode E 1, so that the light emitting from the active layer B 2 It is configured.

【0003】周知のように上記構成の半導体レーザ装置
のエネルギバンド構造では、半導体N型層B1、半導体
P型層B3のエネルギレベルが高く、PN接合部である
活性層Cがエネルギレベルの谷間をなす形となり、ま
た、電極E1、E2と半導体膜B間にはエネルギー障壁Δ
Vが生じる。
As is well known, in the energy band structure of the semiconductor laser device having the above configuration, the energy levels of the semiconductor N-type layer B 1 and the semiconductor P-type layer B 3 are high, and the active layer C which is the PN junction has an energy level. A valley is formed, and an energy barrier Δ is provided between the electrodes E 1 and E 2 and the semiconductor film B.
V occurs.

【0004】従って、正孔hがエネルギー障壁ΔVを越
えるだけの電流Iを得るのに必要な電圧を電極E2、E1
間に印加すると、これによって注入されたキャリア、つ
まり正孔hや電子が、エネルギレベルの低い活性層Cに
閉じ込められて、誘導放出が盛んに起こる。そして、励
起電流が閾値を越えたとき、活性層Cの平行両端面間で
光が共振してレーザ発振が起こる。
Therefore, the voltage required for obtaining the current I enough for the hole h to exceed the energy barrier ΔV is set to the electrodes E2 and E1.
When applied during this period, the carriers thus injected, that is, holes h and electrons, are confined in the active layer C having a low energy level, and stimulated emission actively occurs. Then, when the excitation current exceeds the threshold value, light resonates between both parallel end faces of the active layer C, and laser oscillation occurs.

【0005】図6は従来の半導体レーザ装置のより具体
的な構成の一例を示している。この図に示された装置
は、N型半導体基板としてN型GaAs基板21が使用さ
れ、この基板21上に、半導体膜としてZnCdSSe系(ま
たはMgZnCdSSe系)のII−VI族半導体膜22を形成し
た、いわゆるZnSe系の青色発光半導体レーザである。
FIG. 6 shows an example of a more specific structure of a conventional semiconductor laser device. In the device shown in this figure, an N-type GaAs substrate 21 is used as an N-type semiconductor substrate, and a ZnCdSSe (or MgZnCdSSe) II-VI group semiconductor film 22 is formed as a semiconductor film on this substrate 21. , A so-called ZnSe-based blue light emitting semiconductor laser.

【0006】このII−VI族半導体膜22は、バッファ層
であるN型ZnSe層23、クラッド層であるN型ZnSSe層
24、活性層であるZnCdSe層25、クラッド層であるP
型ZnSSe層26及びバッファ層であるP型ZnSe層27を
その順序で基板21上にMBE成長させたものであり、
このII−VI族半導体膜最上層のP型ZnSe層27上に直
接、Au等の金属を蒸着して正電極28を形成してある。
29は基板21の裏面に形成された負電極である。
The II-VI semiconductor film 22 includes an N-type ZnSe layer 23 which is a buffer layer, an N-type ZnSSe layer 24 which is a cladding layer, a ZnCdSe layer 25 which is an active layer, and a P layer which is a cladding layer.
A type ZnSSe layer 26 and a P type ZnSe layer 27 which is a buffer layer are MBE grown on the substrate 21 in that order,
A positive electrode 28 is formed by vapor-depositing a metal such as Au directly on the P-type ZnSe layer 27 which is the uppermost layer of the II-VI semiconductor film.
Reference numeral 29 is a negative electrode formed on the back surface of the substrate 21.

【0007】[0007]

【発明が解決しようとする課題】ところで、上記従来構
成の半導体レーザ装置では、金属電極28はP型ZnSe層
27上に直接形成されているが、このようなZnSe系P型
半導体は金属と直接接合された状態では、両者間にショ
ットキー型の電圧/電流特性が存在することが知られて
いる。
By the way, in the above-described semiconductor laser device having the conventional structure, the metal electrode 28 is formed directly on the P-type ZnSe layer 27. However, such a ZnSe-based P-type semiconductor is directly formed on the metal. It is known that Schottky type voltage / current characteristics exist between the two in the joined state.

【0008】即ち、従来では図7に示したエネルギバン
ド構造から明らかなように、電極28、29間に順方向
にバイアス電圧を印加すると、II−VI族半導体膜22の
表層をなすP型ZnSe層27と金属製正電極28との間
に、急峻なショットキー型のエネルギー障壁ΔVが生じ
るため、相当な高電圧を印加しないと、正孔hが該エネ
ルギー障壁ΔVを越えるのに必要な電流が得られない。
That is, as is apparent from the energy band structure shown in FIG. 7, in the related art, when a forward bias voltage is applied between the electrodes 28 and 29, the P-type ZnSe forming the surface layer of the II-VI semiconductor film 22 is formed. Since a steep Schottky type energy barrier ΔV is generated between the layer 27 and the metal positive electrode 28, the current necessary for the holes h to exceed the energy barrier ΔV unless a considerably high voltage is applied. Can't get

【0009】従って、上記従来構成では、装置の駆動に
要する消費電力が大きくなるだけでなく、該装置に数A
という大電流が流れることから、装置内の電流密度が非
常に高くなるため、駆動時において高温に発熱すること
が避けられない。このように上記従来装置の場合、電力
消費が嵩む上に、常温環境下で動作させることはは熱破
壊の虞もあって困難であるなどの問題点があった。
Therefore, in the above-mentioned conventional structure, not only the power consumption required for driving the device increases, but also the device consumes several amperes.
Since a large current flows, the current density in the device becomes very high, and heat generation at a high temperature is inevitable during driving. As described above, in the above conventional device, there is a problem that power consumption increases and it is difficult to operate the device in a normal temperature environment due to thermal destruction.

【0010】上記問題点を解決するためには、前記金属
電極28からII−VI族半導体膜22へ電流が流れやすい
構造にして、電極28、29間に印加するバイアス電圧
を可及的に低く抑える必要があるが、その方策として例
えば、電極28を形成後、II−VI族半導体膜22を成長
温度より高い温度に保持することが考えられる。
In order to solve the above-mentioned problems, the structure is such that a current easily flows from the metal electrode 28 to the II-VI group semiconductor film 22, and the bias voltage applied between the electrodes 28 and 29 is made as low as possible. Although it is necessary to suppress the temperature, it is conceivable to maintain the II-VI group semiconductor film 22 at a temperature higher than the growth temperature after forming the electrode 28, for example.

【0011】即ち、II−VI族半導体膜22を基板21上
にMBE成長するときは、通常、基板温度350℃以下
の条件下で行われている。そこで、II−VI族半導体膜2
2上に金属電極28を蒸着した後、再び該半導体膜22
を成長温度より高い温度、例えば400℃程度に加熱し
て、電極28を構成する金属をII−VI族半導体膜22中
に拡散させるようにする。
That is, when the II-VI semiconductor film 22 is MBE-grown on the substrate 21, the substrate temperature is usually 350 ° C. or less. Therefore, the II-VI semiconductor film 2
After depositing the metal electrode 28 on the second layer 2, the semiconductor film 22 is again formed.
Is heated to a temperature higher than the growth temperature, for example, about 400 ° C. to diffuse the metal forming the electrode 28 into the II-VI semiconductor film 22.

【0012】このように金属をII−VI族半導体膜表層の
P型ZnSe層27中に拡散させると、図7の破線で示すよ
うに、エネルギー障壁ΔVの傾斜が緩和されるので、電
流の流れを改善することが可能になる。ところが、II−
VI族半導体膜22は成長温度よりも高温に保持すると、
それ自体の電気抵抗が高くなるという性質がある。
When the metal is diffused into the P-type ZnSe layer 27 which is the surface layer of the II-VI semiconductor film as described above, the slope of the energy barrier ΔV is relaxed as shown by the broken line in FIG. Can be improved. However, II-
If the Group VI semiconductor film 22 is kept at a temperature higher than the growth temperature,
It has the property of increasing its own electric resistance.

【0013】従って、この場合、P型ZnSe層27の電気
抵抗を低く抑えつつ、該ZnSe層27中へ電極金属を拡散
させることにより行う合金化処理は現状では困難であ
り、結果的には必要な電流を得るためには、電極28、
29間に上記従来例と同様の高電圧を印加しなければな
らないこととなり、上記した問題点の解決策とはなり得
ない。
Therefore, in this case, the alloying treatment performed by diffusing the electrode metal into the ZnSe layer 27 while suppressing the electric resistance of the P-type ZnSe layer 27 to a low level is difficult at present, and as a result, it is necessary. Electrode 28,
The same high voltage as in the above-described conventional example must be applied between the two terminals 29, which cannot be a solution to the above-mentioned problems.

【0014】また、上記とは別の解決策として、1019
/cm3 以上の高いキャリア濃度を有するII−VI族半導体
膜22を基板21上に成長させることが考えられる。こ
のようにすると図7の2点鎖線で示すように、P型ZnSe
層27のエネルギバンドがエネルギー障壁が低くなるよ
うに移行するので、電流の流れやすい構造となるが、II
−VI族半導体の場合、このようなキャリア濃度の高いP
型膜を得ることは、現状では技術的に殆ど不可能であ
る。
As a solution different from the above, 10 19
It is considered that the II-VI group semiconductor film 22 having a high carrier concentration of / cm 3 or more is grown on the substrate 21. In this way, as shown by the chain double-dashed line in FIG. 7, P-type ZnSe
Since the energy band of the layer 27 shifts so that the energy barrier becomes low, a structure in which current easily flows is obtained. II
In the case of group VI semiconductors, P having such a high carrier concentration is used.
Obtaining a mold film is technically almost impossible at present.

【0015】本発明は、上記のような問題点を解決する
もので、II−VI族P型膜と電極との間における電圧/電
流特性を改善し、低い電圧で必要な電流が流れるように
することにより、消費電力及び発熱量を減少させ、半導
体発光装置全体の温度特性の改善を図ることを目的とす
るものである。
The present invention solves the above problems and improves the voltage / current characteristics between the II-VI group P-type film and the electrode so that the necessary current can flow at a low voltage. By doing so, it is intended to reduce the power consumption and the heat generation amount and improve the temperature characteristics of the entire semiconductor light emitting device.

【0016】[0016]

【課題を解決するための手段】上記目的を達成するため
に本発明の半導体発光装置では、半導体N型層、活性
層、半導体P型層がその順序で積層状に配された半導体
膜をGaAs基板上に形成した半導体発光装置において、前
記半導体膜を、前記GaAs基板上にMBE成長したZnCdSS
e系またはMgZnCdSSe系のII−VI族半導体により形成し、
このII−VI族半導体膜最上層の半導体P型層上に、MB
E成長させてなるP型AlGaAs膜とP型GaAs膜とをその順
序で積層状に形成し、さらに前記P型GaAs膜上に電極を
形成したものとしている。
In order to achieve the above object, in a semiconductor light emitting device of the present invention, a semiconductor film in which a semiconductor N-type layer, an active layer, and a semiconductor P-type layer are laminated in this order is formed of GaAs. In a semiconductor light emitting device formed on a substrate, the semiconductor film is ZnCdSS obtained by MBE growing on the GaAs substrate.
e-type or MgZnCdSSe-based II-VI group semiconductor,
MB is formed on the uppermost semiconductor P-type layer of the II-VI semiconductor film.
It is assumed that a P-type AlGaAs film and a P-type GaAs film, which have been grown by E, are formed in this order in a laminated shape, and an electrode is further formed on the P-type GaAs film.

【0017】上記構成において、好ましくはP型AlGaAs
膜及びP型GaAs膜はいずれも1019/cm3 以上のキャリ
ア濃度を有するものとする。
In the above structure, preferably P-type AlGaAs
Both the film and the P-type GaAs film have a carrier concentration of 10 19 / cm 3 or more.

【0018】また、本発明の半導体発光装置の製造方法
では、基板温度350℃以下で半導体N型層、活性層、
半導体P型層の順序でMBE成長したZnCdSSe系またはM
gZnCdSSe系のII−VI族半導体膜をGaAs基板上に形成した
後、このII−VI族半導体膜の成長時における基板温度以
下の基板温度下で、該II−VI族半導体膜最上層の半導体
P型層上にP型AlGaAs膜とP型GaAs膜とをその順序でM
BE成長し、さらに前記P型GaAs膜上に電極を形成する
ようにしている。
In the method for manufacturing a semiconductor light emitting device of the present invention, the semiconductor N-type layer, the active layer,
MBC-grown ZnCdSSe system or M in the order of semiconductor P-type layers
After a gZnCdSSe-based II-VI group semiconductor film is formed on a GaAs substrate, the semiconductor P as the uppermost layer of the II-VI group semiconductor film is formed at a substrate temperature lower than the substrate temperature during the growth of the II-VI group semiconductor film. A P-type AlGaAs film and a P-type GaAs film are sequentially formed on the mold layer in the order M.
BE growth is performed, and then an electrode is formed on the P-type GaAs film.

【0019】[0019]

【作用】上記構成の各層における電極に対するエネルギ
バンドのギャップの大きさは、P型GaAs膜<P型AlGaAs
膜<II−VI族半導体からなる半導体P型層となる。従っ
て、電極から半導体P型層に至る間のエネルギバンドの
様子は、段階的にレベル差が作られている状態となり、
エネルギー障壁は3段階に分割された形となる。
The size of the energy band gap with respect to the electrode in each layer having the above-mentioned structure is determined by P-type GaAs film <P-type AlGaAs
Film <Semiconductor P-type layer made of II-VI semiconductor. Therefore, the state of the energy band from the electrode to the semiconductor P-type layer is in a state in which a level difference is created stepwise,
The energy barrier is divided into three stages.

【0020】一般に、正負電極間のPN接合構造を流れ
る電流量はエネルギー障壁の高さに対して指数関数的に
減少する。従って、従来構成のように、電極と半導体P
型層間に単一の大きなエネルギー障壁があるよりも、上
記のように3段階に分割されていると、電流が流れやす
くなるため、同一電位差のエネルギー障壁であっても、
正孔が電極と半導体P型層との間のエネルギー障壁を越
えるのに必要な電流を得るための電圧は従来と比較して
大きく低下させることが可能になる。
Generally, the amount of current flowing through the PN junction structure between the positive and negative electrodes decreases exponentially with the height of the energy barrier. Therefore, as in the conventional configuration, the electrodes and the semiconductor P are
If there is a single large energy barrier between the mold layers, the current is more likely to flow when divided into three stages as described above, so even if the energy barriers have the same potential difference,
The voltage for obtaining the current required for holes to cross the energy barrier between the electrode and the semiconductor P-type layer can be greatly reduced as compared with the conventional case.

【0021】また、本発明方法によれば、P型AlGaAs
膜、P型GaAs膜の成長時における基板温度をII−VI族半
導体膜の成長時における基板温度以下にすることによ
り、AlGaAs、GaAsの拡散によるII−VI族半導体膜の変質
を避けることが可能になる。
Further, according to the method of the present invention, P-type AlGaAs
It is possible to avoid alteration of II-VI group semiconductor film due to diffusion of AlGaAs and GaAs by setting the substrate temperature during growth of P-type GaAs film to below the substrate temperature during growth of II-VI group semiconductor film. become.

【0022】[0022]

【実施例】以下、本発明を半導体レーザ装置に適用した
実施例を図面を参照しながら説明する。図1は本実施例
の構成を模式的に示している。この図に示す装置は、N
型GaAs基板1上に ZnCdSSe系のII−VI族半導体膜2を形
成した青色発光半導体レーザである。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment in which the present invention is applied to a semiconductor laser device will be described below with reference to the drawings. FIG. 1 schematically shows the configuration of this embodiment. The device shown in this figure is
This is a blue light emitting semiconductor laser in which a ZnCdSSe-based II-VI group semiconductor film 2 is formed on a type GaAs substrate 1.

【0023】II−VI族半導体膜2は、バッファ層である
N型ZnSe層3、クラッド層であるN型ZnSSe層4、ZnCdS
e層5、クラッド層であるP型ZnSSe層6及びバッファ層
であるP型ZnSe層7をその順序でN型GaAs基板1上にM
BE成長させたものであって、これによりN型ZnSe層
3、N型ZnSSe層4からなる半導体N型層8と、P型ZnS
Se層6、P型ZnSe層7からなる半導体P型層9とのPN
接合部に活性層としてのZnCdSe層5が挟み込まれたPN
接合素子構造に構成されるものである。
The II-VI group semiconductor film 2 includes an N-type ZnSe layer 3 which is a buffer layer, an N-type ZnSSe layer 4 which is a clad layer, and ZnCdS.
An e-layer 5, a P-type ZnSSe layer 6 which is a clad layer, and a P-type ZnSe layer 7 which is a buffer layer are formed on the N-type GaAs substrate 1 in the order named M.
It was grown by BE, whereby a semiconductor N-type layer 8 composed of an N-type ZnSe layer 3 and an N-type ZnSSe layer 4 and a P-type ZnS layer were formed.
PN with the semiconductor P-type layer 9 composed of the Se layer 6 and the P-type ZnSe layer 7
PN with ZnCdSe layer 5 as an active layer sandwiched in the junction
It is configured as a junction element structure.

【0024】前記II−VI族半導体膜最上層のP型ZnSe層
7上には、MBE成長させたP型AlGaAs膜10を形成
し、さらに該P型AlGaAs膜10上に同様にMBE成長さ
せたP型GaAs膜11を形成してあり、その上で該P型Ga
As膜11上にAu等の金属を蒸着して正電極12が形成さ
れている。13は負電極であって、N型GaAs基板1の裏
面に正電極12と同様のAu等の金属を蒸着することによ
り形成されている。
An MBE-grown P-type AlGaAs film 10 is formed on the P-type ZnSe layer 7 which is the uppermost layer of the II-VI group semiconductor film, and further MBE-grown on the P-type AlGaAs film 10 in the same manner. A P-type GaAs film 11 is formed, and the P-type Ga is formed on the P-type GaAs film 11.
A positive electrode 12 is formed on the As film 11 by depositing a metal such as Au. Reference numeral 13 denotes a negative electrode, which is formed on the back surface of the N-type GaAs substrate 1 by vapor-depositing a metal such as Au similar to that of the positive electrode 12.

【0025】なお、本実施例では図2の平面図に示すよ
うに、正電極12を一定幅の帯状に形成することによ
り、電流拡散を防止し、該電流が効率よく発光に寄与す
るようにしているが、正電極12の形状は必ずしも帯状
に限定されるものではない。
In this embodiment, as shown in the plan view of FIG. 2, the positive electrode 12 is formed in a band shape with a constant width to prevent current diffusion and to contribute efficiently to the light emission. However, the shape of the positive electrode 12 is not necessarily limited to the band shape.

【0026】上記構成において、正負電極12、13間
に順方向、つまり正電極12から負電極13へバイアス
電圧を印加すると、電流は正電極12、P型GaAs膜11
及びP型AlGaAs膜10を経てII−VI族半導体膜2へと流
れ、該電流によって正孔が正電極12とII−VI族半導体
膜2との間のエネルギー障壁を越えて、半導体P型層9
から活性層であるZnCdSe層5へと流れ込み、同様に電子
は半導体N型層8からZnCdSe層5へと流れ込む。
When a bias voltage is applied between the positive and negative electrodes 12 and 13 in the forward direction, that is, when a bias voltage is applied from the positive electrode 12 to the negative electrode 13 in the above structure, a current flows in the positive electrode 12 and the P-type GaAs film 11.
And through the P-type AlGaAs film 10 to the II-VI group semiconductor film 2 and the current causes the holes to pass through the energy barrier between the positive electrode 12 and the II-VI group semiconductor film 2 and the semiconductor P-type layer. 9
Flow into the ZnCdSe layer 5, which is an active layer, and similarly electrons flow from the semiconductor N-type layer 8 into the ZnCdSe layer 5.

【0027】このようにしてキャリアが注入されること
により、エネルギレベルの低いZnCdSe層5に閉じ込めら
れた電子と正孔の再結合が起こり、該ZnCdSe層5から自
然光を放出する。さらに、励起電流が閾値を越えると、
自然光の放出から誘導放出に移行し、ZnCdSe層5の平行
両端面間で光が共振してレーザ発振が起こる。
By injecting carriers in this way, electrons and holes confined in the ZnCdSe layer 5 having a low energy level are recombined, and natural light is emitted from the ZnCdSe layer 5. Furthermore, when the excitation current exceeds the threshold,
Transition from natural light emission to stimulated emission occurs, and light resonates between both parallel end faces of the ZnCdSe layer 5, causing laser oscillation.

【0028】図3は本実施例におけるエネルギバンドの
状態を示している。この図に示すように、各層の正電極
12に対するエネルギーバンドのギャップの大きさは、
P型GaAs膜11<P型AlGaAs膜10<II−VI族半導体膜
2のP型ZnSe層7の順に高くなっている。従って、正電
極12からP型ZnSe層7に至る間のエネルギー障壁は3
段階の階段状となり、それぞれの電位差は、正電極12
とP型GaAs膜11間がΔV1 、P型GaAs膜11とP型Al
GaAs膜10間がΔV2 、P型AlGaAs膜10とP型ZnSe層
7間がΔV3となる。
FIG. 3 shows the state of the energy band in this embodiment. As shown in this figure, the size of the energy band gap with respect to the positive electrode 12 of each layer is
The P-type GaAs film 11 <P-type AlGaAs film 10 <the P-type ZnSe layer 7 of the II-VI group semiconductor film 2 increases in this order. Therefore, the energy barrier between the positive electrode 12 and the P-type ZnSe layer 7 is 3
It becomes a step-like step, and the potential difference between each is the positive electrode 12
ΔV 1 between the P-type GaAs film 11 and the P-type GaAs film 11, and the P-type GaAs film 11 and the P-type Al
The space between the GaAs films 10 is ΔV 2 , and the space between the P-type AlGaAs film 10 and the P-type ZnSe layer 7 is ΔV 3 .

【0029】そして、これらΔV1〜ΔV3の和は、図6
に示した従来構成の正電極28とP型ZnSe層27間の電
位差ΔVとほぼ等しいものであるが、正負電極12、1
3間のPN接合構造を流れる電流量はエネルギー障壁の
高さに対して指数関数的に減少する。
The sum of these ΔV 1 to ΔV 3 is shown in FIG.
Although the potential difference ΔV between the positive electrode 28 and the P-type ZnSe layer 27 of the conventional configuration shown in FIG.
The amount of current flowing through the PN junction structure between the three decreases exponentially with the height of the energy barrier.

【0030】図4は本実施例及び従来例の電圧/電流特
性を示している。この図から明らかなように、本実施例
では従来例と比較して、同一電位差のエネルギー障壁で
あっても、正孔hが正電極12とP型ZnSe層7間のエネ
ルギー障壁を越えるのに必要な電流を得るための電圧を
大きく低下させることが可能になる。
FIG. 4 shows the voltage / current characteristics of this embodiment and the conventional example. As is clear from this figure, in this embodiment, compared with the conventional example, even if the energy barrier of the same potential difference, the holes h exceed the energy barrier between the positive electrode 12 and the P-type ZnSe layer 7. It is possible to greatly reduce the voltage for obtaining the required current.

【0031】次に、上記構成の半導体レーザー装置の製
造工程を説明すると、まず基板温度が350℃以下の所
定温度値に設定されたN型GaAs基板1上に、ZnCdSSe系
のII−VI族半導体膜2をMBE成長させることにより、
該N型GaAs基板1上にN型ZnSe層3、N型ZnSSe層4、Z
nCdSe層5、P型ZnSSe層6及びP型ZnSe層7を積層状に
形成する。
Next, the manufacturing process of the semiconductor laser device having the above structure will be described. First, a ZnCdSSe group II-VI group semiconductor is formed on an N-type GaAs substrate 1 whose substrate temperature is set to a predetermined temperature value of 350 ° C. or less. By MBE growing the film 2,
N-type ZnSe layer 3, N-type ZnSSe layer 4, Z on the N-type GaAs substrate 1.
The nCdSe layer 5, the P-type ZnSSe layer 6 and the P-type ZnSe layer 7 are formed in a laminated shape.

【0032】次いで、II−VI族半導体膜2の成長時にお
ける基板温度以下の基板温度、従って350℃よりも低
い、例えば300℃程度に基板温度を設定し、この温度
条件下でII−VI族半導体膜2の最上層であるP型ZnSe層
7上にP型AlGaAs膜10をMBE成長させる。この場
合、P型AlGaAs膜10のキャリア濃度は1019/cm3
上とする。
Then, the substrate temperature is set lower than the substrate temperature during the growth of the II-VI group semiconductor film 2, that is, lower than 350 ° C., for example, about 300 ° C., and under this temperature condition, the II-VI group is formed. A P-type AlGaAs film 10 is MBE grown on the P-type ZnSe layer 7 which is the uppermost layer of the semiconductor film 2. In this case, the carrier concentration of the P-type AlGaAs film 10 is 10 19 / cm 3 or more.

【0033】さらに、P型AlGaAs膜10上にP型GaAs膜
11をMBE成長させる。この場合、P型GaAs膜11
は、その膜厚が臨界膜厚以下で、キャリア濃度が前記P
型AlGaAs膜10と同様に1019/cm3 以上とする。ま
た、このときの基板温度もP型AlGaAs膜10の成長時と
同様にII−VI族半導体膜2の成長時における基板温度以
下に設定している。
Further, the P-type GaAs film 11 is MBE-grown on the P-type AlGaAs film 10. In this case, the P-type GaAs film 11
Is less than the critical thickness, and the carrier concentration is P
Similar to the type AlGaAs film 10, it is 10 19 / cm 3 or more. Further, the substrate temperature at this time is also set to be equal to or lower than the substrate temperature at the time of growing the II-VI group semiconductor film 2 as in the case of growing the P-type AlGaAs film 10.

【0034】このようにP型AlGaAs膜10及びP型GaAs
膜11の成長温度をZnCdSSe系のII−VI族半導体膜2の
成長温度以下にすることにより、P型ZnSe層7へのP型
AlGaAs膜10及びP型GaAs膜11が拡散して電気的に高
抵抗な合金層が生成されるのが防止され、該P型ZnSe層
7が変質するのを回避することができる。
As described above, the P-type AlGaAs film 10 and the P-type GaAs
By setting the growth temperature of the film 11 to be equal to or lower than the growth temperature of the ZnCdSSe-based II-VI group semiconductor film 2, the P-type ZnSe layer 7
It is possible to prevent the AlGaAs film 10 and the P-type GaAs film 11 from being diffused to form an alloy layer having a high electrical resistance, and to prevent the P-type ZnSe layer 7 from being altered.

【0035】P型AlGaAs膜10上にP型GaAs膜11が形
成された後、該P型GaAs膜11上に正電極12となるAu
等の金属を蒸着し、さらに正電極12、P型GaAs膜11
及びP型AlGaAs膜10の不要部分をエッチング等の手法
により除去し、最終的に図2に示したように、これらP
型AlGaAs膜10、P型GaAs膜11及び正電極12を帯状
に成形する。
After the P-type GaAs film 11 is formed on the P-type AlGaAs film 10, Au serving as the positive electrode 12 is formed on the P-type GaAs film 11.
And other metals are vapor-deposited, and the positive electrode 12 and the P-type GaAs film 11 are further deposited.
And unnecessary portions of the P-type AlGaAs film 10 are removed by a method such as etching, and finally, as shown in FIG.
The AlGaAs film 10, the P-type GaAs film 11 and the positive electrode 12 are formed into a strip shape.

【0036】なお、上記実施例では、半導体膜2はZnCd
SSe系II−VI族半導体により構成されているものを示し
たが、本発明では、該半導体膜2をMgZnCdSSe系II−VI
族半導体により構成しても、同様の作用、効果を得るこ
とができる。
In the above embodiment, the semiconductor film 2 is made of ZnCd.
Although shown as being composed of an SSe-based II-VI group semiconductor, in the present invention, the semiconductor film 2 is formed of MgZnCdSSe-based II-VI.
Even if it is made of a group semiconductor, the same action and effect can be obtained.

【0037】[0037]

【発明の効果】以上説明したように本発明の半導体発光
装置によるときは、GaAs基板上にMBE成長したZnCdSS
e系またはMgZnCdSSe系のII−VI族半導体膜上に、MBE
成長させてなるP型AlGaAs膜とP型GaAs膜とをその順序
で積層状に形成し、さらに前記P型GaAs膜上に電極を形
成しているので、正負電極間にバイアス電圧を印加した
とき、電極と半導体P型層間に急峻なエネルギー障壁が
生じるのではなく、P型AlGaAs膜及びP型GaAs膜の存在
によって段階的に分割されたエネルギー障壁が発生する
ことになる。
As described above, according to the semiconductor light emitting device of the present invention, ZnCdSS grown by MBE on a GaAs substrate is grown.
MBE is formed on the e-based or MgZnCdSSe-based II-VI group semiconductor film.
When the bias voltage is applied between the positive and negative electrodes, the grown P-type AlGaAs film and the P-type GaAs film are laminated in that order and electrodes are further formed on the P-type GaAs film. A sharp energy barrier does not occur between the electrode and the semiconductor P-type layer, but an energy barrier divided in stages is generated due to the existence of the P-type AlGaAs film and the P-type GaAs film.

【0038】この場合、正負電極間のPN接合構造を流
れる電流量はエネルギー障壁の高さに対して指数関数的
に減少するので、電流が流れやすくなる。従って、同一
電位差のエネルギー障壁であっても、正孔が電極と半導
体P型層との間のエネルギー障壁を越えるのに必要な電
流を得るための電圧を従来と比較して大きく低下させる
ことができる。
In this case, the amount of current flowing through the PN junction structure between the positive and negative electrodes exponentially decreases with respect to the height of the energy barrier, so that the current easily flows. Therefore, even if the energy barriers have the same potential difference, the voltage for obtaining the current required for holes to cross the energy barrier between the electrode and the semiconductor P-type layer can be greatly reduced as compared with the conventional case. it can.

【0039】このように本発明では、II−VI族P型膜と
電極との間における電圧/電流特性が小さな電圧で必要
な電流が流れるように改善されるので、装置の動作に必
要な電流を得るための電圧が低減して、消費電力が減少
する。しかも、電圧を低く抑制できることにより、発熱
量が減少するので、半導体発光装置全体の温度特性の改
善を図ることができ、また、装置の劣化速度も抑えられ
て、製品寿命も長くなる等の優れた効果を発揮するもの
となった。
As described above, in the present invention, the voltage / current characteristic between the II-VI group P-type film and the electrode is improved so that the required current flows at a small voltage, so that the current required for the operation of the device is improved. The voltage for obtaining the voltage is reduced, and the power consumption is reduced. Moreover, since the amount of heat generated is reduced by suppressing the voltage low, it is possible to improve the temperature characteristics of the semiconductor light emitting device as a whole, and it is also possible to suppress the deterioration rate of the device and prolong the product life. It has become effective.

【0040】請求項2によるときは、1019/cm3 以上
のキャリア濃度を有するP型AlGaAs膜及びP型GaAs膜と
することにより、このようなキャリア濃度の高いII−VI
族P型膜を得ることが不可能な現状において、上記電圧
/電流特性の改善効果と相俟って一層、電流の流れやす
い構造とすることができる。
According to the second aspect, the P-type AlGaAs film and the P-type GaAs film having a carrier concentration of 10 19 / cm 3 or more are used, so that the II-VI having such a high carrier concentration is obtained.
In the present situation where it is impossible to obtain a group P-type film, a structure in which a current easily flows can be formed in combination with the effect of improving the voltage / current characteristics.

【0041】請求項3によるときは、前記II−VI族半導
体膜をGaAs基板上でMBE成長させるに際し、基板温度
350℃以下で行うようにし、しかも、このII−VI族半
導体膜の成長時における基板温度以下の基板温度下で、
該II−VI族半導体膜最上層の半導体P型層上にP型AlGa
As膜とP型GaAs膜とをMBE成長させるようにしている
ので、P型AlGaAs膜、P型GaAs膜が拡散して電気的に高
抵抗な合金層が生成されるのが防止され、II−VI族半導
体膜の変質を回避できる。
According to the third aspect, the MBE growth of the II-VI semiconductor film on the GaAs substrate is performed at a substrate temperature of 350 ° C. or lower, and the II-VI semiconductor film is grown. At a substrate temperature below the substrate temperature,
A P-type AlGa layer is formed on the uppermost semiconductor P-type layer of the II-VI group semiconductor film.
Since the As film and the P-type GaAs film are grown by MBE, it is possible to prevent the P-type AlGaAs film and the P-type GaAs film from being diffused to form an electrically high resistance alloy layer. It is possible to avoid alteration of the group VI semiconductor film.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明の実施例の構成を模式的に示す断面
図。
FIG. 1 is a sectional view schematically showing the configuration of an embodiment of the present invention.

【図2】 その平面図。FIG. 2 is a plan view thereof.

【図3】 本実施例におけるエネルギバンドの状態を示
す特性図。
FIG. 3 is a characteristic diagram showing a state of an energy band in the present embodiment.

【図4】 本実施例及び従来例の電圧/電流特性を比較
して示す線図。
FIG. 4 is a diagram showing voltage / current characteristics of the present example and a conventional example in comparison.

【図5】 一般的な半導体レーザの構成及びそれに対応
するエネルギバンドの状態を模式的に示す図。
FIG. 5 is a diagram schematically showing a configuration of a general semiconductor laser and a state of an energy band corresponding to the configuration.

【図6】 従来例の構成を模式的に示す断面図。FIG. 6 is a sectional view schematically showing the configuration of a conventional example.

【図7】 従来例におけるエネルギバンドを示す特性
図。
FIG. 7 is a characteristic diagram showing an energy band in a conventional example.

【符号の説明】[Explanation of symbols]

1 GaAs基板 2 II−VI族半導体膜 5 活性層 8 半導体N型層 9 半導体P型層 10 P型AlGaAs膜 11 P型GaAs膜 12 電極 1 GaAs Substrate 2 II-VI Group Semiconductor Film 5 Active Layer 8 Semiconductor N-type Layer 9 Semiconductor P-type Layer 10 P-type AlGaAs Film 11 P-type GaAs Film 12 Electrode

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 半導体N型層、活性層、半導体P型層が
その順序で積層状に配された半導体膜をGaAs基板上に形
成した半導体発光装置において、前記半導体膜を、前記
GaAs基板上にMBE成長したZnCdSSe系またはMgZnCdSSe
系のII−VI族半導体により形成し、このII−VI族半導体
膜最上層の半導体P型層上に、MBE成長させてなるP
型AlGaAs膜とP型GaAs膜とをその順序で積層状に形成
し、さらに前記P型GaAs膜上に電極を形成したことを特
徴とする半導体発光装置。
1. A semiconductor light emitting device having a semiconductor film, in which a semiconductor N-type layer, an active layer, and a semiconductor P-type layer are stacked in this order on a GaAs substrate, wherein the semiconductor film is
ZnCdSSe system or MgZnCdSSe grown by MBE on GaAs substrate
P formed by MBE growth on the uppermost semiconductor P-type layer of the II-VI semiconductor film of the II-VI group semiconductor film.
A semiconductor light emitting device, characterized in that a p-type AlGaAs film and a p-type GaAs film are laminated in this order, and electrodes are further formed on the p-type GaAs film.
【請求項2】 P型AlGaAs膜及びP型GaAs膜はいずれも
1019/cm3 以上のキャリア濃度を有するものである請
求項1の半導体発光装置。
2. The semiconductor light emitting device according to claim 1, wherein both the P-type AlGaAs film and the P-type GaAs film have a carrier concentration of 10 19 / cm 3 or more.
【請求項3】 基板温度350℃以下で半導体N型層、
活性層、半導体P型層の順序でMBE成長したZnCdSSe
系またはMgZnCdSSe系のII−VI族半導体膜をGaAs基板上
に形成した後、このII−VI族半導体膜の成長時における
基板温度以下の基板温度下で、該II−VI族半導体膜最上
層の半導体P型層上にP型AlGaAs膜とP型GaAs膜とをそ
の順序でMBE成長し、さらに前記P型GaAs膜上に電極
を形成したことを特徴とする半導体発光装置の製造方
法。
3. A semiconductor N-type layer at a substrate temperature of 350 ° C. or lower,
MBC grown ZnCdSSe in order of active layer and semiconductor P-type layer
System or MgZnCdSSe system II-VI group semiconductor film is formed on a GaAs substrate, under the substrate temperature below the substrate temperature during the growth of the II-VI group semiconductor film, the II-VI group semiconductor film top layer A method of manufacturing a semiconductor light emitting device, comprising: forming a P-type AlGaAs film and a P-type GaAs film on a semiconductor P-type layer by MBE in that order, and further forming an electrode on the P-type GaAs film.
JP13713393A 1993-06-08 1993-06-08 Method for manufacturing semiconductor light emitting device Expired - Fee Related JP3288479B2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP13713393A JP3288479B2 (en) 1993-06-08 1993-06-08 Method for manufacturing semiconductor light emitting device
EP94108622A EP0632510B1 (en) 1993-06-08 1994-06-06 Semiconductor light emitting device and its manufacturing method
DE69428835T DE69428835T2 (en) 1993-06-08 1994-06-06 Semiconductor light emitting device and manufacturing method
US08/255,933 US5548127A (en) 1993-06-08 1994-06-07 Semiconductor light emitting device and its manufacturing method

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JP13713393A JP3288479B2 (en) 1993-06-08 1993-06-08 Method for manufacturing semiconductor light emitting device

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JPH06350199A true JPH06350199A (en) 1994-12-22
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8934513B2 (en) 1994-09-14 2015-01-13 Rohm Co., Ltd. Semiconductor light emitting device and manufacturing method therefor
JP2021534590A (en) * 2018-08-22 2021-12-09 オスラム オーエルイーディー ゲゼルシャフト ミット ベシュレンクテル ハフツングOSRAM OLED GmbH A method for manufacturing a photoelectron semiconductor component having a semiconductor contact layer and a photoelectron semiconductor component.

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8934513B2 (en) 1994-09-14 2015-01-13 Rohm Co., Ltd. Semiconductor light emitting device and manufacturing method therefor
JP2021534590A (en) * 2018-08-22 2021-12-09 オスラム オーエルイーディー ゲゼルシャフト ミット ベシュレンクテル ハフツングOSRAM OLED GmbH A method for manufacturing a photoelectron semiconductor component having a semiconductor contact layer and a photoelectron semiconductor component.

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