JPH0634674A - Current measuring device - Google Patents

Current measuring device

Info

Publication number
JPH0634674A
JPH0634674A JP4153034A JP15303492A JPH0634674A JP H0634674 A JPH0634674 A JP H0634674A JP 4153034 A JP4153034 A JP 4153034A JP 15303492 A JP15303492 A JP 15303492A JP H0634674 A JPH0634674 A JP H0634674A
Authority
JP
Japan
Prior art keywords
resistor
voltage
terminal
current
switch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4153034A
Other languages
Japanese (ja)
Inventor
Yasuhiko Miki
安彦 三木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tektronix Japan Ltd
Original Assignee
Sony Tektronix Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Tektronix Corp filed Critical Sony Tektronix Corp
Priority to JP4153034A priority Critical patent/JPH0634674A/en
Publication of JPH0634674A publication Critical patent/JPH0634674A/en
Pending legal-status Critical Current

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  • Testing Of Individual Semiconductor Devices (AREA)
  • Measurement Of Current Or Voltage (AREA)

Abstract

PURPOSE:To obtain the resistance of a second resistor and to measure current accurately even if an accurate, stable, and expensive resistor is not used as a resistor for measuring current by selecting the connection state of switches and then using a known first resistor. CONSTITUTION:A first resistor 14 whose resistance is known and a second resistor 28 for measuring current and then a circuit net consisting of first, second, and third switches 24, 16, and 26 are connected between an inverted input terminal and an output terminal of an operational amplifier 10 where a known voltage is supplied to a non-inverted input terminal. A voltage between both terminals of the second resistor 28 for measuring current is detected by a differential amplifier 18, is converted to a digital value by an A/D converter, and then is processed by a CPU 2.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、電流測定装置、特に、
高精度の高価な高抵抗器を必要としない微小電流測定装
置に関する。
BACKGROUND OF THE INVENTION The present invention relates to a current measuring device, in particular
The present invention relates to a minute current measuring device which does not require a highly accurate and expensive high resistor.

【0002】[0002]

【従来の技術及び発明が解決しようとする課題】従来、
電流値を測定する際には、既知の抵抗値を有する測定用
抵抗器に被測定電流を供給し、測定用抵抗器の両端電圧
を測定し、測定電圧値を既知の抵抗値でわり算すること
により、被測定電流値を得ている。特に、被測定電流が
マイクロ・アンペア又はピコ・アンペアのオーダーの微
小電流である場合は、測定用抵抗器は高抵抗値を有する
ことが要求される。しかし、通常、高抵抗値の抵抗器
は、低抵抗値の抵抗器に比較して、抵抗値の精度及び長
期的安定性が劣っている。また、高精度の高抵抗値の抵
抗器は高価であり、電流測定器の製造コストが上がる。
更に、精度の高い抵抗器を使用しても、安定性の問題に
より、長期にわたる正確な測定が困難である。
2. Description of the Related Art Conventionally, the problems to be solved by the invention
When measuring the current value, supply the current to be measured to a measuring resistor with a known resistance value, measure the voltage across the measuring resistor, and divide the measured voltage value by the known resistance value. Thus, the measured current value is obtained. In particular, when the current to be measured is a minute current of the order of microampere or picoampere, the measuring resistor is required to have a high resistance value. However, normally, a high resistance resistor is inferior to a low resistance resistor in terms of resistance value accuracy and long-term stability. Further, a highly accurate resistor having a high resistance value is expensive, and the manufacturing cost of the current measuring device is increased.
Further, even if a highly accurate resistor is used, long-term accurate measurement is difficult due to the stability problem.

【0003】したがって、本発明の目的は、高価な抵抗
器を必要とせずに正確な測定が可能な電流測定装置の提
供にある。
Therefore, an object of the present invention is to provide a current measuring device capable of performing accurate measurement without requiring an expensive resistor.

【0004】[0004]

【課題を解決するための手段】本発明の電流測定装置に
おいて、中央処理装置(以下CPUという)は、デジタ
ル・アナログ変換器(以下DACという)を制御して、
演算増幅器の非反転入力端子に供給する電圧を設定す
る。演算増幅器の反転入力端子は、電流測定時に被測定
素子を接続するための測定用端子に接続される。演算増
幅器の出力端子及び測定用端子間には、直列接続された
第1スイッチ及び抵抗値が既知の第1抵抗器を含む第1
直列回路と、演算増幅器の出力端子から測定用端子に向
かって順番に直列接続された第2スイッチ及び第2抵抗
器を含む第2直列回路とが接続される。第2スイッチ及
び第2抵抗器の接続点と接地電位源間には、第3スイッ
チが接続される。演算増幅手段の出力端子及び上記測定
用端子間の電圧は、電圧検出手段で検出されて、アナロ
グ・デジタル変換器(以下ADCという)でデジタル値
に変換された後、CPUで処理される。
In the current measuring device of the present invention, a central processing unit (hereinafter referred to as CPU) controls a digital-analog converter (hereinafter referred to as DAC),
Sets the voltage supplied to the non-inverting input terminal of the operational amplifier. The inverting input terminal of the operational amplifier is connected to the measurement terminal for connecting the device under test during current measurement. A first switch including a first switch connected in series and a first resistor having a known resistance value is provided between the output terminal and the measurement terminal of the operational amplifier.
The series circuit and the second series circuit including the second switch and the second resistor, which are serially connected in order from the output terminal of the operational amplifier toward the measurement terminal, are connected. The third switch is connected between the connection point of the second switch and the second resistor and the ground potential source. The voltage between the output terminal of the operational amplification means and the measuring terminal is detected by the voltage detection means, converted into a digital value by an analog-digital converter (hereinafter referred to as ADC), and then processed by the CPU.

【0005】[0005]

【作用】始めに第1及び第3スイッチを閉状態にし、第
2スイッチを開状態にする。この接続状態では、演算増
幅器の出力端子及び接地電位源間に第1及び第2抵抗器
が直列接続され、電圧検出器は第1抵抗器の両端電圧を
検出し、第1及び第2抵抗器の接続点即ち測定用端子の
電圧は、演算増幅器の非反転端子に設定した電圧にな
る。第1及び第2抵抗器を流れる電流は、検出電圧を第
1抵抗器の抵抗値で除算することで求められ、この電流
値で設定電圧値を除算することにより、第2抵抗器の抵
抗値を求めることができる。電流測定を行う場合は、被
測定素子を測定用端子に接続し、第1及び第3スイッチ
を開状態にし、第2スイッチを閉状態にする。この接続
状態では、第2抵抗器が被測定素子と直列接続され、電
圧検出器は、第2抵抗器の両端電圧を検出する。被測定
素子に流れる電流は、検出電圧を第2抵抗器の求めた抵
抗値で除算することにより求められる。このように、ス
イッチの接続状態を選択し、既知の第1抵抗器を使用す
ることにより、第2抵抗器の抵抗を求めることができる
ので、高精度及び高安定性の高価な抵抗器を電流測定用
の抵抗器として使用しなくても、正確な電流測定ができ
る。
First, the first and third switches are closed and the second switch is opened. In this connection state, the first and second resistors are connected in series between the output terminal of the operational amplifier and the ground potential source, the voltage detector detects the voltage across the first resistor, and the first and second resistors are connected. The connection point, that is, the voltage at the measuring terminal becomes the voltage set at the non-inverting terminal of the operational amplifier. The current flowing through the first and second resistors is obtained by dividing the detected voltage by the resistance value of the first resistor, and by dividing the set voltage value by this current value, the resistance value of the second resistor is obtained. Can be asked. When performing current measurement, the device under test is connected to the measurement terminal, the first and third switches are opened, and the second switch is closed. In this connection state, the second resistor is connected in series with the device under test, and the voltage detector detects the voltage across the second resistor. The current flowing through the device under test is obtained by dividing the detected voltage by the resistance value obtained by the second resistor. In this way, the resistance of the second resistor can be obtained by selecting the connection state of the switch and using the known first resistor, so that an expensive resistor with high accuracy and high stability can be used as a current source. Accurate current measurement is possible without using it as a measuring resistor.

【0006】[0006]

【実施例】図1は、本発明の電流測定装置を示すブロッ
ク図である。CPU2は、ホストコンピュータ又はキー
ボードからの入力命令に従い、後述する様にバス4を介
して他の構成要素を制御するためのデータを発生し、且
つ他の構成要素から送られるデータを使用して、測定に
必要な計算を行う。CPU2により得られた測定結果
は、陰極線管の如き表示器6に表示される。
FIG. 1 is a block diagram showing a current measuring device of the present invention. The CPU 2 generates data for controlling other components via the bus 4 as described later according to an input command from the host computer or the keyboard, and uses data sent from the other components, Make the necessary calculations for the measurement. The measurement result obtained by the CPU 2 is displayed on the display 6 such as a cathode ray tube.

【0007】DAC8は、CPU2が入力命令に従って
出力したデジタル電圧データを受け取りアナログ電圧に
変換して出力する。DAC8は、出力アナログ電圧を演
算増幅器10の非反転入力端に供給する。演算増幅器1
0の出力端は、双投スイッチ12の第1接点に接続され
る。双投スイッチ12の第2接点は、抵抗器14の一
端、スイッチ16の一方の接点、差動増幅器18の非反
転入力端及びスイッチ20の一方の接点に接続される。
双投スイッチ12の第3接点は、抵抗器22を介して演
算増幅器10の反転入力端に接続される。双投スイッチ
12の第2及び第3接点は、図中においてX及びYで示
す。抵抗器14の他端は、スイッチ24の一方の接点に
接続される。スイッチ24の他方の接点は直接に、ま
た、スイッチ16の他方の接点、及び一方の接点が接地
されたスイッチ26の他方の接点は、抵抗器28を介し
て出力端子30に接続される。出力端子30は、スイッ
チ32の一方の接点に接続されると共に、高入力インピ
ーダンスを有する利得1の緩衝増幅器35の入力端子に
接続される。緩衝増幅器35の出力端は、出力端子の電
圧を負帰還するために抵抗器36を介して演算増幅器1
0の反転入力端に接続されると共に、差動増幅器18の
反転入力端に接続される。基準電圧源34は、2出力端
子に夫々+V1/2及び−V2/2の電圧を発生し、夫々
スイッチ20及び32の他方の接点に供給する。
The DAC 8 receives the digital voltage data output by the CPU 2 in accordance with the input command, converts the digital voltage data into an analog voltage, and outputs the analog voltage. The DAC 8 supplies the output analog voltage to the non-inverting input terminal of the operational amplifier 10. Operational amplifier 1
The output terminal of 0 is connected to the first contact of the double throw switch 12. The second contact of the double throw switch 12 is connected to one end of the resistor 14, one contact of the switch 16, the non-inverting input end of the differential amplifier 18, and one contact of the switch 20.
The third contact of the double throw switch 12 is connected to the inverting input terminal of the operational amplifier 10 via the resistor 22. The second and third contacts of the double throw switch 12 are indicated by X and Y in the figure. The other end of the resistor 14 is connected to one contact of the switch 24. The other contact of the switch 24 is directly connected, and the other contact of the switch 16 and the other contact of the switch 26 whose one contact is grounded are connected to the output terminal 30 via the resistor 28. The output terminal 30 is connected to one contact of the switch 32 and is also connected to the input terminal of a gain 1 buffer amplifier 35 having a high input impedance. The output terminal of the buffer amplifier 35 is connected to the operational amplifier 1 via the resistor 36 to negatively feed back the voltage of the output terminal.
It is connected to the inverting input terminal of 0 and is also connected to the inverting input terminal of the differential amplifier 18. The reference voltage source 34 generates voltages of + V1 / 2 and -V2 / 2 at the two output terminals, and supplies the voltages to the other contacts of the switches 20 and 32, respectively.

【0008】抵抗器28は、従来の電流測定装置に使用
する如き例えば、数ギガΩの高抵抗値を有する抵抗器で
あり、上述の様に、精度及び長期的安定性が良くない。
したがって、電流測定を行う前に抵抗器28の抵抗値を
測定する必要がある。一方、抵抗器14は、抵抗器28
に比較して低い例えば、数メガΩの既知の抵抗値を有
し、精度及び長期的安定性の良いものを安価で入手する
ことができる。スイッチ12、16、20、24、26
及び32は、望ましくは電子スイッチであり、CPU2
から送られる制御信号によりオン及びオフ状態が選択さ
れる。
The resistor 28 is a resistor having a high resistance value of, for example, several giga Ω as used in a conventional current measuring device, and as described above, the accuracy and the long-term stability are not good.
Therefore, it is necessary to measure the resistance value of the resistor 28 before performing the current measurement. On the other hand, resistor 14 is resistor 28
It has a known resistance value of, for example, several mega Ω, which is lower than that of, and has good accuracy and long-term stability, and can be obtained at low cost. Switches 12, 16, 20, 24, 26
And 32 are preferably electronic switches,
The ON / OFF state is selected by the control signal sent from the.

【0009】差動増幅器18は、演算増幅器10の出力
端及び出力端子30間の差電圧を検出して、可変利得回
路38に供給する。可変利得回路38の利得は、CPU
2からの制御データに従って調整可能である。アナログ
・デジタル変換器(以下ADCという)40は、可変利
得回路38で調整した電圧をデジタル電圧データに変換
し、CPU2に送る。
The differential amplifier 18 detects the difference voltage between the output terminal of the operational amplifier 10 and the output terminal 30 and supplies it to the variable gain circuit 38. The gain of the variable gain circuit 38 is the CPU
It is adjustable according to the control data from 2. An analog / digital converter (hereinafter referred to as ADC) 40 converts the voltage adjusted by the variable gain circuit 38 into digital voltage data and sends it to the CPU 2.

【0010】次に図1の本発明の電流測定装置の動作
を、図2及び図3に示す複数のブロックを含む流れ図を
参照して説明する。CPU2は、ホスト・コンピュータ
又はキーボードから調整命令を受け取り、可変利得回路
38を調整する処理を行う。調整手順において、まず、
CPU2はブロック100で、スイッチ16、24及び
26を開状態にし、スイッチ12をY側に接続し、スイ
ッチ20及び32を閉状態にして、接続状態aにする。
これにより、差動増幅器18の両入力端子には、夫々電
圧+V1/2及び−V1/2が供給され、差動増幅器18
の出力電圧はV1となる。ADC40は、可変利得回路
38に現時点で設定された利得で増幅された電圧をデジ
タル値に変換し、バス4を介してCPU2に送る。CP
U2は、受け取ったデジタル値が電圧V1を示す値であ
るかどうかを調べ、その結果に応じて可変利得回路38
の利得を調整し、ADC40の出力デジタル値が電圧V
1を正確に示すようにする。緩衝増幅器35、差動増幅
器18、可変利得回路38及びADC40の動作に誤差
が無ければ、可変利得回路38の利得は1に設定され
る。しかし、通常は、誤差が存在し、その誤差に応じて
可変利得回路38の利得を1に近い値に設定することに
より総合的に誤差が補償される。ADC40の出力デジ
タル値が電圧V1を示す値となる可変利得回路38の利
得即ち利得Aが決まると、CPU2は、この利得Aに対
応する制御データを記憶し、利得A状態を維持する(ブ
ロック102)。
Next, the operation of the current measuring device of the present invention in FIG. 1 will be described with reference to the flow chart including a plurality of blocks shown in FIGS. The CPU 2 receives an adjustment command from the host computer or the keyboard and performs a process of adjusting the variable gain circuit 38. In the adjustment procedure, first,
In the block 100, the CPU 2 opens the switches 16, 24 and 26, connects the switch 12 to the Y side, and closes the switches 20 and 32 to the connected state a.
As a result, the voltages + V1 / 2 and -V1 / 2 are supplied to both input terminals of the differential amplifier 18, respectively.
Output voltage is V1. The ADC 40 converts the voltage amplified by the gain currently set in the variable gain circuit 38 into a digital value and sends it to the CPU 2 via the bus 4. CP
U2 checks whether the received digital value is a value indicating the voltage V1 and, according to the result, the variable gain circuit 38
Of the output voltage of the ADC 40 is adjusted to the voltage V
Be sure to indicate exactly 1. If there is no error in the operation of the buffer amplifier 35, the differential amplifier 18, the variable gain circuit 38, and the ADC 40, the gain of the variable gain circuit 38 is set to 1. However, normally, there is an error, and the error is comprehensively compensated by setting the gain of the variable gain circuit 38 to a value close to 1 in accordance with the error. When the gain of the variable gain circuit 38, that is, the gain A at which the output digital value of the ADC 40 becomes the value indicating the voltage V1 is determined, the CPU 2 stores the control data corresponding to this gain A and maintains the gain A state (block 102). ).

【0011】次に、CPU2は、ブロック104で、ス
イッチ24及び26を閉状態にし、スイッチ16を開状
態に維持し、スイッチ20及び32を開状態にし、スイ
ッチ12をX側接点に接続して、接続状態bにする。こ
れにより、演算増幅器10の出力電圧は、演算増幅器1
0及び接地電位間に直列接続された抵抗器14及び28
に供給され、抵抗器14の両端電圧は、差動増幅器18
の両入力端間に供給される。可変利得回路38の利得
は、利得Aに維持されている。CPU2は、DAC8に
制御データを供給し、その出力電圧をV2に設定する。
演算増幅器10、抵抗器14、緩衝増幅器35及び抵抗
器36は、負帰還型増幅回路を構成し、出力端子30の
電圧はDAC8の出力電圧V2に等しくなる。
Next, in block 104, the CPU 2 closes the switches 24 and 26, maintains the switch 16 in the open state, opens the switches 20 and 32, and connects the switch 12 to the X-side contact. , Connection state b. As a result, the output voltage of the operational amplifier 10 is
Resistors 14 and 28 connected in series between 0 and ground potential
The voltage across the resistor 14 is supplied to the differential amplifier 18
It is supplied between both input terminals. The gain of the variable gain circuit 38 is maintained at the gain A. The CPU 2 supplies control data to the DAC 8 and sets its output voltage to V2.
The operational amplifier 10, the resistor 14, the buffer amplifier 35, and the resistor 36 constitute a negative feedback type amplifier circuit, and the voltage of the output terminal 30 becomes equal to the output voltage V2 of the DAC 8.

【0012】説明のため、抵抗器14の既知の抵抗値を
R1、抵抗器28の公称抵抗値をR2、実際の抵抗値をR
2’とする。CPU2は、予め抵抗器28の公称抵抗値
R2を使用して、抵抗器14の両端電圧Vxを次の式で計
算し、結果を記憶している。 Vx=(V2/R2)×R1 (1) 次に、ブロック105で抵抗器14の実際の両端電圧V
x’を測定する。このVx’は、次の式で示すことができ
る。 Vx’=(V2/R2’)×R1 (2) 式(1)及び式(2)より、ブロック106で次の式を
用いてR2及びR2’の比を求める。 R2/R2’=Vx’/Vx (3)
For purposes of illustration, the known resistance of resistor 14 is R1, the nominal resistance of resistor 28 is R2, and the actual resistance is R.
2 '. The CPU 2 previously uses the nominal resistance value R2 of the resistor 28 to calculate the voltage Vx across the resistor 14 by the following formula, and stores the result. Vx = (V2 / R2) × R1 (1) Next, in block 105, the actual voltage across the resistor 14 V
Measure x '. This Vx 'can be expressed by the following equation. Vx '= (V2 / R2') * R1 (2) From the formulas (1) and (2), the block 106 calculates the ratio of R2 and R2 'using the following formula. R2 / R2 '= Vx' / Vx (3)

【0013】電流測定を行うには、スイッチ12をX側
接点に接続したままにし、スイッチ16を閉状態にし、
他の全てのスイッチを開状態にし、被測定素子42を出
力端子30に接続して、接続状態cにする。出力端子4
0の電圧は、演算増幅器10の非反転端子の電圧に等し
く、被測定素子のインピーダンスにより決まる被測定電
流が演算増幅器10、スイッチ12、抵抗器28及び被
測定素子を流れる。スイッチ26は、抵抗器28の演算
増幅器10側に接続されているので、スイッチ26の漏
れ電流は、抵抗器28を流れる電流に影響しない。差動
増幅器18は、被測定電流により生じる抵抗器28の両
端電圧V3を検出する。被測定電流は、測定電圧を式
(2)から求めたR2’で除算して求められる。このよ
うに、第2抵抗器より抵抗値が低く、高精度且つ高安定
性の第1抵抗器を使用し、第2抵抗器の抵抗値を求めた
後、電流測定を行うので、高精度及び高安定性の高価な
抵抗器を使用しなくても、正確な電流測定ができる
To make the current measurement, leave switch 12 connected to the X-side contact and switch 16 closed.
All the other switches are opened, the device under test 42 is connected to the output terminal 30, and the connection state c is established. Output terminal 4
The voltage of 0 is equal to the voltage of the non-inverting terminal of the operational amplifier 10, and the measured current determined by the impedance of the device under test flows through the operational amplifier 10, the switch 12, the resistor 28 and the device under test. Since the switch 26 is connected to the operational amplifier 10 side of the resistor 28, the leakage current of the switch 26 does not affect the current flowing through the resistor 28. The differential amplifier 18 detects the voltage V3 across the resistor 28 caused by the measured current. The current to be measured is obtained by dividing the measured voltage by R2 'obtained from the equation (2). As described above, since the first resistor having a resistance value lower than that of the second resistor and having high accuracy and high stability is used, and the resistance value of the second resistor is obtained, the current measurement is performed, the high accuracy and Accurate current measurement without the use of expensive high stability resistors

【0014】しかし、厳密に言えば、この際に、R2’
及びV3の各々の値を、デジタル計算することにより、
切り捨てによる誤差が生じる。また、抵抗器28の公称
抵抗値R2が例えば5GΩであるが、測定値R2’が4.
95GΩであった場合、電圧V3を5×10*9(N*n
は、Nのn乗を表す。)で除算するの比較して、4.95
×10*9で除算するほうが、計算に多くのビット数を必
要とする。ビット数が多くなれば、それだけ計算時間が
長くなり、また、限られたビット数で計算すれば、切り
捨てによる計算誤差が大きくなる。
Strictly speaking, however, at this time, R2 '
By digitally calculating each value of V3 and V3,
An error occurs due to truncation. Further, the nominal resistance value R2 of the resistor 28 is, for example, 5 GΩ, but the measured value R2 ′ is 4.
When it is 95 GΩ, the voltage V3 is 5 × 10 * 9 (N * n
Represents Nth power of n. ) Divided by 4.95 compared
Dividing by × 10 * 9 requires a larger number of bits for calculation. The larger the number of bits, the longer the calculation time, and the more limited the number of bits, the larger the calculation error due to truncation.

【0015】この問題を解決するために、本発明では、
更に、可変利得回路38の利得を適切に調整することに
より、電流測定時に、デジタル計算の回数を減らし、更
に、ADC40の出力デジタル値が、あたかも公称抵抗
値R2を有する抵抗器28に生じた電圧を示すようにし
ている。そのために、電流測定時の抵抗器28の両端電
圧に、公称抵抗値R2及び実際の抵抗値R2’の比R2/
R2’に等しいVx’/Vxを乗算した値がADC40の
出力に現れるように、可変利得回路38の利得を調整す
る。
In order to solve this problem, in the present invention,
Further, by properly adjusting the gain of the variable gain circuit 38, the number of digital calculations is reduced during the current measurement, and the output digital value of the ADC 40 is the voltage generated in the resistor 28 having the nominal resistance value R2. Is shown. Therefore, the ratio of the nominal resistance value R2 and the actual resistance value R2 'to the voltage across the resistor 28 during current measurement, R2 /
The gain of the variable gain circuit 38 is adjusted so that the value obtained by multiplying Vx '/ Vx equal to R2' appears at the output of the ADC 40.

【0016】この様に可変利得回路38を調整するため
に、CPU2は接続状態bにおいて、ブロック106に
続いて、ブロック108で、(Vx’×Vx’)/Vxを
計算し、記憶する。次に、ブロック110で、CPU2
は、ADC40の出力デジタル値が示す電圧が、(V
x’×Vx’)/Vxより大きいかどうかを調べる。現時
点では、可変利得回路38は、略1である利得Aに設定
してあるので、ADC40の出力デジタル値は略Vx’
に相当する。したがって、実際の抵抗値R2’が公称抵
抗値R2よりも大きければVx’/Vx<1となり、AD
C40の出力デジタル値は(Vx’×Vx’)/Vxより
大きいと判断されてブロック112に移り、可変利得回
路38の利得が減少される。大きいと判断されなけれ
ば、ブロック114に移る。実際の抵抗値R2’が公称
抵抗値R2よりも小さければ、Vx’/Vx>1となり、
ADC40の出力デジタル値は(Vx’×Vx’)/Vx
より小さいと判断されてブロック116に移り、可変利
得回路38の利得が増加される。
In order to adjust the variable gain circuit 38 in this manner, in the connection state b, the CPU 2 calculates and stores (Vx '* Vx') / Vx in the block 108 following the block 106. Next, in block 110, the CPU 2
Indicates that the voltage indicated by the output digital value of the ADC 40 is (V
x '× Vx') / Vx. At present, the variable gain circuit 38 is set to the gain A which is approximately 1, so that the output digital value of the ADC 40 is approximately Vx '.
Equivalent to. Therefore, if the actual resistance value R2 'is larger than the nominal resistance value R2, Vx' / Vx <1 and AD
The output digital value of C40 is determined to be greater than (Vx '* Vx') / Vx and the process proceeds to block 112, where the gain of the variable gain circuit 38 is decreased. If it is not determined to be large, the process moves to block 114. If the actual resistance value R2 'is smaller than the nominal resistance value R2, then Vx' / Vx> 1,
The output digital value of ADC 40 is (Vx '× Vx') / Vx
If it is determined to be smaller, the process proceeds to block 116, and the gain of the variable gain circuit 38 is increased.

【0017】ブロック112又はブロック116で利得
が増減された後、再びADC40の出力デジタル値及び
(Vx’×Vx’)/Vxの大小関係が調べられ、必要に
応じて利得が増減される。この様な処理を繰り返した
後、ADC40の出力デジタル値が示す電圧が(Vx’
×Vx’)/Vxに等しいと判断されると、ブロック11
8に移り、そのときの可変利得回路38の利得Bを設定
するための制御データがCPU2に記憶され、利得B状
態が維持される。この利得設定は、緩衝増幅器32、差
動増幅器18、可変利得回路38及びADC40の固有
の誤差を加味して行われるので正確である。
After the gain is increased or decreased in the block 112 or the block 116, the magnitude relationship between the output digital value of the ADC 40 and (Vx '* Vx') / Vx is checked again, and the gain is increased or decreased as necessary. After repeating such processing, the voltage indicated by the output digital value of the ADC 40 becomes (Vx '
× Vx ') / Vx, block 11
8, the control data for setting the gain B of the variable gain circuit 38 at that time is stored in the CPU 2, and the gain B state is maintained. This gain setting is accurate because it takes into account the inherent errors of the buffer amplifier 32, the differential amplifier 18, the variable gain circuit 38, and the ADC 40.

【0018】電流測定を行うには、ブロック120で上
述した接続状態cにする。抵抗器28の両端電圧V3が
ADC40の出力端において正確にVx’/Vx倍され、
抵抗器28が公称抵抗値を有する状態が仮想される。C
PU2は、ADC40の出力デジタル値を、予め記憶し
てある例えば5.0MΩである公称抵抗値で除算するこ
とにより、被測定電流を測定することができる。この測
定では、ADC40の入力電圧は、アナログ的に調整さ
れており、ADC40の出力デジタル値を、有効数字の
桁数の少ない公称抵抗値で1回だけデジタル計算するこ
とができるので、正確に電流測定を行うことができる。
To perform the current measurement, block 120 sets the connection state c as described above. The voltage V3 across the resistor 28 is exactly Vx '/ Vx times at the output of the ADC 40,
It is assumed that the resistor 28 has a nominal resistance value. C
The PU 2 can measure the measured current by dividing the output digital value of the ADC 40 by the nominal resistance value which is stored in advance and is 5.0 MΩ, for example. In this measurement, the input voltage of the ADC 40 is adjusted in an analog manner, and the output digital value of the ADC 40 can be digitally calculated only once with a nominal resistance value having a small number of significant figures, so that the current value is accurately calculated. A measurement can be made.

【0019】[0019]

【発明の効果】本発明の電流測定装置では、電流測定用
抵抗器より抵抗値が低く、高精度且つ高安定性の抵抗器
を使用し、電流測定用抵抗器の抵抗値を求めた後、電流
測定を行うので、高精度及び高安定性の高価な電流測定
用抵抗器を使用しなくても、正確な電流測定ができる
In the current measuring device of the present invention, the resistance value of the current measuring resistor is lower than that of the current measuring resistor, and the resistance value of the current measuring resistor is obtained after the resistance value of the current measuring resistor is calculated. Since current is measured, accurate current can be measured without using expensive current measuring resistors with high accuracy and high stability.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の電流測定装置の実施例を示すブロック
図である。
FIG. 1 is a block diagram showing an embodiment of a current measuring device of the present invention.

【図2】図1の装置の動作を説明するための流れ図であ
る。
2 is a flow chart for explaining the operation of the apparatus of FIG.

【図3】図1の装置の動作を説明するための流れ図であ
る。
FIG. 3 is a flowchart for explaining the operation of the apparatus of FIG.

【符号の説明】[Explanation of symbols]

10 演算増幅手段 14 第1抵抗器 16 第2スイッチ手段 18 電圧検出器 24 第1スイッチ手段 26 第3スイッチ手段 28 第2抵抗器 10 Operational Amplifier Means 14 First Resistor 16 Second Switch Means 18 Voltage Detector 24 First Switch Means 26 Third Switch Means 28 Second Resistor

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 測定用端子と、 非反転入力端子に既知の電圧が供給され、反転入力端子
が上記測定用端子に接続された演算増幅手段と、 該演算増幅手段の出力端子及び上記測定用端子間に直列
接続された第1スイッチ手段及び抵抗値が既知の第1抵
抗器を含む第1直列回路と、 上記演算増幅手段の出力端子及び上記測定用端子間に順
番に直列接続された第2スイッチ手段及び第2抵抗器を
含む第2直列回路と、 上記第2スイッチ手段及び上記第2抵抗器の接続点と基
準電位源間に接続された第3スイッチ手段と、 上記演算増幅手段の出力端子及び上記測定用端子間の電
圧を検出する電圧検出手段とを具えることを特徴とする
電流測定装置。
1. A measurement terminal, a non-inverting input terminal to which a known voltage is supplied, and an inverting input terminal connected to the measurement terminal, an operational amplifier means, an output terminal of the operational amplifier means and the measurement terminal. A first series circuit including first switch means connected in series between terminals and a first resistor having a known resistance value; and a first series circuit connected in series between the output terminal of the operational amplification means and the measurement terminal in order. A second series circuit including two switch means and a second resistor; a third switch means connected between a connection point of the second switch means and the second resistor and a reference potential source; A current measuring device comprising a voltage detecting means for detecting a voltage between an output terminal and the measuring terminal.
JP4153034A 1992-05-21 1992-05-21 Current measuring device Pending JPH0634674A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4153034A JPH0634674A (en) 1992-05-21 1992-05-21 Current measuring device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4153034A JPH0634674A (en) 1992-05-21 1992-05-21 Current measuring device

Publications (1)

Publication Number Publication Date
JPH0634674A true JPH0634674A (en) 1994-02-10

Family

ID=15553529

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4153034A Pending JPH0634674A (en) 1992-05-21 1992-05-21 Current measuring device

Country Status (1)

Country Link
JP (1) JPH0634674A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7138819B2 (en) 2002-06-13 2006-11-21 Advantest Corp. Differential voltage measuring apparatus and semiconductor testing apparatus

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0245768A (en) * 1988-08-05 1990-02-15 Advantest Corp Voltage application current measuring instrument with automatic calibrating function

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0245768A (en) * 1988-08-05 1990-02-15 Advantest Corp Voltage application current measuring instrument with automatic calibrating function

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7138819B2 (en) 2002-06-13 2006-11-21 Advantest Corp. Differential voltage measuring apparatus and semiconductor testing apparatus

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