JPH06342855A - Semiconductor package with inner lid - Google Patents

Semiconductor package with inner lid

Info

Publication number
JPH06342855A
JPH06342855A JP5131698A JP13169893A JPH06342855A JP H06342855 A JPH06342855 A JP H06342855A JP 5131698 A JP5131698 A JP 5131698A JP 13169893 A JP13169893 A JP 13169893A JP H06342855 A JPH06342855 A JP H06342855A
Authority
JP
Japan
Prior art keywords
inner lid
gel
wire
coating agent
semiconductor package
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP5131698A
Other languages
Japanese (ja)
Inventor
Takashi Miwa
孝志 三輪
Hiroshi Kuroda
宏 黒田
Masayuki Shirai
優之 白井
Toshihiro Tsuboi
敏宏 坪井
Hiroshi Kosaku
浩 小作
Masayuki Kikuchi
真之 菊池
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi ULSI Engineering Corp
Hitachi Ltd
Original Assignee
Hitachi ULSI Engineering Corp
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi ULSI Engineering Corp, Hitachi Ltd filed Critical Hitachi ULSI Engineering Corp
Priority to JP5131698A priority Critical patent/JPH06342855A/en
Publication of JPH06342855A publication Critical patent/JPH06342855A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/49105Connecting at different heights
    • H01L2224/49109Connecting at different heights outside the semiconductor or solid-state body

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PURPOSE:To suppress an effect of heat shrinkage of a wire due to the displacement of gel in a part being in contact with an inner lid and in the periphery of the part and thereby to ensure high reliability, by providing the inner lid so that it comes into contact with the gel. CONSTITUTION:An electrode 7 of a chip 2 and an electrode 8 of a base 1 are connected by a wire 9. Since the wire 9 is liable to corrode, the chip 2 and the wire 9 are coated with a gel-like coating agent 10 so as to ensure moisture resistance. Next, a ring-shaped inner lid 11 having an insulated surface is put on so that it is in contact with the surface of this gel-like coating agent 10, and then the gel-like coating agent 10 is gelatinized by baking. The inner lid 11 has bent legs 12 at four corners and thereby a prescribed height thereof is maintained. By providing a hole 13 for letting out air in the central part of the inner lid 11, a gas produced on the occasion when the gel-like coating agent 10 is gelatinized by baking (heating) is let out. Lastly, a cap 14 is stuck so as to protect the inside mechanically.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、中蓋付き半導体パッケ
−ジに関し、特に、半導体集積回路の高信頼化技術に係
るもので、就中、微細多ピンの半導体チップを高耐湿性
を確保しつつ低コスト化を実現するのに好適なパッケ−
ジ構造に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor package with an inner lid, and more particularly to a technique for improving the reliability of a semiconductor integrated circuit. In particular, a semiconductor chip having a fine multi-pin has a high humidity resistance. Package suitable for realizing low cost while
Regarding the structure.

【0002】[0002]

【従来の技術】電極取り出し用の配線パタ−ンを有する
ベ−スに半導体チップを搭載し、当該ベ−スと該半導体
チップとの対応する電極同志をワイヤで接続し、ゲル状
のコ−ティング剤で当該半導体チップと当該ワイヤを覆
った半導体パッケ−ジ構造がある。従来の当該ゲルコ−
トタイプのパッケ−ジでは、ゲル状のコ−ティング剤部
分を機械的に保護するためのキャップは使用されている
が、ゲル状のコ−ティング剤の変位を拘束するための中
蓋は設けられていない。
2. Description of the Related Art A semiconductor chip is mounted on a base having a wiring pattern for taking out electrodes, and the corresponding electrodes of the base and the semiconductor chip are connected by wires to form a gel-like cord. There is a semiconductor package structure in which the semiconductor chip and the wire are covered with a coating agent. Conventional gel gel
Tote type packages use a cap for mechanically protecting the gel-like coating agent portion, but an inner lid for restraining the displacement of the gel-like coating agent is provided. Not not.

【0003】[0003]

【発明が解決しようとする課題】上記従来技術では、微
細ピッチ多ピン半導体チップ(LSI)の様に、微細ワ
イヤを使用したり、多段ボンディングを必要とするLS
Iの場合、柔軟なゲル状のコ−ティング剤を用いても、
ゲル状のコ−ティング剤の熱膨張(収縮)によりワイヤ
が変形を受けやすいという問題があった。
In the above-mentioned prior art, as in a fine pitch multi-pin semiconductor chip (LSI), an LS that uses fine wires or requires multi-step bonding.
In the case of I, even if a soft gel-like coating agent is used,
There is a problem that the wire is easily deformed by the thermal expansion (contraction) of the gel coating agent.

【0004】本発明の目的は、上記のような微細ワイヤ
を使用したり多段ボンディングを必要とするLSIで
も、ゲル状のコ−ティング剤(以下、単にゲルというこ
ともある)によるワイヤの変形等の熱膨張(収縮)の影
響特に熱収縮の影響を押え、十分高い信頼性を確保でき
るようなパッケ−ジを実現可能にすることにある。
An object of the present invention is to deform a wire by a gel-like coating agent (hereinafter, also simply referred to as a gel) even in an LSI that uses the fine wire as described above or requires multi-step bonding. The object of the present invention is to realize a package that suppresses the effect of thermal expansion (contraction), especially the effect of thermal contraction, and can secure sufficiently high reliability.

【0005】本発明の前記ならびにそのほかの目的と新
規な特徴は、本明細書の記述および添付図面からあきら
かになるであろう。
The above and other objects and novel features of the present invention will be apparent from the description of the present specification and the accompanying drawings.

【0006】[0006]

【課題を解決するための手段】本願において開示される
発明のうち代表的なものの概要を簡単に説明すれば、下
記のとおりである。
The outline of the representative ones of the inventions disclosed in the present application will be briefly described as follows.

【0007】上記目的は、ゲルの変位を拘束するための
中蓋を設けることにより達成される。
The above object is achieved by providing an inner lid for restraining the displacement of the gel.

【0008】[0008]

【作用】ワイヤの耐湿性を確保するために用いられるゲ
ルは、柔軟性がある反面、熱膨張係数が大きいという欠
点がある。このため、微細なワイヤを用いた場合や多段
ボンディングを行った半導体パッケージに適用すると、
環境試験等の加速された温度条件下では、ゲルの熱膨張
・収縮によりワイヤに変形を及ぼす程の応力が発生する
恐れがある。しかし、ゲルに接触させるように中蓋を設
けることにより、中蓋に接触している部分及びその周辺
のゲルの変位を押えることが出来る。そこでワイヤ近傍
に中蓋を設けることにより、ワイヤの変形を防止でき
る。
The gel used to secure the moisture resistance of the wire is flexible, but has a drawback that it has a large coefficient of thermal expansion. Therefore, when using fine wires or when applied to a semiconductor package with multi-stage bonding,
Under an accelerated temperature condition such as an environmental test, there is a possibility that the thermal expansion and contraction of the gel may cause a stress to deform the wire. However, by providing the inner lid so as to make contact with the gel, it is possible to suppress the displacement of the gel in the portion in contact with the inner lid and in the periphery thereof. Therefore, the deformation of the wire can be prevented by providing an inner lid near the wire.

【0009】[0009]

【実施例】以下、本発明の実施例を図面により説明す
る。
Embodiments of the present invention will be described below with reference to the drawings.

【0010】実施例1;図1は、本発明の一実施例を示
す断面図である。ベ−ス1は、積層構造を有する樹脂配
線基板よりなり、層間に、半導体チップ(以下、単にチ
ップいう)2内の半導体素子からの電極引き出しのため
の配線3が引き回してある。電極接続の端子部4は、多
ピンが接続可能なように、2段構造となっている。ベ−
ス1には、多数のリードピン5が立設されている。この
ベ−ス1の裏面より、放熱及びチップ2固定のための金
属製の熱拡散板6が貼付られている。チップ2は熱拡散
板6中央部に接着剤で固定する。その後、チップ2とベ
−ス1の対応する電極7、8同志を、ワイヤ9で超音波
ワイヤボンディング方法等のボンディング方法により接
続する。ワイヤ9は腐食しやすいことから、耐湿性確保
のためチップ2及びワイヤ9を、ゲル状のコ−ティング
剤10でコ−ティングする。次に、このゲル状のコ−テ
ィング剤10表面に接するように、表面を絶縁化したリ
ング状の中蓋11を載せてから、ベ−クしてゲル状のコ
−ティング剤10をゲル化する。中蓋11は、四コ−ナ
−に折り曲げられた足12が有り、一定高さ以下にはな
らないようになっている。図3に、中蓋11の一例斜視
図を示す。中蓋10は、その中央部に空気抜き用の穴1
3が設けられている。中蓋10に、空気抜き用の穴13
を設けることにより、ベ−ク(加熱)によりゲル状のコ
−ティング剤10をゲル化する際のガス抜きをすること
ができる。最後に、キャップ14を貼付て内部を機械的
に保護する。尚、図示が省略されているが、熱拡散板6
には、放熱のためのフインが取付けられる。
Embodiment 1; FIG. 1 is a sectional view showing an embodiment of the present invention. The base 1 is made of a resin wiring substrate having a laminated structure, and wirings 3 for leading electrodes from semiconductor elements in a semiconductor chip (hereinafter simply referred to as a chip) 2 are routed between layers. The terminal portion 4 for electrode connection has a two-stage structure so that multiple pins can be connected. Base
A large number of lead pins 5 are erected on the space 1. From the back surface of this base 1, a metal heat diffusion plate 6 for heat dissipation and fixing of the chip 2 is attached. The chip 2 is fixed to the center of the heat diffusion plate 6 with an adhesive. After that, the corresponding electrodes 7 and 8 of the chip 2 and the base 1 are connected by the wire 9 by a bonding method such as an ultrasonic wire bonding method. Since the wire 9 is easily corroded, the tip 2 and the wire 9 are coated with a gel-like coating agent 10 in order to secure moisture resistance. Next, a ring-shaped inner lid 11 having an insulated surface is placed so as to come into contact with the surface of the gel-like coating agent 10 and then baked to gel the gel-like coating agent 10. To do. The inner lid 11 has legs 12 bent into four corners so that it does not fall below a certain height. FIG. 3 shows an example perspective view of the inner lid 11. The inner lid 10 has a hole 1 for venting air in the center thereof.
3 is provided. Hole 13 for venting air in the inner lid 10
By providing the above, it is possible to degas when the gel coating agent 10 is gelated by baking (heating). Finally, the cap 14 is attached to protect the inside mechanically. Although not shown, the heat diffusion plate 6
A fin for heat dissipation is attached to the.

【0011】本実施例によれば、ベ−ク時に、コ−ティ
ング剤10のゲル状となった樹脂が、室温に冷されると
きに、ワイヤ9に悪影響を及ぼす収縮力を、リング状の
中蓋11が支持するために、ワイヤ9に過大な応力が加
わるのを防止することが出来る。逆に温度上昇の場合
は、ゲル10の収縮力が解除される方向であるが、中蓋
11は上方向には拘束されていないので、ゲル10は自
由に硬化後初期状態に復元可能である。即ち系全体が応
力低下に向かうため問題は無い。以上のように、樹脂コ
−トを行うLSIでは、多段ボンディングのような複雑
な構造でも、中蓋を設けることで信頼性を向上できると
いう効果が有る。
According to the present embodiment, the shrinking force which adversely affects the wire 9 when the resin, which is in the form of gel of the coating agent 10 during baking, is cooled to room temperature, has a ring-like shape. Since the inner lid 11 supports the wire 9, it is possible to prevent excessive stress from being applied to the wire 9. On the contrary, when the temperature rises, the contraction force of the gel 10 is released, but the inner lid 11 is not constrained upward, so the gel 10 can be freely restored to its initial state after curing. . That is, there is no problem because the entire system tends to decrease in stress. As described above, in the LSI that performs the resin coating, the reliability can be improved by providing the inner lid even in a complicated structure such as multi-step bonding.

【0012】実施例2;図2は別の実施例を示す断面図
である。図1の例では中蓋11に折り曲げた足12を付
けていたが、図2はベ−ス1側に、予め中蓋11を受け
るための突起15を設けておくことで、中蓋11として
はAl板等の板を打ち抜いただけの平板が使用できるよ
うにした例である。
Embodiment 2; FIG. 2 is a sectional view showing another embodiment. In the example of FIG. 1, the bent leg 12 is attached to the inner lid 11, but in FIG. 2, a protrusion 15 for receiving the inner lid 11 is provided in advance on the side of the base 1 to form the inner lid 11. Is an example in which a flat plate obtained by punching a plate such as an Al plate can be used.

【0013】本実施例の場合も図1の実施例と同様の効
果を持つことは云うまでもない。
It goes without saying that this embodiment also has the same effects as the embodiment of FIG.

【0014】上記ベ−ス1は、例えばBTレジン(ビス
マレイミドートリアジン樹脂)よりなる多層配線樹脂基
板により構成される。 チップ2は、例えばシリコン単
結晶基板から成り、周知の技術によってその内部には多
数の回路素子が形成され、1つの回路機能が与えられて
いる。回路素子の具体例は、例えばMOSトランジスタ
から成り、これらの回路素子によって、例えば論理回路
およびメモリの回路機能が形成されている。リ−ドピン
5は、例えばNi−Fe合金により構成されている。ワ
イヤ9は、例えば、アルミニウム細線により構成されて
いる。本発明に使用されるゲル状のコ−ティング剤10
としては、例えば、シリコーン系ゲルよりなる封止材を
使用することができる。ゲルは、その加熱硬化前はリキ
ッド状態であり、1液タイプ、2液タイプがあり、例え
ば主剤と硬化剤とからなる2液タイプの場合、これらを
混合すると反応硬化(架橋反応)し、硬化物を得る。そ
の硬化システムとしては、縮合型、付加型、紫外線硬化
型等がある。シリコーン系ゲルには、市販のものが使用
でき、例えば信越化学工業社製KJR9010、Xー3
5ー100、東レシリコーン社製JCR6110などが
使用できる。当該Xー35ー100[A(主剤)、B
(硬化剤)2液タイプ、針入度100]の硬化反応機構
は白金付加型で、2液低温高温用ゲルでー75〜250
℃の温度範囲で使用できる。中蓋11は、例えば、アル
ミニウムにより構成されている。
The base 1 is composed of a multilayer wiring resin substrate made of, for example, BT resin (bismaleimide-triazine resin). The chip 2 is made of, for example, a silicon single crystal substrate, has a large number of circuit elements formed therein by a well-known technique, and is given one circuit function. A specific example of the circuit element includes, for example, a MOS transistor, and these circuit elements form a circuit function of a logic circuit and a memory, for example. The lead pin 5 is made of, for example, a Ni—Fe alloy. The wire 9 is made of, for example, an aluminum thin wire. Gel coating agent 10 used in the present invention
For example, a sealing material made of silicone gel can be used. The gel is in a liquid state before being heated and cured, and there are one-liquid type and two-liquid type. For example, in the case of a two-liquid type consisting of a main agent and a curing agent, when these are mixed, they are cured by reaction (crosslinking reaction) and cured. Get things. The curing system includes condensation type, addition type, ultraviolet curing type and the like. A commercially available product can be used as the silicone gel, for example, KJR9010, X-3 manufactured by Shin-Etsu Chemical Co., Ltd.
5-100, JCR6110 manufactured by Toray Silicone Co., etc. can be used. The X-35-100 [A (main agent), B
(Curing agent) 2-liquid type, penetration degree 100], the curing reaction mechanism is platinum addition type, 2-liquid low temperature high temperature gel -75 to 250
It can be used in the temperature range of ° C. The inner lid 11 is made of, for example, aluminum.

【0015】以上本発明者によってなされた発明を実施
例にもとずき具体的に説明したが、本発明は上記実施例
に限定されるものではなく、その要旨を逸脱しない範囲
で種々変更可能であることはいうまでもない。
Although the invention made by the present inventor has been specifically described based on the embodiments, the invention is not limited to the above embodiments, and various modifications can be made without departing from the scope of the invention. Needless to say.

【0016】例えば、中蓋11の穴13は、前記実施例
では、その中央部一か所に設けた例を示したが、全面に
わたって設けてもよい。
For example, although the hole 13 of the inner lid 11 is provided at one place in the central portion in the above embodiment, it may be provided over the entire surface.

【0017】[0017]

【発明の効果】本願において開示される発明のうち代表
的なものによって得られる効果を簡単に説明すれば、下
記のとおりである。
The effects obtained by the typical ones of the inventions disclosed in the present application will be briefly described as follows.

【0018】中蓋を設けることでコ−ティング樹脂の熱
収縮による変位を抑えることが出来るため、多段ボンデ
ィングのような複雑な構造のLSIでも信頼性を向上で
きるという効果が有る。
Since the displacement due to the thermal contraction of the coating resin can be suppressed by providing the inner lid, there is an effect that the reliability can be improved even in an LSI having a complicated structure such as multi-step bonding.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例を示す断面図である。FIG. 1 is a sectional view showing an embodiment of the present invention.

【図2】本発明の他の実施例を示す断面図である。FIG. 2 is a sectional view showing another embodiment of the present invention.

【図3】本発明に使用される中蓋の実施例を示す斜視図
である。
FIG. 3 is a perspective view showing an embodiment of an inner lid used in the present invention.

【符号の説明】[Explanation of symbols]

1‥‥ベ−ス 2‥‥半導体チップ 3‥‥配線 4‥‥電極接続の端子部 5‥‥リードピン 6‥‥熱拡散板 7‥‥電極 8‥‥電極 9‥‥ワイヤ 10‥‥ゲル状のコ−ティング剤 11‥‥中蓋 12‥‥折り曲げられた足 13‥‥空気抜き用の穴 14‥‥キャップ 15‥‥突起 1 ... Base 2 ... Semiconductor chip 3 ... Wiring 4 ... Terminal part for electrode connection 5 ... Lead pin 6 ... Heat diffusion plate 7 ... Electrode 8 ... Electrode 9 ... Wire 10 ... Gel Coating agent 11 ... Inner lid 12 ... Bent foot 13 ... Air vent hole 14 ... Cap 15 ... Protrusion

───────────────────────────────────────────────────── フロントページの続き (72)発明者 黒田 宏 東京都青梅市今井2326番地 株式会社日立 製作所デバイス開発センタ内 (72)発明者 白井 優之 東京都青梅市今井2326番地 株式会社日立 製作所デバイス開発センタ内 (72)発明者 坪井 敏宏 東京都小平市上水本町5丁目20番1号 日 立超エル・エス・アイ・エンジニアリング 株式会社内 (72)発明者 小作 浩 東京都小平市上水本町5丁目20番1号 日 立超エル・エス・アイ・エンジニアリング 株式会社内 (72)発明者 菊池 真之 東京都小平市上水本町5丁目20番1号 日 立超エル・エス・アイ・エンジニアリング 株式会社内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Hiroshi Kuroda 2326 Imai, Ome City, Tokyo, Hitachi, Ltd. Device Development Center (72) Inventor Masayuki Shirai 2326 Imai, Ome City, Tokyo Hitachi, Ltd. Device Development In the center (72) Inventor Toshihiro Tsuboi 5-20-1, Josuihonmachi, Kodaira-shi, Tokyo Inside Hitsuritsu Cho-LS Engineering Co., Ltd. (72) Inventor Hiroshi Kosaku, 5 Mizumizuhoncho, Kodaira-shi, Tokyo Nichore Super LSI Engineering Co., Ltd. (20) Masayuki Kikuchi 5-20-1 Kamimizuhonmachi, Kodaira-shi, Tokyo Hitate Super LSI Engineering Co., Ltd. In the company

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 電極取り出し用の配線パタ−ンを有する
ベ−スに半導体チップを搭載し、当該ベ−スと該半導体
チップとの対応する電極同志をワイヤで接続し、ゲル状
のコ−ティング剤で当該半導体チップと当該ワイヤを覆
った半導体パッケ−ジ構造において、前記ゲル状のコ−
ティング剤に当接する中蓋を設けるとともに、キャップ
を取付けして成ることを特徴とする中蓋付き半導体パッ
ケ−ジ。
1. A gel-like cord is formed by mounting a semiconductor chip on a base having a wiring pattern for taking out electrodes, and connecting the corresponding electrodes of the base and the semiconductor chip with a wire. In the semiconductor package structure in which the semiconductor chip and the wire are covered with a coating agent, the gel-like coat
A semiconductor package with an inner lid, comprising an inner lid that comes into contact with a coating agent and a cap attached.
【請求項2】 中蓋が、空気抜き用の穴を設けて成るこ
とを特徴とする請求項1に記載の中蓋付き半導体パッケ
−ジ。
2. The semiconductor package with an inner lid according to claim 1, wherein the inner lid is provided with a hole for venting air.
【請求項3】 中蓋に折り曲げた足を付設して成るか、
または、ベ−スに当該中蓋を受けるための突起を設けて
成ることを特徴とする請求項1に記載の中蓋付き半導体
パッケ−ジ。
3. The inner lid is provided with bent legs,
2. The semiconductor package with an inner lid according to claim 1, wherein the base is provided with a projection for receiving the inner lid.
JP5131698A 1993-06-02 1993-06-02 Semiconductor package with inner lid Withdrawn JPH06342855A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5131698A JPH06342855A (en) 1993-06-02 1993-06-02 Semiconductor package with inner lid

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5131698A JPH06342855A (en) 1993-06-02 1993-06-02 Semiconductor package with inner lid

Publications (1)

Publication Number Publication Date
JPH06342855A true JPH06342855A (en) 1994-12-13

Family

ID=15064115

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5131698A Withdrawn JPH06342855A (en) 1993-06-02 1993-06-02 Semiconductor package with inner lid

Country Status (1)

Country Link
JP (1) JPH06342855A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19990050133A (en) * 1997-12-16 1999-07-05 김영환 Ceramic package
EP1355351A1 (en) * 2001-01-23 2003-10-22 Mitsubishi Denki Kabushiki Kaisha Semiconductor device
WO2017141532A1 (en) * 2016-02-16 2017-08-24 三菱電機株式会社 Semiconductor device and method for manufacturing same
US11011442B2 (en) 2015-03-27 2021-05-18 Mitsubishi Electric Corporation Power module

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19990050133A (en) * 1997-12-16 1999-07-05 김영환 Ceramic package
EP1355351A1 (en) * 2001-01-23 2003-10-22 Mitsubishi Denki Kabushiki Kaisha Semiconductor device
EP1355351A4 (en) * 2001-01-23 2009-08-19 Mitsubishi Electric Corp Semiconductor device
US11011442B2 (en) 2015-03-27 2021-05-18 Mitsubishi Electric Corporation Power module
WO2017141532A1 (en) * 2016-02-16 2017-08-24 三菱電機株式会社 Semiconductor device and method for manufacturing same
JPWO2017141532A1 (en) * 2016-02-16 2018-10-25 三菱電機株式会社 Semiconductor device and manufacturing method thereof

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Effective date: 20000905