JPH06342777A - Dry etching method of compound semiconductor - Google Patents

Dry etching method of compound semiconductor

Info

Publication number
JPH06342777A
JPH06342777A JP5129869A JP12986993A JPH06342777A JP H06342777 A JPH06342777 A JP H06342777A JP 5129869 A JP5129869 A JP 5129869A JP 12986993 A JP12986993 A JP 12986993A JP H06342777 A JPH06342777 A JP H06342777A
Authority
JP
Japan
Prior art keywords
mask
gaas
compound semiconductor
electron beam
etching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5129869A
Other languages
Japanese (ja)
Other versions
JP2500443B2 (en
Inventor
Shigeru Kawamoto
滋 河本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP5129869A priority Critical patent/JP2500443B2/en
Publication of JPH06342777A publication Critical patent/JPH06342777A/en
Application granted granted Critical
Publication of JP2500443B2 publication Critical patent/JP2500443B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02TCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO TRANSPORTATION
    • Y02T10/00Road transport of goods or passengers
    • Y02T10/10Internal combustion engine [ICE] based vehicles
    • Y02T10/12Improving ICE efficiencies

Abstract

PURPOSE:To solve troubles in an in-situ electron beam patterning method wherein a compound semiconductor of GaAs or the like is patterned with a semiconductor epitaxial layer as an etching mask, wherein the troubles are that patterns vary in pattern width when they are formed. CONSTITUTION:A double mask of GaAs/InGaAs 12 is formed on a GaAs 11 serving as a work material. Then, an upper GaAs mask 13 is irradiated with an EB 19 and chlorine gas 18 at the same time to be etched thicker than a InGaAs mask 12 to provide a recess. The recess is transferred to the InGaAs mask 12 by a reactive ion beam etching process wherein chlorine radicals and ions are used. Then, only a part of GaAs 11 serving as a work material where the InGaAs mask is removed is etched as irradiated with an electron beam in showers in an atmosphere of chlorine gas.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、化合物半導体の低損傷
ドライエッチング法による微細構造形成技術に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a fine structure forming technique for a compound semiconductor by a low damage dry etching method.

【0002】[0002]

【従来の技術】加工により化合物半導体の量子細線とい
ったナノメータサイズの微細構造を形成するには、大気
暴露による表面汚染を避けるために、成長後の化合物半
導体試料を真空中でそのまま加工する、いわゆる真空一
貫プロセスを行うことが重要である。またこの時の加工
においては、微細性と低損傷を兼備した集束電子線を利
用する事が有効である。
2. Description of the Related Art In order to form a nanometer-sized fine structure such as a quantum wire of a compound semiconductor by processing, in order to avoid surface contamination due to exposure to the atmosphere, a grown compound semiconductor sample is processed in vacuum as it is, so-called vacuum. It is important to have a consistent process. Further, in the processing at this time, it is effective to use a focused electron beam having both fineness and low damage.

【0003】化合物半導体であるヒ化ガリウム(GaA
s)に対しこの様な微細加工を行う方法として、従来、
GaAs酸化膜をエッチング用のマスクとし、集束電子
線と塩素ガスを用いて微細構造を形成する方法があり、
例えば、セミコンダクタ・サイエンス・アンド・テクノ
ロジー(Semicond.Sci.Techno
l.)、Vol.7、(1992)pp.160〜16
3に記載されている様なドライエッチング方法がある。
この方法を図2を用いて説明する。この方法では、次に
述べる工程を真空中で連続して行う。まず、分子線エピ
タキシー法により成長したGaAs成長層21の表面に
酸素ガス22雰囲気中でハロゲンランプによる光照射2
3を行いGaAs酸化膜24を形成する(図2
(a))。次に集束電子線25をGaAs酸化膜24に
照射し、照射部分のGaAs酸化膜を選択的に改質し、
塩素ガスエッチング耐性を劣化させる(図2(b))。
次に改質パターン化されたGaAs酸化膜をマスクとし
て塩素ガス26によりGaAs成長層21のエッチング
を行う。これにより集束電子線25が照射された場所の
GaAs酸化膜が選択的にエッチングされ、従って、こ
の部分のGaAsも選択的にエッチングされる(図2
(c))。
Compound semiconductor gallium arsenide (GaA)
As a method for performing such fine processing on s),
There is a method of forming a fine structure using a focused electron beam and chlorine gas, using a GaAs oxide film as an etching mask.
For example, Semiconductor Science and Technology (Semicond.Sci.Techno)
l. ), Vol. 7, (1992) pp. 160-16
There is a dry etching method as described in 3.
This method will be described with reference to FIG. In this method, the following steps are continuously performed in vacuum. First, the surface of the GaAs growth layer 21 grown by the molecular beam epitaxy method is irradiated with light from a halogen lamp in an oxygen gas 22 atmosphere.
3 is performed to form a GaAs oxide film 24 (FIG. 2).
(A)). Next, the focused electron beam 25 is irradiated to the GaAs oxide film 24 to selectively modify the irradiated portion of the GaAs oxide film,
The chlorine gas etching resistance is deteriorated (FIG. 2 (b)).
Next, the GaAs growth layer 21 is etched by chlorine gas 26 using the modified patterned GaAs oxide film as a mask. As a result, the GaAs oxide film at the location where the focused electron beam 25 is irradiated is selectively etched, and thus the GaAs in this portion is also selectively etched (FIG. 2).
(C)).

【0004】しかし、この方法では、酸化物という半導
体材料とは異質の物質を用いているため、塩素ガスエッ
チングによる加工表面がこの酸化膜によって汚染される
事が懸念される。
However, in this method, since a substance different from the semiconductor material called oxide is used, there is a concern that the processed surface by chlorine gas etching is contaminated by this oxide film.

【0005】この問題点を解決するために、最近、半導
体エピタキシャル層をエッチングのマスクとする方法が
提案されている(平成4年秋季 第53回応用物理学会
学術講演会 講演予稿集 第3分冊 p.1149)。
この方法を図3を用いて説明する。この方法では、次に
述べる工程を真空中で連続して行う。まず、分子線エピ
タキシー法により被加工材料であるGaAs層31とエ
ッチングのマスクとなるInGaAs層32を連続的に
成長する(図3(a))。次に集束電子線33と塩素ガ
ス34をInGaAs層表面に同時に照射してInGa
As層32をエッチング除去し、更に照射を続けて被加
工材料であるGaAs層31のエッチング加工を行う
(図3(b))。この時、電子線が照射されていない部
分のInGaAs層32は塩素ガスエッチング耐性があ
るのでマスクとしてはたらく。この方法では、エッチン
グのマスクとして、被加工材料のGaAsと同じ化合物
半導体であるInGaAsを用いているので、前記の酸
化物マスクの場合のような異種物質による汚染はない。
In order to solve this problem, a method of using a semiconductor epitaxial layer as an etching mask has recently been proposed (Autumn 1992 Autumn Proceedings of the 53rd Annual Meeting of the Society of Applied Physics, 3rd Volume, p. .1149).
This method will be described with reference to FIG. In this method, the following steps are continuously performed in vacuum. First, a GaAs layer 31 which is a material to be processed and an InGaAs layer 32 which serves as an etching mask are continuously grown by a molecular beam epitaxy method (FIG. 3A). Next, the focused electron beam 33 and the chlorine gas 34 are simultaneously irradiated to the surface of the InGaAs layer to expose the InGa layer.
The As layer 32 is removed by etching, and irradiation is further continued to etch the GaAs layer 31, which is the material to be processed (FIG. 3B). At this time, the portion of the InGaAs layer 32 which is not irradiated with the electron beam has a chlorine gas etching resistance and thus serves as a mask. In this method, since InGaAs, which is the same compound semiconductor as GaAs, which is the material to be processed, is used as the etching mask, there is no contamination by different substances as in the case of the oxide mask.

【0006】[0006]

【発明が解決しようとする課題】しかしながら、InG
aAsをエッチングのマスクに用いる従来の方法では、
InGaAsを除去できるエッチング条件、すなわち、
高試料温度・高塩素ガス圧という条件では、被加工材料
であるGaAs層が塩素ガスのみによっても非常に早い
速度で表面平行方向・垂直方向にエッチングされる。し
たがって、同一試料上に複数個の隣接する構造を形成す
る場合、第1番目の構造を電子線と塩素ガスの同時照射
により形成した後、電子線の照射位置を移動して第2の
構造を形成している間、第1の構造のGaAs部分は塩
素ガスに晒されているので、エッチングが高速で進行し
てしまう。したがって、これら複数個の構造の深さ・幅
といった加工寸法が大幅にばらついてしまうという問題
点があった。
[Problems to be Solved by the Invention] However, InG
In the conventional method using aAs as an etching mask,
Etching conditions that can remove InGaAs, that is,
Under the conditions of high sample temperature and high chlorine gas pressure, the GaAs layer, which is the material to be processed, is etched in the direction parallel to the surface and in the vertical direction at a very high speed even with only chlorine gas. Therefore, when forming a plurality of adjacent structures on the same sample, after the first structure is formed by simultaneous irradiation with an electron beam and chlorine gas, the irradiation position of the electron beam is moved to form the second structure. During formation, the GaAs portion of the first structure is exposed to chlorine gas, so etching proceeds at a high speed. Therefore, there is a problem in that the processing dimensions such as the depth and width of these plural structures greatly vary.

【0007】本発明の目的は、被加工材料と同じ種類の
化合物半導体を電子線と反応性ガスによるエッチングの
マスクとして用いた真空一貫加工プロセスにおいて、深
さ・幅加工寸法のばらつきの非常に少ない新規なドライ
エッチング方法を提供する事にある。
An object of the present invention is to achieve a very small variation in depth and width in a vacuum integrated processing process using a compound semiconductor of the same type as the material to be processed as a mask for etching with an electron beam and a reactive gas. It is to provide a new dry etching method.

【0008】[0008]

【課題を解決するための手段】本発明は、電子線と反応
性ガスとイオンを利用した化合物半導体の加工方法であ
って、被加工化合物半導体表面上に、反応性ガスの照
射、あるいは電子線と前記反応性ガスとの同時照射によ
ってはエッチングされず、イオンの照射、あるいは前記
イオンと前記反応性ガスとの同時照射により容易にエッ
チングされる化合物半導体から成る第1のマスクを形成
する工程と、前記第1のマスクの上に前記電子線と前記
反応性ガスとの同時照射により容易にエッチングされ、
前記イオンあるいは前記イオンと前記反応性ガスとの同
時照射によっても容易にエッチングされる化合物半導体
から成る第2のマスクを形成する工程と、前記第2のマ
スクの表面に前記電子線と前記反応性ガスの同時照射に
より前記第1のマスクの厚さ以上の深さを有する凹みを
形成する工程と、前記第2のマスクの表面への前記イオ
ンの照射、あるいは前記イオンと前記反応性ガスとの同
時照射により、前記第1のマスクのうち前記凹みの下方
にある部分のみを除去する工程と、前記被加工化合物半
導体表面全体に前記反応性ガスを照射、あるいは前記電
子線と前記反応性ガスとを同時照射する工程とを有する
ことを特徴とする化合物半導体のドライエッチング方法
である。
The present invention is a method of processing a compound semiconductor using an electron beam, a reactive gas and ions, wherein the surface of the compound semiconductor to be processed is irradiated with the reactive gas or the electron beam. Forming a first mask made of a compound semiconductor that is not etched by simultaneous irradiation with the above-mentioned reactive gas and is easily etched by irradiation with ions or simultaneous irradiation with the ions and the reactive gas. , Is easily etched on the first mask by simultaneous irradiation with the electron beam and the reactive gas,
Forming a second mask made of a compound semiconductor that is easily etched by simultaneous irradiation with the ions or the ions and the reactive gas; and reacting the electron beam with the electron beam on the surface of the second mask. Forming a recess having a depth equal to or greater than the thickness of the first mask by simultaneously irradiating gas, irradiating the surface of the second mask with the ions, or combining the ions with the reactive gas A step of removing only the portion of the first mask below the recess by simultaneous irradiation; and irradiating the entire surface of the compound semiconductor to be processed with the reactive gas, or the electron beam and the reactive gas. And a step of simultaneously irradiating the compound semiconductor.

【0009】[0009]

【作用】本発明に於いては、まず、第1のマスク上にあ
る第2のマスクに、所望の構造にしたがった凹部を集束
電子線と反応性ガスとの同時照射によるいわゆるマスク
レスエッチング法で形成しておく。次に、第2のマスク
全面に対してイオン照射あるいはイオンと反応性ガスの
同時照射により第2のマスクをエッチングしていく。す
ると、先に凹形状にした部分では他の部分よりも早く第
1のマスクが露出する。さらにエッチングを続けると、
凹部の深さを予め次のように設定しておけば、凹部以外
の第2のマスクがエッチングされて第1のマスクが露出
する前に、凹部の下の第1のマスクを除去する事ができ
る。
According to the present invention, first, a so-called maskless etching method is carried out by simultaneously irradiating a second mask on the first mask with a concave portion according to a desired structure with a focused electron beam and a reactive gas. Formed in. Next, the second mask is etched by irradiating the entire surface of the second mask with ions or simultaneously irradiating ions and a reactive gas. Then, the first mask is exposed earlier in the concave portion than in the other portions. If you continue etching,
If the depth of the recess is set in advance as follows, it is possible to remove the first mask below the recess before the second mask other than the recess is etched to expose the first mask. it can.

【0010】D2 >d1 ×R2 /R1 ここに、D2 は第1のマスクへのパターン転写に要す
る、第2のマスクに形成する凹部の深さ、d1 は第1の
マスクの厚さ、R1 は第1のマスクのエッチング速度、
2 は第2のマスクのエッチング速度である。
D 2 > d 1 × R 2 / R 1 where D 2 is the depth of the concave portion formed in the second mask, which is necessary for transferring the pattern to the first mask, and d 1 is the first mask. , R 1 is the etching rate of the first mask,
R 2 is the etching rate of the second mask.

【0011】この後、被加工化合物半導体表面全体に反
応性ガスを照射、あるいは電子線と反応性ガスとを同時
照射すると、第1のマスクのない部分の被加工化合物半
導体はエッチングされるが、その他の部分は、第2のマ
スクによりエッチングされない。結果として、最初に第
2のマスクに形成した凹部パターンが被加工化合物半導
体に転写される。
Thereafter, when the entire surface of the compound semiconductor to be processed is irradiated with the reactive gas or the electron beam and the reactive gas are simultaneously irradiated, the compound semiconductor to be processed in the portion without the first mask is etched. The other portions are not etched by the second mask. As a result, the recess pattern initially formed in the second mask is transferred to the compound semiconductor to be processed.

【0012】ここで、凹部を第1のマスクに転写・エッ
チングする工程はイオン照射あるいはイオと反応性ガス
の同時照射により行うので、R1 〜R2 である。したが
ってD2 >d1 となるので、予め第2のマスク上に形成
しておく凹部の深さは第1のマスクの厚さ程度で良い。
第1のマスクの厚さは、反応性ガスの照射あるいは電子
線と反応性ガスとの同時照射に耐性があれば良いので、
数nmあれば十分であるので凹部の深さも数nm程度で
良く、このエッチングに要する時間は短い。したがっ
て、複数個の凹部を形成する際のパターン幅広がりが非
常に小さい。一方、深さについては、第2のマスクに電
子線と反応性ガスとの同時照射エッチングによる複数個
の凹部を形成する場合、同時照射時間が同じならば、エ
ッチング深さは形成する凹部の順番に依らず一定である
ので問題はない。この深さばらつきが無く、幅ばらつき
の小さいパターンを直進性の良いイオンにより第1のマ
スクに転写し、さらにこれをマスクとして被加工化合物
半導体を全面一括でエッチングするので、深さ・幅ばら
つきの少ない構造が形成できる。
Here, since the step of transferring / etching the concave portion to the first mask is performed by ion irradiation or simultaneous irradiation of ion and reactive gas, R 1 to R 2 . Therefore, since D 2 > d 1 , the depth of the recess previously formed on the second mask may be about the thickness of the first mask.
Since the thickness of the first mask has only to be resistant to the irradiation of the reactive gas or the simultaneous irradiation of the electron beam and the reactive gas,
Since several nm is sufficient, the depth of the recess may be about several nm, and the time required for this etching is short. Therefore, the pattern width spread when forming a plurality of recesses is very small. On the other hand, regarding the depth, when forming a plurality of recesses by simultaneous irradiation etching of an electron beam and a reactive gas on the second mask, if the simultaneous irradiation time is the same, the etching depth is the order of the recesses to be formed. Since it is constant regardless of, there is no problem. Since there is no variation in depth and a pattern with little variation in width is transferred to the first mask by ions having good straightness, and the compound semiconductor to be processed is collectively etched using this as a mask, the variation in depth / width can be prevented. Fewer structures can be formed.

【0013】[0013]

【実施例】次に、本発明によるドライエッチング方法
を、図1を用いて説明する。まず、分子線エピタキシー
法により、被加工化合物半導体としてのGaAs11上
に、第1のマスクとしてのIn0.2 Ga0.8 As(以下
InGaAsと記す)12を厚さ5nm、第2のマスク
としてのGaAs13を厚さ10nm、順次連続的にエ
ピタキシャル成長する(図1(a))。次に、試料温度
を65℃に保ち、3×10-6Torrの塩素ガス14雰
囲気中で運動エネルギー5keV、ビーム径50nmの
集束電子線15を電子ドーズ1×1017(電子/c
-2)になるように2分間照射する事でエッチングを行
い、第2のマスクであるGaAs13に深さ7.5n
m、幅50nmのパターンを10個形成する(図1
(b)、ただし、この図ではパターンは1個)。深さ
は、エッチング時間が同じならば一定である。この時、
最初にエッチングしたパターンの、雰囲気塩素ガスエッ
チングによる幅広がりは、高々1.3nmと少ない。次
に、試料温度を室温に保ち、塩素ラジカル16を用いた
イオン17の加速電圧30Vの反応性イオンビームエッ
チング法により第2のマスク13に形成した10個のパ
ターンを第1のマスク12に転写する(図1(c))。
この時、第1,第2のマスクではIn0.2 Ga0.8
s、GaAsと材料は異なるが、イオンを用いる反応性
イオンビームエッチング法では、エッチング速度は殆ど
同じであり、また、InGaAs12は5nmと非常に
薄いので、容易にパターン転写が行われる。次に、試料
温度を室温に保ったまま、5×10-5Torrの塩素ガ
ス18雰囲気中で試料全面に運動エネルギー500eV
のシャワー状電子ビーム19を照射する(図1
(c))。この時、被加工材料のGaAs11は容易に
エッチングされるが、第1のマスクであるInGaAs
12は殆どエッチングされないため、被加工材料のGa
As11には、エッチング深さが一定で、幅広がりの非
常に少ない構造が形成できる。
EXAMPLES Next, a dry etching method according to the present invention will be described with reference to FIG. First, by a molecular beam epitaxy method, In 0.2 Ga 0.8 As (hereinafter referred to as InGaAs) 12 as a first mask has a thickness of 5 nm and GaAs 13 as a second mask has a thickness of 5 nm on GaAs 11 as a compound semiconductor to be processed. Thickness of 10 nm, and epitaxial growth is sequentially and continuously performed (FIG. 1A). Next, with the sample temperature kept at 65 ° C., a focused electron beam 15 with a kinetic energy of 5 keV and a beam diameter of 50 nm was applied in an atmosphere of 3 × 10 −6 Torr of chlorine gas 14 with an electron dose of 1 × 10 17 (electrons / c
m -2) to become so etched by being irradiated for 2 minutes, the depth 7.5n to GaAs13 a second mask
10 patterns of m and 50 nm in width are formed (FIG. 1).
(B), but one pattern in this figure). The depth is constant if the etching time is the same. At this time,
The width of the first etched pattern due to chlorine gas etching in the atmosphere is as small as 1.3 nm at most. Next, the sample temperature is kept at room temperature, and ten patterns formed on the second mask 13 are transferred to the first mask 12 by the reactive ion beam etching method using the chlorine radicals 16 and the acceleration voltage of the ions 17 of 30 V. (FIG. 1 (c)).
At this time, with the first and second masks, In 0.2 Ga 0.8 A
Although the material is different from that of s and GaAs, the reactive ion beam etching method using ions has almost the same etching rate, and InGaAs 12 is very thin at 5 nm, so that pattern transfer is easily performed. Next, with the sample temperature kept at room temperature, kinetic energy of 500 eV was applied to the entire surface of the sample in an atmosphere of chlorine gas of 5 × 10 −5 Torr.
Of the shower-shaped electron beam 19 (FIG. 1)
(C)). At this time, the material GaAs11 to be processed is easily etched, but the first mask InGaAs
Since 12 is hardly etched, Ga of the material to be processed is
In As11, a structure having a constant etching depth and a very small width can be formed.

【0014】なお、この被加工材料のGaAsのエッチ
ングにおいては、塩素ガスのみを用いても良い。
It should be noted that only chlorine gas may be used in the etching of GaAs as the material to be processed.

【0015】[0015]

【発明の効果】本発明に寄れば、深さ・幅加工寸法のば
らつきの非常に少ない化合物半導体の構造を、同種類の
化合物半導体のみをマスクとして形成する事ができるた
め、異物による汚染の無い加工ができる。また、本方法
は、すべて真空中で連続して行う事ができるため、エッ
チングによる構造形成の後、更に、試料を大気に晒す事
無く、加工構造を化合物半導体により埋込成長する事が
できる。こうする事により、加工構造の電気的・光学的
品質の向上が期待できる。また、例えば前述の実施例で
言えば、従来法の様に、InGaAsマスクおよび被加
工材料のGaAsを直接電子線と反応性ガスによりエッ
チングせず、よりエッチングが容易なGaAsを電子線
と反応性ガスによりエッチングすればよく、また、この
エッチングは浅くてよいので、パターニングに要する時
間を大幅に低減できる。
According to the present invention, since the structure of the compound semiconductor in which the variation in the depth and width processing dimensions is very small can be formed using only the compound semiconductor of the same kind as a mask, there is no contamination by foreign matter. Can be processed. In addition, since this method can be continuously performed in a vacuum, the processed structure can be embedded and grown by the compound semiconductor after the structure is formed by etching and without exposing the sample to the atmosphere. By doing so, improvement in electrical and optical quality of the processed structure can be expected. Further, in the above-mentioned embodiment, for example, unlike the conventional method, the GaAs of the InGaAs mask and the material to be processed is not directly etched with the electron beam and the reactive gas, but GaAs which is easier to etch is reactive with the electron beam. The etching may be performed with a gas, and since this etching may be shallow, the time required for patterning can be significantly reduced.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の方法による一実施例を説明する図。FIG. 1 is a diagram for explaining an embodiment according to the method of the present invention.

【図2】従来のエッチング方法を示す図。FIG. 2 is a diagram showing a conventional etching method.

【図3】従来のエッチング方法を示す図。FIG. 3 is a diagram showing a conventional etching method.

【符号の説明】[Explanation of symbols]

11 GaAs 12 InGaAs(第1のマスク) 13 GaAs(第2のマスク) 14,18,26,34 塩素ガス 15,25,33 集束電子線 16 塩素ラジカル 17 イオン 19 シャワー状電子線 21 GaAs層 22 酸素ガス 23 光照射 24 GaAs酸化膜 31 GaAS 32 InGaAs層(マスク) 11 GaAs 12 InGaAs (first mask) 13 GaAs (second mask) 14, 18, 26, 34 chlorine gas 15, 25, 33 Focused electron beam 16 Chlorine radical 17 Ion 19 Shower electron beam 21 GaAs layer 22 Oxygen Gas 23 Light irradiation 24 GaAs oxide film 31 GaAs 32 InGaAs layer (mask)

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 被加工化合物半導体表面上に、反応性ガ
スの照射、あるいは電子線と前記反応性ガスとの同時照
射によってはエッチングされず、イオンの照射、あるい
は前記イオンと前記反応性ガスとの同時照射により容易
にエッチングされる化合物半導体から成る第1のマスク
を形成する工程と、前記第1のマスクの上に前記電子線
と前記反応性ガスとの同時照射により容易にエッチング
され、前記イオンあるいは前記イオンと前記反応性ガス
との同時照射によっても容易にエッチングされる化合物
半導体から成る第2のマスクを形成する工程と、前記第
2のマスクの表面に前記電子線と前記反応性ガスの同時
照射により前記第1のマスクの厚さ以上の深さを有する
凹みを形成する工程と、前記第2のマスクの表面への前
記イオンの照射、あるいは前記イオンと前記反応性ガス
との同時照射により、前記第1のマスクのうち前記凹み
の下方にある部分のみを除去する工程と、前記被加工化
合物半導体表面全体に前記反応性ガスを照射、あるいは
前記電子線と前記反応性ガスとを同時照射する工程とを
有することを特徴とする化合物半導体のドライエッチン
グ方法。
1. The surface of a compound semiconductor to be processed is not etched by irradiation with a reactive gas or simultaneous irradiation with an electron beam and the reactive gas, and is irradiated with ions or with the ions and the reactive gas. A step of forming a first mask made of a compound semiconductor that is easily etched by simultaneous irradiation with, and being easily etched by simultaneous irradiation of the electron beam and the reactive gas on the first mask, Forming a second mask made of a compound semiconductor that is easily etched by simultaneous irradiation of ions or the ions and the reactive gas; and the electron beam and the reactive gas on the surface of the second mask. Simultaneously forming a recess having a depth equal to or greater than the thickness of the first mask, and irradiating the surface of the second mask with the ions. Or simultaneously irradiating the ions and the reactive gas to remove only the portion of the first mask below the recess, and irradiating the entire surface of the compound semiconductor to be processed with the reactive gas. Or a step of simultaneously irradiating the electron beam and the reactive gas, a dry etching method for a compound semiconductor.
JP5129869A 1993-06-01 1993-06-01 Compound semiconductor dry etching method Expired - Lifetime JP2500443B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5129869A JP2500443B2 (en) 1993-06-01 1993-06-01 Compound semiconductor dry etching method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5129869A JP2500443B2 (en) 1993-06-01 1993-06-01 Compound semiconductor dry etching method

Publications (2)

Publication Number Publication Date
JPH06342777A true JPH06342777A (en) 1994-12-13
JP2500443B2 JP2500443B2 (en) 1996-05-29

Family

ID=15020313

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5129869A Expired - Lifetime JP2500443B2 (en) 1993-06-01 1993-06-01 Compound semiconductor dry etching method

Country Status (1)

Country Link
JP (1) JP2500443B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002097873A1 (en) * 2001-05-29 2002-12-05 Infineon Technologies Ag Masking technique for producing semiconductor components, in particular a buried heterostructure (bh) laser diode
US6599843B2 (en) 2001-05-29 2003-07-29 Infineon Technologies Ag In-situ mask technique for producing III-V semiconductor components
CN109979806A (en) * 2017-12-26 2019-07-05 中国科学院苏州纳米技术与纳米仿生研究所 The method and system of the compatible pattern transfer of vacuum

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Publication number Priority date Publication date Assignee Title
US7744827B2 (en) 2004-02-13 2010-06-29 United Technologies Corporation Catalytic treatment of fuel to impart coking resistance

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002097873A1 (en) * 2001-05-29 2002-12-05 Infineon Technologies Ag Masking technique for producing semiconductor components, in particular a buried heterostructure (bh) laser diode
US6599843B2 (en) 2001-05-29 2003-07-29 Infineon Technologies Ag In-situ mask technique for producing III-V semiconductor components
US6699778B2 (en) 2001-05-29 2004-03-02 Infineon Technologies Ag Masking method for producing semiconductor components, particularly a BH laser diode
CN109979806A (en) * 2017-12-26 2019-07-05 中国科学院苏州纳米技术与纳米仿生研究所 The method and system of the compatible pattern transfer of vacuum

Also Published As

Publication number Publication date
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