JPH06334909A - Noise reducing device - Google Patents

Abstract

PURPOSE:To realize noise reducing processing of a frame circulation type in space and a field circulation type in time for signals of a 1st and 2nd fields, with both to constitute one frame of an interlacing type video signal and to be inputted at the same timing. CONSTITUTION:The 1st noise reducing circuit 6a obtains a difference signal from an input video signal Y1 out of two input video signals Y1, Y2 having mutually different fields and simultaneously inputted and an output signal from the 2nd field memory 7b, extracts a part with small amplitude as a noise, subtracting the extracted part from the signal Y1 to reduce noise and outputs the noise-reduced signal to a zooming circuit 5 and the 1st field memory 7a. Similarly the 2nd noise reducing circuit 6b reduces noise from the signal Y2. with the constitution, noise can be reduced by using two fields existing on the same position in space and frame circulation type noise reducing processing in space and field circulation type noise reducing processing in time can be attained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a noise reduction device used for the purpose of improving S / N in video equipment such as a video camera.

[0002]

2. Description of the Related Art In recent years, a camera-integrated VTR or the like has come to have a function of performing zoom by performing signal processing on a video signal output from a CCD.

This processing is called electronic zoom in distinction from optical zoom by a lens, and is used together with optical zoom to improve the overall zoom magnification. The electronic zoom will be briefly described below.

FIG. 3 is a diagram for explaining the outline of the electronic zoom process in the vertical direction. In FIG.
1, a2 and a3 represent three consecutive scanning lines in the same field of the video signal. Now, the input signal a1,
Consider a case where the vertical zoom processing of 2 times is performed on a2 and a3.

As shown in the drawing, scanning lines inserted between a1 and a2 and a2 and a3 are interpolated by (a1 + a2) / 2 and (a2 + a3), respectively.
If it is obtained and output as / 2, an image in which the vertical direction of the input image is doubled is displayed on the monitor.

However, the biggest drawback of this process is
As shown in the figure, the vertical resolution, that is, the spatial frequency characteristic in the vertical direction is deteriorated. In the case of the NTSC system, the vertical resolution is 525/2 [cph], but when the 2 × zoom processing is performed, the vertical resolution is half that of 525/4 [cp].
h].

As one method for improving this,
A method is conceivable in which the density of scanning lines is increased to increase the sampling frequency in the vertical direction. This is shown in FIG. 3 (b). FIG. 3B shows a case where a 2 × zoom is performed without interpolation processing by obtaining a scanning line for one frame. In this case, the vertical resolution after zoom processing is 525/2 [cph].

Although the vertical zoom has been described above, the above applies to the horizontal zoom in exactly the same manner.

Next, a method of increasing the sampling frequency in the vertical direction as described above will be described. The first conceivable method is a method of obtaining a signal for one frame from an input signal and a signal obtained by delaying the input signal by one field using a field memory. This method is fine for still images,
In the case of a moving image, there is a difference in sampling time between the two fields, so the screen becomes very unsightly when the moving part is zoomed.

Therefore, a method that can be considered is a method of obtaining signals of two fields having the same sampling time. This method can be realized by using, for example, two CCDs. This is shown in FIG.

FIG. 4 shows the spatial positions of the scanning lines of the video signals output from the two CCDs at the same spatial position, where a1 to a3 are the CCD1.
, And b1 to b3 are output signals of the CCD 2.
In the figure (a), a1 to a3 are odd fields and b1 to b3.
Indicates an even field signal, and (b) shows the opposite case. In this way, to make the output signals of the two CCDs have opposite fields,
This is possible by D read control and is known as a vertical pixel shift method.

Zooming is performed using the scanning lines for one frame thus obtained, and finally a signal for one field is obtained. However, recently, the miniaturization of the VTR with a built-in home camera has progressed, and the miniaturization of the CCD has also progressed accordingly. Naturally, the light receiving area per pixel is also small, so that the S / N tends to deteriorate, and it is necessary to improve the S / N by some means.

Therefore, improvement of S / N by a cyclic noise reduction device using a field memory or a frame memory which is conventionally mounted on a home VTR or the like is being studied.

Here, the operation of the cyclic noise reduction device will be briefly described. FIG. 5 shows an example of the configuration of a cyclic noise reduction device using a field memory. The difference signal between the input video signal and the output signal of the field memory 7 is obtained by the first subtraction means 10a. If the input video signal is a still image, the differential signal contains almost no video signal, and only noise is extracted. By subtracting this difference signal from the input signal in the second subtraction means 10b, noise is reduced. This process can be regarded as an averaging process of two fields.

However, in the above-mentioned cyclic noise reduction apparatus, since a video signal contains a large amount of video signals in a moving image, if the differential signal is subtracted from the input signal as it is, afterimage deterioration is caused. . Therefore, based on the statistical reason that “generally, noise has a smaller amplitude than a signal”, the difference signal is multiplied by a coefficient k (0 ≦ k ≦ 1) in the multiplication means 11 of FIG. Only the part is extracted as noise. Specifically, noise is extracted by controlling k to a value close to 1 for a small amplitude portion of the difference signal and controlling k to a value close to 0 for a large amplitude portion. By subtracting the noise thus extracted from the input signal, it becomes possible to reduce the noise while suppressing the afterimage.

[0016]

However, the above cyclic noise reduction apparatus may have a problem not only in the case of moving images but also in the case of still images. This is shown below.

FIG. 6 (a) is an enlarged view of the boundary portion when a diagonal line exists in the screen. When such a signal is processed by the above cyclic noise reduction apparatus, the averaging processing of the two fields is a1 and b, respectively.
1, between a2 and b2 and between a3 and b3. Therefore, as the noise reduction effect is strengthened, the non-correlation part is averaged, and the contrast of the non-correlation part is lowered and the boundary of the diagonal line becomes rough as shown in FIG.

If the noise reduction effect is weakened in order to avoid this phenomenon, the S / N cannot be improved so much. Further, if the frame recursive noise reduction processing is performed, the above phenomenon does not occur basically, but since the sampling frequency in the time axis direction is 1/2 of that in the case of field, the afterimage deterioration is more than that in the case of field recursive type. There is a problem of getting bigger.

The present invention solves the above-mentioned conventional problems, and provides a noise reduction device which is basically free from deterioration at the boundary of diagonal lines and has the same residual image deterioration as the field recursive noise reduction device. To aim.

[0020]

In order to achieve this object, a noise reduction apparatus of the present invention comprises a first field and a second field which are interlaced video signal frames and which are input at the same timing. The input video signal of the first field and the second delay means for delaying the video signal by (2N + 1) fields (N = 0, 1, 2, ...) With respect to the input video signal of A first noise reduction circuit that uses the second delay means output signal as an input signal, performs noise reduction processing, and outputs the signal to the first delay means, the input video signal of the second field, and the first delay means output. A second signal that receives the signal as an input signal, is subjected to noise reduction processing, and is output to the second delay means.
It has the configuration of the noise reduction circuit.

Further, in the noise reduction device of the present invention, the first field and the second field which constitute one frame of the interlace type video signal by both and are inputted at the same timing.
First and second selecting means for selecting and outputting one of the input video signals of the first field and the second field with respect to the input video signal of the field, and the video signal of (2N + 1) field (N = 0, 1, 2, ...
..) First and second delaying means for delaying said first and second delaying means
A first noise reduction circuit that receives the output signal of the selection means and the output signal of the first delay means as input signals, performs noise reduction processing, and outputs the result to the first delay means;
The second noise reduction circuit has a configuration in which the output signal of the selection means and the output signal of the second delay means are used as input signals, noise reduction processing is performed, and the signal is output to the second delay means.

[0022]

With the above-described structure, the present invention performs noise reduction processing utilizing the correlation between two fields spatially located at the same position.

[0023]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A noise reduction device which is an embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a block diagram of a noise reducing apparatus which is a first embodiment of the present invention.

The signal source 1 outputs two systems of video signals Y1 and Y2 as shown in a1 to a3 and b1 to b3 of FIG. 4, respectively, and outputs them to the first and second noise reduction sections 3 and 4, respectively. . Examples of the signal source 1 include a plurality of CCDs having a vertical pixel shift structure.

The first and second noise reduction units 3 and 4 are
It is composed of first and second noise reduction circuits 6a and 6b and first and second field memories 7a and 7b, respectively. The first and second noise reduction circuits 6a and 6b each have a circuit configuration as shown in FIG. In the first noise reduction circuit 6a, the input video signal Y1
The output signal of the second field memory 7b is subtracted to obtain a difference signal, a portion having a small amplitude is regarded as noise and extracted, and subtracted from the input video signal Y1 to reduce the noise and output to the zoom circuit 5. It is also output to the first field memory 7a.

Similarly, the second noise reduction circuit 6b extracts noise from the input video signal Y2 and the output signal of the first field memory 7a and subtracts it from the input video signal Y2 to reduce the noise. And to the first field memory 7b.

As a result, the zoom circuit 5 receives the video signal having the double vertical sampling frequency and performs the zoom process with high vertical resolution.

Here, the reason why the differential signal is obtained from the input video signal Y1 and the output signal of the second field memory 7b in the first noise reduction circuit 6a will be described. Assuming that the video signal as shown in FIG. 4A is output from the signal source 1 at an arbitrary time, one field period before, a1 to a3 and b1 as shown in FIG. ~ B3
A signal whose spatial position is reversed is output. Therefore, the Y1 signal currently output from the signal source 1 is spatially located at the same position as the Y2 signal one field period before, that is, the output signal of the second field memory 7b. In the second noise reduction circuit 6b, the input video signal Y2 and the first
The differential signal is obtained from the output signal of the field memory 7a.

As described above, two fields whose fields are different from each other
If one video signal of the system video signal and a signal obtained by delaying the other video signal by one field are input to the cyclic noise reduction circuit, two fields spatially existing at the same position are Noise reduction can be performed using spatially a frame recursive noise reduction process,
In principle, the deterioration of the diagonal line boundary portion peculiar to the field recursive processing is eliminated. Further, since it is a field recursive process in terms of time, the afterimage deterioration is less than that of the frame recursive process.

Next, FIG. 2 shows a block diagram of a noise reducing apparatus according to a second embodiment of the present invention. The signal source 1 is a 2 as shown in a1 to a3 and b1 to b3 of FIG.
System video signals Y1 and Y2 are generated, respectively
And to the second selecting means 2a, 2b.

The first and second selecting means 2a and 2b select either Y1 or Y2 in response to the control signal from the control signal input terminal 8, and the first and second noise reducing sections 3 and 3 are selected. Output to 4 respectively.

The constituent elements of the first and second noise reduction units 3 and 4 are the same as those in the first embodiment, and the description thereof will be omitted. In the first noise reduction circuit 6a, the first selection means 2
The output signal of the first field memory 7a is subtracted from the output signal of "a" to obtain a difference signal, a portion with a small amplitude is regarded as noise and extracted, and subtracted from the output signal of the first selecting means 2a to reduce noise. Then, it outputs to the zoom circuit 5 and also to the first field memory 7a.

Similarly, the second noise reduction circuit 6b extracts noise from the output signal of the second selecting means 2b and the output signal of the second field memory 7b and subtracts it from the output signal of the second selecting means 2b. Noise is reduced to output to the zoom circuit 5 and the second field memory 7
Also output to b.

As a result, in the zoom circuit 5, a video signal having a vertical sampling frequency of 2 is input, and zoom processing with high vertical resolution is performed.

Here, the first and second selecting means 2a,
By inverting the control signal input to 2b every one field period and switching the output signal, the same processing as in the first embodiment can be performed. This is the first
The noise reduction unit 3 will be described as an example. Assuming that Y1 is selected by the first selection signal 2a at any time and is input to the first noise reduction circuit 6a, Y1 is written in the field memory 7a at that time, but one field After that, when the first selection signal 2a is Y
2 is selected and Y1 is output from the field memory 7a. Therefore, Y1 and Y2 are output to the first noise reduction circuit 6a.
Will be input. Therefore, in this case, FIG.
As is apparent from the above, the cyclic noise reduction processing is performed with the signals of the fields having the same spatial positions as inputs. The same applies to the second noise reduction unit 4.

As described in the above two embodiments, in the present invention, for a signal having a scanning line for one frame in one field period, two fields existing spatially at the same position are used to make a cyclic type. It becomes possible to perform noise reduction processing, spatially it becomes a frame recursive type, and there is no deterioration at the diagonal line boundary in principle. It is possible to configure a low noise reduction device.

[0037]

As described above, according to the present invention, by performing the noise reduction processing utilizing the correlation between two fields that are spatially located at the same position, the frame is spatially cyclic and spatially temporal. A field recursive noise reduction process can be realized, and as a result, there is no deterioration of the diagonal line boundary portion peculiar to the field recursive noise reduction process, and a process with less afterimage deterioration than the frame recursive noise reduction process is possible. A noise reduction device can be realized and its practical effect is great.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a noise reduction device according to a first exemplary embodiment of the present invention.

FIG. 2 is a block diagram showing the configuration of a noise reduction device according to a second embodiment of the present invention.

FIG. 3 is a schematic diagram and a frequency characteristic diagram for explaining an operation of a vertical electronic zoom process.

FIG. 4 is a schematic diagram for explaining vertical pixel shift.

FIG. 5 is a block diagram showing the configuration of a field recursive noise reduction device.

FIG. 6 is a screen enlarged view for explaining deterioration of a diagonal line boundary portion due to field recursive noise reduction processing.

[Explanation of symbols]

 2 selection means 3 first noise reduction section 4 second noise reduction section 6 noise reduction circuit 7 field memory (delay means)

Claims (2)

[Claims] 1. An interlaced video signal 1 for both.
With respect to the input video signals of the first field and the second field which form the frame and are input at the same timing, the video signal is (2N + 1) fields (N = 0, 1, 2,
...) First and second delaying means for delaying, inputting the input video signal of the first field and the output signal of the second delaying means, and applying noise reduction processing to the first delaying means A first noise reduction circuit for outputting to the second delay means, and a second field for inputting the input video signal of the second field and the output signal of the first delay means to perform noise reduction processing and outputting to the second delay means. Noise reduction circuit of the above, and the first and second noise reduction circuits, or the first
And a noise reducing device which outputs the output signal of the second delay means. 2. A first interlaced video signal which constitutes one frame and is inputted at the same timing.
First and second selecting means for selecting and outputting one of the first and second input video signals with respect to the input video signals of the field and the second field; and a video signal of (2N + 1) fields (N = 0, 1, 2,
...) First and second delay means for delaying, the output signal of the first selecting means and the output signal of the first delay means as input signals, and noise reduction processing is applied to the first and second delay means. A first noise reduction circuit for outputting to a delay means, an output signal of the second selection means and an output signal of the second delay means as input signals, noise reduction processing and output to the second delay means. A second noise reduction circuit for controlling the first and second noise reduction circuits or the first noise reduction circuit.
And an output signal of the second delay means,
And a noise reduction device characterized by switching the control signal of the second selecting means every predetermined period.