JPH06333061A - Built-in system for one-chip microcomputer - Google Patents

Abstract

PURPOSE:To write the control data and to ensure the version-up of a program after the products are mounted even with a microcomputer that has a flash memory lacking a program loading ROM. CONSTITUTION:A CPU 6 carries out a control operation based on the program data stored in a part of a flash memory 1 where the data can be erased and written for each block. Then a control program is written before a one-chip microcomputer is built-in a system so that the data stored in the memory 1 are rewritten under the control of the program. Then the data are written in the memory 1 via a writing controller 4 after the one-chip microcomputer is built-in the system.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a system incorporating a one-chip microcomputer using a microcomputer with a built-in flash memory.

[0002]

2. Description of the Related Art Conventionally, "Nikkei Electronics" (May 1992, p.
~ 62 Special Feature "Replacement of Magnetic Disks in Flash DRAMs", etc.).

A technology relating to a microcomputer (hereinafter abbreviated as a microcomputer) in which the flash memory is incorporated as a program memory has already been announced by Hitachi as "H8 / 538F". The technique for doing so is already known.

Further, this "H8 / 538F" also includes a write controller for rewriting the contents of the flash memory by a program, and there is a possibility that the program may be written in the flash memory in the microcomputer while the microcomputer is mounted on the product. Are also shown.

On the other hand, in Japanese Patent Laid-Open No. 4-291489, R for another loader program of the flash memory is disclosed.
A technique in which an OM is built in and a main control program is stored in a flash memory by a ROM program via a data communication device is disclosed.

[0006]

However, in order to rewrite the contents of the flash memory in the microcomputer with the microcomputer mounted in the product, a hardware write controller for rewriting the flash memory by the above-mentioned program control is required. Becomes

Further, the technique disclosed in Japanese Patent Laid-Open No. 4-291489 mentioned above has a problem that the program cannot be rewritten when the product is mounted without a ROM for the loader program.

The present invention has been made in view of the above problems, and its purpose is to provide a program loading RO.
Even in the case of a microcomputer having a flash memory without M, adjustment data can be written and a program version can be updated after product mounting.

[0009]

In order to achieve the above object, in a system incorporating a one-chip microcomputer of the present invention, in the system incorporating the one-chip microcomputer, the one-chip microcomputer is configured to store data in blocks. Erasable and writable non-volatile memory, control means for executing control operation according to program data stored in a part of the non-volatile memory, and rewriting data stored in the non-volatile memory by program control. And a data rewriting means for writing the control program for the system before the one-chip microcomputer is incorporated into the system, and after the one-chip microcomputer is incorporated, the data rewriting means is used to Write data to non-volatile memory And performing the operation.

[0010]

In the system incorporating the one-chip microcomputer of the present invention, the non-volatile memory can erase and write data for each block, and the control means controls according to the program data stored in a part of the non-volatile memory. Perform an action. The data rewriting means writes a control program for rewriting the data stored in the non-volatile memory under program control before the one-chip microcomputer is incorporated in the system. Further, after the one-chip microcomputer is installed, the data rewriting means is used to write data in the nonvolatile memory.

[0011]

Embodiments of the present invention will be described below with reference to the drawings. 1 to 3 are diagrams showing in detail the internal configuration of a microcomputer for rewriting a flash memory by a program.

First, FIG. 1 is a diagram showing a configuration of a first embodiment in which a rewriting basic program of a flash memory is held in a ROM. In the first embodiment, the addresses of the flash memory 1 and the boot ROM (hereinafter abbreviated as ROM) 2 are different. The M terminal is a terminal for switching between execution of the program of the ROM 2 and the program of the flash memory 1. That is, in this embodiment, when the microcomputer 11 is reset (not shown),
The initialization unit 7 determines the address after the reset start and determines whether to execute the program of the ROM 2 or the flash memory 1. The M terminal is also connected to the I / O circuit 3 so that it can be determined by the program which mode it is. Further, 12V is a voltage supply terminal for rewriting the flash memory 1. A booster circuit may be provided inside the microcomputer 11a to boost 12V from Vcc. However, since the booster circuit requires a large area within the microcomputer 11a, it is desirable to supply from the outside as in the present embodiment. In addition to the above 12V, the write controller 4 is also connected with a terminal for enabling the write controller 4 from the outside. The terminal that makes the write controller 4 operable may be connected to the write controller 4 in common with the I / O terminal, or may be operated simply by programming and without a control terminal.

Next, FIG. 2 is a diagram showing the configuration of a second embodiment in which the boot ROM and flash memory have the same address. In the second embodiment, both the flash memory 1 and the boot ROM 2 are accessed by power-on reset, but the selector 10 is switched by the M terminal and only one of the data is output to the data bus 9. .

FIG. 3 is a diagram showing the configuration of the third embodiment having no boot ROM. In the third embodiment, data cannot be written in the flash memory 1 when it is mounted on a product, but if at least a boot program to be described later is written by a ROM writer before mounting, the program can be used. Thus, the program in the flash memory 1 can be rewritten even after the product is mounted.

FIG. 4 is a diagram showing an example of the address map of the flash memory 1 of the microcomputer 11 described above. A feature of the flash memory 1 is that data can be erased or written, that is, rewritten, for each block. In the example shown in the figure, the blocks are divided into blocks 0 to 7 (hereinafter abbreviated as B0 to B7). The memory capacity in each block is 8K, 1K, 5
Although it has various values of 12,256,128 bytes, it may be a constant value such as 8 Kbytes.

The embodiment using the flash memory 1 will be described below, but it goes without saying that other than the flash memory 1 is also effective when a block rewriting type non-volatile memory is used. Further, in the following description, the microcomputer 11 of the first to third embodiments shown in FIGS. 1 to 3 will be referred to as a microcomputer 11a and a microcomputer 1 respectively.
1b and the microcomputer 11c.

FIG. 5 is a flow chart showing the operation for writing data in all the blocks of the flash memory 1. This program is a microcomputer 11a with ROM2, 1
1b must be in ROM2 without fail.
This program cannot be used with c. This is because the program for rewriting is gradually rewritten in the microcomputer 11c. The microcomputers 11a and 11b execute this program after reset.

When this program is executed, first M
The terminals (in the case of the microcomputers 11a and 11b), 12V, and other control terminals are checked to determine whether writing is possible (step S101). If the writing is impossible, an abnormal signal is transmitted to the program transfer device 19 and the process ends (steps S111 and S112).

On the other hand, if the program is writable, the first program (B
0) is designated (step S102). Then, the data request signal is output to the program transfer device 19 (step S103). Then, since program data is transmitted from the program transfer device 19, this data is received and stored in a predetermined storage area of the RAM 5 in the microcomputer (step S104). Subsequently, after the currently designated block of the flash memory 1 is erased (step S105), the data stored in the RAM 5 is written into the designated block of the flash memory 1 (step S106). After this data is written, the contents of the RAM 5 and the flash memory 1 are verified (step S107). If the result is "OK", the designated block is incremented, and it is confirmed whether or not the final block has been completed. When the block is not completed, the above steps are repeated (steps S108 and S1).
09). When the final block is completed, an end signal is output to the program transfer device 19 (step S11).
0), the program writing is completed (step S11)
2). Further, if the verification result in step S107 is "NG", the program transfer device 1
An abnormal signal is transmitted to 9, and this program ends (steps S111 and S112).

Next, FIG. 6 is a flow chart showing the operation of the program "specific block rewriting" for rewriting only a specific block of the flash memory 1. This program is written in the ROM 2 or the flash memory 1 in the microcomputers 11a and 11b, but in the microcomputer 11c, it is written in the ROM writer when the microcomputer is a single unit. In this case, B0 shall be written. It should be noted that the microcomputer 11a, b R
If there is no OM2, it is written in B0 of the flash memory 1. Further, this program is executed by calling a subroutine from the program transfer device 19 by a subroutine "checker communication" described later.

When this program is executed, it is first determined whether or not the write mode is designated (step S2
01), if the write mode is designated, then it is determined whether or not the designated block is "0" (step S202). If the designated block is not "0", the data in the designated block is erased (step S2).
03), the data of the RAM 5 is written in the designated block (step S204), the designated blocks of the RAM 5 and the flash memory 1 are verified (step S205), and if the result is "OK", the program transfer device 19
The end signal is transmitted to the device (step S206) and the process returns (step 208).

On the other hand, if the write mode is not set in step S201, the designated block is "0" in step S202, or RAM is specified in step S205.
If the result of verifying 5 and the designated block of the flash memory 1 is "NG", an abnormal signal is transmitted to the program transfer device 19 (step S207), and this program ends (step S209).

As described above, the difference between this program "specific block rewriting" and the program "program writing" shown in FIG. 5 is that this program rewrites only the designated block before it is called. It is in. However,
B0 where this program is stored is prohibited so that it cannot be rewritten. This is because, if an attempt is made to rewrite this block, the program being executed will be erased when the designation B is erased, and rewriting becomes impossible. After the rewriting is finished, the return is finished so that the subroutine "checker communication" can be returned to. Note that, here, the "specific block rewriting" is described as an example of writing to B0, but it is needless to say that it can be performed in other blocks.

Next, FIG. 7 is a block diagram showing the configuration of a camera to which the system having the one-chip microcomputer of the present invention is applied. In the figure, a one-chip microcomputer 11 for performing the sequence and control of the camera has a flash memory 1 that can be rewritten by program control. Further, the microcomputer 11 has an AF circuit 12 for measuring the distance to the subject, an AE circuit 13 for measuring the brightness of the subject, a flash memory writing control terminal 14 for connecting the program transfer device 19, and a camera adjustment. Machine and R
An external communication connector 15 for connecting a device for writing OM correction data, a flash memory writing control terminal, and a strobe 16 for strobe charging and light emission are connected.

This flash memory write control terminal 14
Includes the above-mentioned M terminal, 12V, and other terminals.
The flash memory writing control terminal 14 and the external communication connector 15 may be a common connector.

In addition to the above, the microcomputer 11 has a motor M _L for driving the focus lens, a motor M _Z for driving the zoom lens, and a motor for winding and rewinding the film via a motor driver 17 for driving various motors. _MW ,
A motor M _S for driving the shutter and a magnet M _g for closing the shutter are connected.

Further, the microcomputer 11 includes a switch S _L for detecting the initial position of the focus lens, a photo interrupter PI _L for detecting the unit drive amount (position) of the focus lens, and a photo interrupter PI _Z for detecting the position of the zoom lens. , A photo reflector PR for detecting the perforation of the film, and a switch S _S for detecting the initial position of the shutter are connected.

Further, the microcomputer 11 includes a power switch 18 and a first (1st) release switch 2
Various switches such as the first and second (2nd) release switch 22 are connected. The 1st release switch 21 and the 2nd release switch 22 form a two-stage switch, and the release switch 21 is turned on at the first stage and the 2nd release switch 22 is turned on at the second stage.

Hereinafter, with reference to the flowchart of FIG.
The operation of this camera will be described. When a battery (not shown) is inserted into the camera, the ports of the microcomputer 11 and others are initialized (step S301). Then C
It is checked whether the HECK terminal is at a high level "H" or a low level "L", and if it is "L", a subroutine "checker communication" described later is executed (steps S302, S).
303).

When the power switch 18 is on, the camera waits until the 1st release switch 21 is pressed, and when the switch 21 is pressed, the subroutine "release processing" described later is executed. Further, when the power switch 18 is off, the power switch 18 remains in a standby state until it is turned on. Since the other detailed processing has little relation to the present invention, description thereof will be omitted (steps S304, S305, S306).

Next, referring to the flow chart of FIG.
The operation of the subroutine "checker communication" will be described. The subroutine "checker communication" has already been disclosed in Japanese Patent Application Laid-Open No. 2-941 by the applicant of the present application, and therefore detailed description thereof is omitted here.
Only the concept will be explained.

The microcomputer 11 outputs a synchronizing signal and a serial communication clock to the outside (steps S401, 4).
02), data is received from the outside (step S40).
3). Here, if there is no data, the process ends. When the data is received, the mode of the memory is determined (step S404), and if it is the read mode, the meaning of the data is decoded and the data at the designated address in the microcomputer 11 is read (step S405). Then, the data is output to the serial line (step S406), and this routine is exited.

If the memory mode is the write mode (step S407), the confirmation data is checked (step S408). If the result is good, the data is written to the designated address (step S4).
09). If it is in the subroutine call mode (step S410), the confirmation data is checked (step S408), and if the result is good, the subroutine of the designated address is called (step S4).
12) Execute the subroutine of the designated address.

Further, when the continuous communication mode for performing only communication with the outside is set (step S413), it is subsequently determined whether or not the continuous communication mode is set (step S413).
414). If it is not in the continuous communication mode, checker communication is performed again (step S415), and then CHE
"Checker communication" is performed until the CK terminal becomes "H" (step S416). Then, in the case of the off mode in which continuous communication is stopped (step S417), it is determined whether or not the continuous mode is in progress (step S418). If it is in the continuous mode, the stack pointer is returned by one level (step S419). Using this checker communication, it is possible to execute the above-mentioned "specific block rewriting" program, adjust the camera to be described later, and the like.

Next, referring to the flowchart of FIG.
The operation of the subroutine "release processing" executed by the camera will be described in detail. When this program is executed, first, photometry for measuring the brightness of the subject is performed (step S501), and then distance measurement for measuring the distance to the subject is performed (step S502). Further, in the AE calculation, the data in the fresh memory for correcting the variation of the photometric value of each camera based on the above photometric value is used to correct the photometric value to a regular photometric value (step S503), and in the AF computation, the variation of each camera is calculated. Using the data in the flash memory 1 to be corrected, the drive amount of the focus lens is corrected to an appropriate value for each camera (step S504).

Subsequently, the 2nd release switch 22 is checked, and if it is off, it waits until it is turned on and the 2nd release switch 22 is turned on.
If the 1st release switch 21 is turned off while the release switch 22 is off, the process is terminated (step S50).
5,506). When the second release switch 22 is turned on, the focus lens is driven by driving the lens, the shutter is opened, and the film is wound up to end the processing (steps S507 to S510).

Here, FIG. 11 is an image view for adjusting the individual variations of the camera, and as shown in the figure, the camera 33 is connected to the adjuster 32 via the external communication connector. Then, the measuring device or the reference value output device 31
Is also connected to the regulator 32. Further, an optical signal corresponding to the measurement distance is output for AF adjustment, and a specific brightness for adjustment is output for AE adjustment.

Next, FIG. 12 is an image view of the production adjustment line of the camera. In FIG. 12A, first, the program is transferred to the flash memory 1 of the microcomputer 11 in the camera by the program transfer device 19, and the correction data finally adjusted through AF adjustment, AE adjustment, etc. is flashed by the adjustment value writing device. Write to memory 1. The correction data up to the end of this adjustment is temporarily stored in the RAM 5 in the microcomputer, which will be described later, and is written at once at the end. In this case, if the camera is kept in the battery for adjustment, or if the battery is removed and the microcomputer 11 in the camera is put in standby and then the next adjustment is made, the internal filter capacitor can be used R in the microcomputer 11 can be backed up if time
The AM5 data will not be corrupted.

FIG. 12B shows the RAM in the microcomputer 11.
FIG. 5 is an image diagram of an adjustment line when the data of 5 is likely to be damaged, and the adjustment device is connected online after the adjustment starts, and the correction data is taken online and finally the correction data is written to the flash memory 1. . By doing so, even if the contents of the RAM 5 are destroyed, the correction data can be written for each camera.

Next, FIG. 13 is a flow chart showing a program on the transfer device 19 side when the program is transferred by the program transfer device 19 after being assembled into a product,
It corresponds to the microcomputers 11a and 11b.

When this program "program transfer" is executed, the circuit version of this product is first set (step S601). The reason for setting the circuit version is that the microcomputer 11 having the flash memory 1 can easily upgrade the program version by replacing the program even if a program bug is discovered later. However, the circuit of the product may be defective, and the circuit is often upgraded from the start of production. Therefore, even if a bug is found, it is not possible to simply replace the program, and it is necessary to upgrade the version according to the circuit.
Therefore, the flash memory 1 in the microcomputer 11 of the product
It is necessary to store the circuit version data in a part of. This is described in detail in Japanese Patent Application No. 5-51752.

After setting the circuit version in this way, the terminal M is set to "H", that is, the program write mode (step S602), 12 V is further supplied, and other control terminals are also set to the write mode if necessary. It is set (step S603). When the microcomputer 11 is reset (step S604), the program "program write" in the ROM 2 in the product is executed.
The data is transferred according to the instruction, and the data is written in the flash memory 1 (step S605).

Next, FIG. 14 is a flow chart showing an example of data writing to the flash memory 1 when the program "specific block rewriting" is executed by the microcomputers 11a, b, c. In the microcomputer 11c, R
It is necessary to write this program in the OM writer,
If the program is not stored in the ROM 2 in the microcomputers 11a and 11b, it is necessary to write this program in advance by using the ROM writer or the subroutine "program transfer".

When this program is executed, the circuit version of the product is first set (step S70).
1), the CHECK terminal of the product is set to "L" (step S702), and the microcomputer 11 is reset (step S703). Then, the subroutine "Checker communication"
Since the above operation is started, the continuous communication mode is set so that the following work can be performed (step S704).

First, 12 V is supplied, and if necessary, other write control terminals are set so as to be in the write mode (step S705). Then, the program is written block by block from B1 of the next flash memory 1 having the program "program transfer 2". Then, when writing of all blocks of the program for camera operation is completed, the program is ended (steps S706 to 711). It is not necessary to write in B7, which is the adjustment data area.

Here, FIG. 15 shows an example in which a program is written in the flash memory 1 in the state of a single microcomputer. P
The microcomputer 11 is set in the ROM writer 41, and the control unit 42 controls the writing of a program in the microcomputer 11.

Further, FIG. 16 is a flowchart showing the program writing operation of the control section 42.
FIG. 16A is a flowchart showing the sequence when only the subroutine "rewrite specific block" is loaded. In this case, after the microcomputer described later is mounted on the camera, the camera control program is flashed by the method shown in FIG. Write to the memory 1 (steps S801 to S80)
3). Then, FIG. 16B is a flowchart showing a sequence in the case where the camera control program is also written in advance. In this case, since the program does not need to be written in the flash memory 1 after the microcomputer 11 is mounted on the camera, the program transfer in the first step shown in FIG. 21 is omitted (steps S811 to 813).

Next, the zoom focus correction during the AF adjustment will be described with reference to FIG. Since this has been described in detail in JP-A-1-201634 (US Pat. No. 4,914,464), it will be briefly described here.

The horizontal axis in the figure indicates the value of the zoom encoder (0H
Is wide and 40H is tele), and the vertical axis is the focus lens feed-out pulse correction value from the reference focus position when the focus is infinite at each zoom position. The correction values D0 to D4 are stored in the nonvolatile memory for each zoom encoder 10H. When the camera is actually used, if the above-mentioned correction value is added to the focus lens reference extension amount, it is converted into the extension amount of the focus lens in which the variation of each camera is corrected. This calculation is used in the subroutine "AF calculation" in FIG.

Next, FIG. 19 is a flow chart showing an example of a program of the AF adjuster for performing the zoom focus correction when the flash memory 1 in the microcomputer 11 of the present invention is used for correction data.

When this program is executed, i is first initialized (step S901), and the zoom is moved to wide (0H) (step S902). Subsequently, the focus lens is moved to the infinite reference position (step S9).
03). Here, the lens refers to an infinite chart, the defocus amount of the lens is measured by a focus measuring device, the defocus amount is converted into a lens delivery pulse value, and the converted value is D (i ). Then, this D (i) is stored in the RAM 5 in the microcomputer 11 (steps S904, 905). Although it may be directly substituted into the flash memory 1, writing to the flash memory 1 at a time after all other adjustments are completed, because it takes a long time to write and the flash memory 1 in the microcomputer 11 has a small number of guaranteed rewrites. Is more rational.

Thereafter, the zoom is moved by 10H by the encoder value, and the above operation is repeated to determine the correction data to be substituted into D0 to D4 (steps S910 to S912). After that, the zoom is returned to wide (step S913), the distance measurement value is set to infinity, and then the actual subroutine "A" is executed.
F calculation "is executed (step S914), the calculation using the correction value is performed, the focus lens is driven based on the result (step S915), and the focus is confirmed (step S915). Then, if the result is good, all the operations are ended (step S917), and if the result is bad, the adjustment is judged to be defective (step S918).

FIG. 18 is a diagram showing an example of photometric value correction using a non-volatile memory. For this,
Since it has already been disclosed in Japanese Patent Laid-Open No. 62-25733, it will be briefly described here.

In the figure, the error between the value measured with the reference luminance and the standard value is stored in the non-volatile memory 20, and when the camera is used, the value measured is the subroutine "AE calculation" shown in FIG. Within the above error value (correction value)
Is corrected to the normal photometric value.

Next, FIG. 20 shows a program on the adjuster side for creating the above-mentioned photometric correction data, which is a part of the AE adjustment, in the flash memory 1. When this program is executed, first, the brightness of the brightness adjuster is set to a predetermined value for adjustment (step S1001). Then, a general error (usually 0) is set in FCV (step S1002). This FCV is a variable for substituting the data for the correction value written in the flash memory 1. Then, a subroutine "photometry" is executed (step S1003). Then, since the correction value contains “0”, the photometric value is output as the error ΔCV with respect to the standard value, and therefore the subroutine “AE calculation” is executed to obtain ΔCV (step S1004).
Therefore, the photometric value can be corrected by substituting this ΔCV into the FCV (step S1005). Then, the subroutine "photometry" is executed again (step S1).
006), after that, the FCV is used to execute the subroutine “AE calculation” (step S1007), and it is confirmed whether the correction is correct (step S1008). If the result is "OK", the process ends (step S
1009), if it is "NG", it is determined that the adjustment has failed (step S1010).

Next, FIG. 21 shows the microcomputer 11c or the ROM 2
6 is an example of an address map of the flash memory 1 when there is no program "writing a specific block" in the memory. In the figure, the program "specific block write" is stored in B0.
You can also write subroutines, etc., that have absolutely no bugs in this block. Since this B0 cannot be erased because there is a "specific block write" program, the microcomputer which starts from address "0000" at power-on reset can be devised such that the instruction for jumping to the next block is placed at the beginning. Good. Also, this B
If a value other than 0 is selected as the location for storing the "specific block write" program, it is only necessary to consider that it cannot be erased. Further, B1 to B6 are programs for camera control, and here, B7 is used as a data area for adjustment data (correction value). It is convenient to store the above-mentioned "circuit version" data in the adjustment data area. In addition, in the microcomputer 11, the area from the address "9000" is set as the RAM area.

Here, in the adjustments shown in FIGS. 19 and 20, adjustments are performed using a program when the camera is actually used. The actual subroutines "AF operation" and "AE operation" use the data in the flash memory 1 as a correction value, but it is more advantageous not to rewrite the flash memory 1 during adjustment as described above.

Therefore, at the time of adjustment, it is conceivable to use the addresses "9000" to "907F" of the RAM 5 instead of the addresses "8700" to "877F" of the flash memory 1 for substitution. That is, at the time of adjustment, if the RAM 5 is used instead of the flash memory 1 in some way for adjustment, the RAM 5 may be transferred to the flash memory 1 after all adjustments are completed.

Hereinafter, instead of the flash memory 1, a RAM
Four examples of the method of substituting 5 will be described. First, FIG. 22 is a diagram showing a method of substituting the RAM 5 with hardware in the microcomputer 11. In this figure, the address buses A8 to A15 are monitored and changed to "90" when A8 to A15 are "87" and the adjusting signal is "H". The changed address bus is connected only to the flash memory and the RAM. The adjustment signal may be used as a port or may be a register in the microcomputer.

FIG. 23 is a diagram showing a method of transferring the data in the flash memory 1 to the RAM 5 once and using the data in the RAM 5 as the correction data. Here, the flowchart of FIG. 8 is modified and used as shown in FIG. First, after power-on, the flash memory (address “87
00 "to" 877F ") 1 is transferred to the RAM (addresses" 9000 "to" 907F ") 5 and then the subroutine" checker communication "is executed. In this case, since the data stored in the storage area of the RAM 5 is used as the correction value even when the camera is actually used in the “AF calculation” and the “AE calculation”, it is only necessary to write the correction value in the RAM 5 at the time of adjustment ( Steps S1101 to 1104).

In FIG. 24, a predetermined address (for example, address "8700") of the flash memory 1 is shown before adjustment.
It is a figure which shows the method of writing "00H (a)" in and "A5H (b)" after adjustment. In the “AE calculation” and the “AF calculation”, every time the value of the flash memory 1 is used, the program contains all judgments as shown in FIG. That is, if it is “00”, the data in the RAM 5 is read,
If "A5", the data in the flash memory 1 is read.
Therefore, the lower 8 bits of the addresses of the flash memory 1 and the RAM 5 are in one-to-one correspondence.

Further, FIG. 25 is a diagram showing a method of rewriting the program before and after the adjustment. In FIG.
FC1 "to" AEC2 "are labels indicating the addresses of the flash memory 1. However, the RAM addresses are set and linked at the time of adjustment.
AMERA ADJ ". After adjustment, link and set the address of the regular flash memory. The regular program is "CAMERA ADJ". After the adjustment, the address of the regular flash memory 1 is linked and set. The official program is "CAMERA US
E ".

Next, FIG. 26 is a flow chart showing a program of the program transfer device 19. When this program is executed, "CAMERA AD
J ”is transferred to the flash memory 1 (step S130
1, 1302, 1305), and after the camera adjustment is completed, the adjusted correction data and “CAMERA USE” are transferred to the flash memory 1 (steps S1301, 130).
3, 1034, 1305). Although an example in which only the label data is changed is shown here, it is needless to say that this method can be used even if the adjustment program and the completed program are completely changed. Further, it is also an effective method when the capacity of the adjustment program is very large.

Next, FIG. 27 is a flow chart of the adjustment value writing device for writing the correction data collected on the RAM 5 or online after the adjustment in the flash memory 1, here B7. FIG. 27A shows the RAM 5 of the microcomputer.
When writing the correction data remaining above, the number of times of rewriting of the flash memory 1 on B7 is first incremented. Next, the writing mode is set, B7 is designated, and the program "specific block rewriting" is executed (step S14).
01-S1405).

FIG. 27 (b) shows the case of writing the data compiled online, which is the same as FIG. 27 (a) except that the data compiled online is transferred to the RAM 5 in the microcomputer 11 ( Steps S1411-141
7).

Further, FIG. 27C shows a case where the entire area of the flash memory 1 is rewritten using the microcomputers a and b. First, the corrected data in the RAM 5 is read and preparation is made so that it can be written in B7. Next, the number of times of rewriting of the flash memory 1 is incremented to set the write mode. Next, the "program write" program is used to rewrite all areas of the flash memory 1 (step S1421).
~ S1425). In this case, the program "specific block rewriting" is unnecessary.

FIG. 28 is a flow chart showing a program on the program transfer device 19 side that upgrades the program at a repair shop or factory (switching production on the way or at the time of repair) when a bug is found in the program.

When this program is executed, first, it is determined whether the circuit version in B7 is read and only the program needs to be modified. Then, in the case of NG, the circuit upgrade is instructed (step S1503). On the other hand, in the case of OK, the adjustment value of B7 (correction data) is read (step S1504). Therefore, the number of times of rewriting of the flash memory 1 is incremented (step S1505). Then, a version upgrade program suitable for the circuit version is selected and set so that it can be transferred (step S1506). Further, the microcomputer 11 is set to the program writing mode (step S1507), and the program is transferred and written (step S1508).

[0069]

As described in detail above, according to the present invention, even a microcomputer having a flash memory without a ROM for program loading can write adjustment data and upgrade the program version after product mounting. A system incorporating a microcomputer can be provided.

[Brief description of drawings]

FIG. 1 shows a flash memory rewriting basic program as R
It is a figure which shows the structure of the 1st Example hold | maintained at OM.

FIG. 2 is a diagram showing a configuration of a second embodiment in which a boot ROM and a flash memory have a common address.

FIG. 3 is a diagram showing a configuration of a third embodiment having no boot ROM.

FIG. 4 is a diagram showing an example of an address map of a flash memory 1 of a microcomputer 11.

FIG. 5 is a flowchart showing an operation for writing data in all blocks of the flash memory 1.

FIG. 6 is a flowchart showing an operation of a program “specific block rewriting” that rewrites only a specific block of the flash memory 1.

FIG. 7 is a block diagram showing a configuration of a camera to which a system having a one-chip microcomputer of the present invention is applied.

8 is a flowchart showing an operation of the camera shown in FIG.

FIG. 9 is a flowchart showing an operation of a subroutine “checker communication”.

FIG. 10 is a flowchart showing an operation of a subroutine “release process”.

FIG. 11 is an image diagram for adjusting individual variations of the camera.

FIG. 12 is an image diagram of a camera production adjustment line.

FIG. 13 is a flowchart showing a program on the transfer device side when the program is transferred by the program transfer device after assembly into a product.

FIG. 14 is a flowchart showing an example of writing data to the flash memory 1 when a program “specific block rewriting” is executed by the microcomputers 11a, b, c.

FIG. 15 is an example of writing a program in the flash memory 1 in the state of a single microcomputer.

16 is a flowchart showing a program writing operation of the control unit 42. FIG.

FIG. 17 is a diagram for explaining zoom focus correction during AF adjustment.

FIG. 18 is a diagram showing an example of photometric value correction using a non-volatile memory.

FIG. 19 is a flowchart illustrating an example of a program of an AF adjuster when performing zoom focus correction.

FIG. 20 is a flowchart showing a program on the adjuster side for creating the photometric correction data, which is a part of the AE adjustment, in the flash memory 1.

FIG. 21 is a diagram showing an example of an address map of the flash memory 1 when the program “specific block writing” is not stored in the microcomputer 11c or the ROM 2.

FIG. 22 is a diagram showing a method of substituting the RAM 5 with hardware in the microcomputer 11.

FIG. 23: The data in the flash memory 1 is once stored in the RAM 5
It is a figure which shows the method which moves to RAM and uses the data on RAM5 as correction data.

FIG. 24 is a diagram showing a method of writing 00H (a) at a predetermined address of the flash memory 1 before adjustment and writing A5H (b) after adjustment.

FIG. 25 is a diagram showing a method of rewriting a program before and after adjustment.

FIG. 26 is a flowchart showing a program of the program transfer device.

FIG. 27 is a flowchart of an adjustment value writing device that writes the correction data, which has been totaled on the RAM 5 or online, into the flash memory 1 after the adjustment is completed.

FIG. 28 is a flow chart showing a program on the program transfer device side, which upgrades the program when a bug is found in the program.

[Explanation of symbols]

1 ... Flash memory, 2 ... ROM, 3 ... I / O circuit,
4 ... Write controller, 5 ... RAM, 6 ... CPU, 7
... initialization section, 8 ... address bus, 9 ... data bus, 10 ... selector section, 11 ... microcomputer,
12 ... AF circuit, 13 ... AE circuit, 14 ... Flash memory writing control terminal, 15 ... External communication connector, 16
... Strobe, 17 ... Motor driver, 18 ... Power switch, 19 ... Program transfer device, 21 ... 1st release switch, 22 ... 2nd release switch.

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[Procedure amendment]

[Submission date] January 18, 1994

[Procedure Amendment 1]

[Document name to be amended] Statement

[Correction target item name] 0047

[Correction method] Change

[Correction content]

Further, FIG. 16 is a flowchart showing the program writing operation of the control section 42.
16 (a) is a flowchart showing a sequence for loading only the subroutine "specific block rewrite", after mounting the microcontrollers in the camera in this case, FIG. 14
The program for camera control is written in the flash memory 1 by the method shown in (steps S801 to 803). Then, FIG. 16B is a flowchart showing a sequence in the case where the camera control program is also written in advance. In this case, since the program does not need to be written in the flash memory 1 after the microcomputer 11 is mounted on the camera, the program transfer in the first step shown in FIG. 12 is omitted (steps S811 to 813).

[Procedure Amendment 2]

[Document name to be amended] Statement

[Correction target item name] 0054

[Correction method] Change

[Correction content]

In the figure, the error between the value measured at the reference brightness and the standard value is recorded in the nonvolatile memory 70 (flash memory).
The value measured during the use of the camera is corrected to a normal photometric value based on the error value (correction value) in the subroutine "AE calculation" shown in FIG.

[Procedure 3]

[Document name to be corrected] Drawing

[Name of item to be corrected] Figure 3

[Correction method] Change

[Correction content]

[Figure 3]

[Procedure amendment 4]

[Document name to be corrected] Drawing

[Name of item to be corrected] Figure 5

[Correction method] Change

[Correction content]

[Figure 5]

[Procedure Amendment 5]

[Document name to be corrected] Drawing

[Correction target item name] Fig. 16

[Correction method] Change

[Correction content]

FIG. 16

Claims (1)

[Claims] 1. In a system incorporating a one-chip microcomputer, the one-chip microcomputer includes a nonvolatile memory in which data can be erased and written for each block, and a program stored in a part of the nonvolatile memory. Control means for executing a control operation according to data, and data rewriting means for writing a control program for rewriting data stored in the non-volatile memory under program control before the one-chip microcomputer is incorporated in the system. A system for incorporating a one-chip microcomputer, characterized in that after the one-chip microcomputer is incorporated, a data writing operation is performed in the nonvolatile memory using the data rewriting means.