JPH06326885A - Scanning speed modulation circuit for television receiver - Google Patents

Abstract

PURPOSE:To emphasize a contour of slant line portions of a displayed picture similarly to a contour of a longitudinal line portion. CONSTITUTION:The circuit is provided with a delay line memory 15(17) delaying a luminance signal Yn+1 for one horizontal scanning period (two horizontal scanning periods), a subtractor 18(19) subtracting a luminance signal Yn(Yn+1) from a luminance signal Yn+1(Yn), an absolute value processing section 20(21) obtaining an absolute value of an output signal from the subtractor 18(19), an adder 22 adding an output signal of the absolute value processing section 21 and an output signal of the absolute value processing section 20, and an integration device 27 integrating the output signal of the adder 22 and a signal DELTAYn based on the luminance signal Yn.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a scanning speed modulation circuit for a television receiver capable of improving the quality of a display image.

[0002]

2. Description of the Related Art In a television receiver, the horizontal scanning speed of an electron beam projected on the screen of a cathode ray tube is changed at the time when the luminance signal suddenly changes in order to enhance the image quality by enhancing the contour of the displayed image. ing. FIG. 3 is a schematic configuration diagram showing a configuration of a scanning speed modulation circuit of a conventional television receiver for emphasizing the contour of a display image in this way.

A brightness signal Y for controlling the brightness of an image is input to a differentiating circuit 1, and a pulse voltage 11 output from the differentiating circuit 1 is input to an amplifier 2. The inverted pulse voltage 12 inverted and amplified by the amplifier 2 is given to the scanning velocity modulation coil 4 arranged on the rear side of the neck of the CRT 5 via the capacitor 3 that blocks the direct current component. A horizontal deflection coil 8 in a deflection yoke is arranged on the front side of the neck of the CRT 5. The electron beam 7 emitted from the cathode 6 of the CRT 5
Is projected on the screen 9 of the CRT 5.

Next, the operation of the scanning speed modulation circuit of the television receiver will be described with reference to FIG. 4 showing the voltage waveforms of the respective parts. In FIG. 4, the vertical axis represents voltage and the horizontal axis represents time. Now, when the luminance signal Y shown in FIG. 4 (a) is input to the differentiating circuit 1, the differentiating circuit 1 differentiates the luminance signal Y, and the differentiating circuit 1 changes the amount of the luminance signal shown in FIG. 4 (b).
The pulse voltage 11 corresponding to (horizontal edge) is output. This pulse voltage 11 is input to the amplifier 2, inverted and amplified,
The amplified inversion pulse voltage 12 shown in FIG. 4C is supplied to the scanning velocity modulation coil 4 via the capacitor 3.

That is, the scanning speed modulation voltage V shown in FIG. 4 (d) is applied to the scanning speed modulation coil 4 when the luminance signal Y suddenly changes.
_{When SM} is given, a current flows and a magnetic field is generated. By the way, the electron beam 7 emitted from the cathode 6
Is deflected in the horizontal direction by the magnetic field generated by the horizontal deflection coil 8, the position of the electron beam 7 projected on the screen 9 of the CRT 5 is determined, and the change of the magnetic field according to the current change of the horizontal deflection coil 8 is determined. As a result, the electron beam 7 is horizontally scanned, and the electron beam 7 is generated by the magnetic field generated by the scanning velocity modulation voltage flowing in the scanning velocity modulation coil 4 as described above while the electron beam 7 is being horizontally deflected.
The horizontal scanning speed of is varied.

Specifically, on the white portion W side of the luminance signal Y, the magnetic field generated in the scanning velocity modulation coil 4 is controlled so that the horizontal scanning velocity becomes slower, and the white portion is emphasized more white. On the other hand, on the black portion B side of the luminance signal Y, the magnetic field generated by the scanning speed modulation coil 4 is controlled so that the horizontal scanning speed becomes faster, and the black portion is emphasized more black. Further, before and after the edge portion of the image at the time when the luminance signal suddenly changes, the scanning of the black portion is fast and the scanning of the white portion is slow, so the displayed image apparently seems to have a more abrupt change in luminance, Emphasize the outline of the image.

[0007]

As described above, the conventional scanning speed modulation circuit generates the scanning speed modulation voltage to be supplied to the scanning speed modulation coil based on the signal obtained by differentiating the luminance signal. Therefore, when the luminance signal and the chrominance signal are separated in the preceding stage of the circuit that differentiates the luminance signal, the luminance signal is differentiated when the rising and falling slopes of the voltage of the luminance signal are gentle. The resulting signal becomes smaller and the scanning speed modulation voltage decreases.

By the way, since the luminance signal for displaying the diagonal line portion of the image is obtained by using, for example, a comb filter, the rising and falling slopes of the voltage of the luminance signal are gentle. Therefore, with respect to the diagonal line portion of the image, the contour of the image cannot be emphasized as in the vertical line portion. SUMMARY OF THE INVENTION In view of the above problems, it is an object of the present invention to provide a horizontal scanning speed modulation circuit for a television receiver capable of enhancing the contour of an image even in the diagonal line portion of the image as in the vertical line portion.

[0009]

A scanning speed modulation circuit for a television receiver according to the present invention includes a first delay element for delaying a luminance signal for one horizontal scanning period, and a luminance output from the first delay element. A second delay element that delays the signal for one horizontal scanning period; a first subtraction unit that subtracts the luminance signal to be delayed by the first delay element from the luminance signal delayed by the first delay element; Second subtraction means for subtracting the luminance signal to be delayed by the second delay element from the luminance signal delayed by the second delay element, and first absolute value processing for obtaining the absolute value of the output signal of the first subtraction means Means, second absolute value processing means for obtaining the absolute value of the output signal of the second subtraction means, and addition for adding the output signal of the first absolute value processing means and the output signal of the second absolute value processing means. Means and a luminance signal delayed by the first delay element Configure a integrator for integrating an output signal of the associated signal and said adding means.

[0010]

The brightness of the image is controlled by the brightness signal delayed by one horizontal scanning period by the first delay element. From the luminance signal delayed by the first delay element, the luminance signal to be delayed by the first delay element is subtracted by the first subtraction means, and the absolute value is obtained to obtain the vertical edge of the image after one horizontal scanning period. To detect. The luminance signal delayed by the second delay element and the luminance signal to be delayed by the second delay element are subtracted by the second subtraction means,
By obtaining the absolute value, the vertical edge of the image one horizontal scanning period before is detected. The absolute value of the output signal of the first subtraction unit and the absolute value of the output signal of the second subtraction unit are added by the addition unit to detect the vertical edge and the horizontal edge of the image in the diagonal line portion of the image. The horizontal edge of the image in the vertical line portion of the image is detected based on the luminance signal of the display image. A signal obtained by detecting a vertical edge and a horizontal edge in an oblique line portion of the image and a signal obtained by detecting a horizontal edge of the image in a vertical line portion of the image are integrated by an integrating means, and scanning is performed based on the integrated signal. Generate a velocity modulation voltage. As a result, the scanning speed modulation current can be reliably supplied to the scanning speed modulation coil when the luminance signal in the diagonal line portion of the image suddenly changes, and the contour of the image in the diagonal line portion of the image can be emphasized.

[0011]

The present invention will be described in detail below with reference to the drawings showing the embodiments thereof. FIG. 1 is a block diagram showing the configuration of a scanning speed modulation circuit of a television receiver according to the present invention. The brightness signal Y for controlling the brightness of the image is an analog / digital converter 14
Luminance signal Y that is input to and converted from analog to digital
_{n + 1} is input to the delay line memory 15 which delays one horizontal scanning period and the negative terminal − of the subtracter 18 which detects the vertical edge of the image.

The luminance signal Y _n delayed by one horizontal scanning period in the delay line memory 15 is the positive terminal + of the first subtractor 18.
And the negative terminal of the second subtractor 19 for detecting the vertical edge of the image, and the horizontal edge of the image in the vertical line portion of the display image from the luminance signal Y _n output from the delay line memory 15. A delay circuit 25 for delaying a minute time, a positive terminal + of a subtractor 26 for detecting a horizontal edge of an image of a vertical line portion of the image from a luminance signal Y _n synchronized with a display image, and 1
Second delay line memory 17 for delaying the horizontal scanning period
And the digital / analog converter 16 are input. From the digital / analog converter 16, a digital / analog converted display image luminance signal is output. The luminance signal Y _{n-1 obtained} by delaying the luminance signal Y _n by one horizontal scanning period in the delay line memory 17 is input to the positive terminal + of the subtractor 19.

The brightness signal Y _n -Y _{n + 1, which} is the difference between the brightness signal Y _n and the brightness signal Y _{n + 1} subtracted by the subtractor 18, is input to the absolute value processing section 20. Luminance signal Y _n-1 subtracted by the subtractor 19
And the luminance signal Y _n−1 −Y _{n, which} is the difference between the luminance signal Y _n and the luminance signal Y _n , is input to the absolute value processing unit 21. Absolute value | Y _n −Y _n-1 | of the luminance signal output from the absolute value processing unit 20 and the absolute value processing unit
The absolute value | Y _n-1 −Y _n | of the luminance signal output from 21 is input to the adder 22. The absolute value | Y _n-1 −Y _n | + | Y _n −Y _n-1 | of the luminance signal added by the adder 22 is input to the attenuator 23 for performing a predetermined attenuation for the calculation described later. . The output signal of the attenuator 23 has a predetermined offset k
Is input to the adder 24 which gives The output signal of the adder 24 is input to the integrator 27. On the other hand, the luminance signal Y _n output from the delay circuit 25 is input to the negative terminal − of the subtractor 26.

A luminance signal ΔY _n which detects the horizontal edge of the image in the vertical line portion of the display image output from the subtractor 26.
Is input to the integrator 27. The integrator 27 displays the brightness signal ΔY _n
And the absolute value of the luminance signal | Y _n-1 −Y _n | + | Y _n −Y
_The luminance signal ΔY _n ′ obtained by integrating the luminance signals ΔY _n by integrating _n−1 | and is input to the digital / analog converter 28. The analog signal subjected to digital / analog conversion is input to the amplifier 2. The scanning speed modulation voltage V _{SM that} has been inverted and amplified and is output from the amplifier 2 is transferred via the capacitor 3 to
In the same manner as shown in FIG. 3, the scanning velocity modulation coil 4 is provided on the rear side of the neck portion of the CRT. A horizontal deflection coil is installed on the front side of the neck of the CRT.

FIG. 2 is a timing chart of signals at various parts. 2 (a) is output from the delay line memory 17,
The luminance signal Y _n-1 two horizontal scanning periods before the luminance signal Y, and FIG. 2B shows the luminance signal Y one horizontal scanning period before the luminance signal Y output from the delay line memory 15. ,
The luminance signal Y _n is synchronized with the luminance signal for display image. FIG. 2C shows a luminance signal Y _{n + 1} which is synchronized with the luminance signal Y input to the analog / digital converter 14 and is analog / digital converted by the analog / digital converter 14.

2A, 2B, and 2C, the waveform portion A is the luminance signal in the diagonal line portion of the image, and the waveform portion B is the luminance signal in the vertical line portion of the image. Figure 2
2 (e) is an edge detection signal | Y _n-1 −Y _n | obtained by converting the edge detection signal of the vertical edge of the image detected by the subtractor 19 into an absolute value by the absolute value processing unit 21, and FIG. ) Is the subtractor 18
An edge detection signal | Y _{n obtained} by converting the edge detection signal of the vertical edge of the image detected in
-Y _{n + 1} |.

FIG. 2 (f) shows an adder 22, which is an edge detection signal │Y _{n -1} -Y _n │ from the absolute value processing unit 21 and an absolute value processing unit 20.
Vertical edge detection signal | Y _n-1 -Y _n | + | Y _n -Y of the image obtained by adding the edge detection signal | Y _n -Y _n-1 |
_{n + 1} |. FIG. 2 (g) shows the horizontal edge detection signal ΔY _n of the image of the vertical line portion of the display image detected by the subtractor 26.
FIG. 2 (h) shows the edge detection signal ΔY _n ′ which is integrated by the integrator 27 and corrected so that the horizontal edge detection signal of the image in the diagonal line portion of the image becomes large. Figure 2 (i)
Is the scanning speed modulation voltage V _SM output from the amplifier 2. 2A to 2I are originally digital signals, but here, for convenience, they are shown as waveforms converted into analog quantities. The vertical axis represents voltage and the horizontal axis represents time.

Next, the operation of the scanning speed modulation circuit of the television receiver thus constructed will be described with reference to FIG. 2 which shows a timing chart of signals of respective parts. When the luminance signal Y is input to the analog / digital converter 14, analog / digital
The brightness signal Y is converted into a digital signal by the digital converter 14, and becomes the brightness signal Y _{n + 1} shown in FIG. 2 (c). The luminance signal Y _{n + 1} is delayed by the delay line memory 15 by 1H for one horizontal scanning period to become a luminance signal Y _n shown in FIG. 2B, and this luminance signal Y _n is digitalized by the digital / analog converter 16. / The analog-to-analog converted analog image display luminance signal is output.

The luminance signal Y _n delayed by one horizontal scanning period (1 line) in the delay line memory 15 is input to the delay line memory 17 and further delayed by one horizontal scanning period (1 line). The luminance signal Y _n-1 shown in 2 (a) is obtained. That is, the delay line memory 15 outputs the brightness signal Y _n one horizontal scanning period 1H before the brightness signal Y input to the analog / digital converter 14, and the delay line memory 17 outputs the brightness signal Y _n. The luminance signal Y _n-1 before two horizontal scanning periods (two lines) is output.

[0020] The luminance signal Y _{n + 1} output from the analog / digital converter 14, a luminance signal Y _n output from the delay line memory 15 is subtracted by the subtracter 18, difference between the two luminance signals Y _n −Y _{n + 1} is obtained and is input to the absolute value processing unit 20. The absolute value of the difference of the luminance signal | Y
_n −Y _n−1 | is obtained. As a result, the luminance signal | Y _n −Y _{n + 1} | shown in FIG.
Is a vertical edge detection signal for detecting the vertical edge of the image between the display image luminance signal Y _n and the luminance signal Y _{n + 1} after one horizontal scanning period.

Similarly, the luminance signal Y _n from the delay line memory 15 and the luminance signal Y _n-1 from the delay line memory 17
And are subtracted by the subtractor 19 to obtain the difference Y between the two luminance signals.
_n-1− Y _n is obtained and input to the absolute value processing unit 21 to obtain the absolute value. The output signal │Y _{n -1} -Y _n │ shown in FIG. 2 (d) of this absolute value processing unit 21 is the luminance signal Y _n for the display image and 1
The vertical edge detection signal is obtained by detecting the vertical edge of the image between the luminance signal Y _n-1 before the horizontal scanning period. Then, the luminance signal for the display image output from the absolute value processing units 20 and 21 and 1
The vertical edge detection signal between the luminance signal before the horizontal scanning period and the vertical edge detection signal between the luminance signal for display image and the luminance signal after one horizontal scanning period are added by the adder 22 and f) One vertical edge detection signal | Y _n-1 -Y
_{n | + | Y n -Y n} + 1 | and composed.

The vertical edge detection signal │Y _{n -1} -Y _n │ + │Y _n -Y _{n + 1} │ added by the adder 22 is added to the attenuator 23.
To the adder 24 after being attenuated by a predetermined amount. Here, a predetermined offset k is given by the adder 24 to a level suitable for the integrating operation of the integrator 27. On the other hand, the brightness signal Y _n output from the delay line memory 15 and synchronized with the display image brightness signal is slightly delayed in the delay circuit 25, and the delayed brightness signal Y _n and the undelayed brightness signal Y _n. 2 are input to the subtractor 26, and
The difference ΔY _n between the two luminance signals shown in (g) is obtained, and the horizontal edge of the image in the vertical line portion of the image is detected. This difference ΔY _n is input to the integrator 27, and the integrator 27 compares the horizontal edge detection signal ΔY _n output from the subtractor 26 with
Weighting integration is performed by the vertical edge detection signal output from the adder 24 and having the bias k applied thereto.

Specifically, in the diagonal line portion of the image in which the vertical edge is detected simultaneously with the horizontal edge, the edge detection amount is enhanced as compared with the vertical line portion of the image in which only the horizontal edge of the image is detected. Then, the horizontal edge detection signal ΔY _n ′ shown in FIG. 2 (h) is obtained, and the horizontal of the diagonal line portion of the image corresponding to the waveform A of the luminance signal Y _n shown in FIG. The horizontal edge detection signal ΔY _n ′ in which the edge is detected is further enhanced as compared with the waveform of the horizontal edge detection signal ΔY _n in which the horizontal edge of the vertical line portion of the image corresponding to the waveform B shown in FIG. 2B is detected. It

The output of the integrator 27 is digital / analog converted by the digital / analog converter 28, and the amplifier 2
After being amplified by, the scanning speed modulation voltage V _SM output from the amplifier 2 is supplied to the scanning speed modulation coil via the capacitor 3, and the scanning speed modulation current flows in the scanning speed modulation coil 4, so that the scanning speed modulation current is output from the amplifier 2. Scanning speed modulation voltage V
_{The SM} has a waveform obtained by further differentiating the signal input to the amplifier 2, and becomes the scanning speed modulation voltage V _SM shown in FIG. 2 (i). Then, the scanning speed of the electron beam is modulated by the magnetic field generated in the scanning speed modulation coil by the scanning speed modulation current.

As described above, since the brightness signal suddenly changes in the oblique line portion of the image is not detected by differentiating the brightness signal, the slope of the rising and falling edges of the voltage becomes gentle at the time when the brightness signal suddenly changes. However, a large scanning speed modulation voltage can be obtained, and the effect of the scanning speed modulation in the diagonal line portion can be enhanced. In this embodiment, the analog / digital converter 14 and the digital / analog converter are used.
Although 16 and 28 are used, the same effect can be obtained by using only analog signal processing without using them.

[0026]

As described in detail above, according to the present invention, even if the slope of the rise and fall of the voltage of the luminance signal at the time when the luminance signal suddenly changes is not affected, the display is not affected. The scanning velocity modulation in the diagonal line portion of the image can be enhanced. Therefore, the contour of the diagonal line portion of the display image becomes clear as in the vertical line portion, and the excellent effect of significantly improving the image quality of the entire display image is achieved.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a scanning speed modulation circuit of a television receiver according to the present invention.

FIG. 2 is a waveform diagram of each voltage in the scanning speed modulation circuit.

FIG. 3 is a block diagram showing a configuration of a scanning speed modulation circuit of a conventional television receiver.

FIG. 4 is a waveform diagram of voltages at various parts of the scanning speed modulation circuit.

[Explanation of symbols]

 4 Scan velocity modulation coil 15,17 Delay line memory 18,19 Subtractor 22 Adder 26 Delay circuit 27 Accumulator

Claims (1)

[Claims] 1. A television set in which a current is supplied to a scanning speed modulation coil for modulating the scanning speed of an electron beam projected on a screen of a cathode ray tube when a signal level of a brightness signal for controlling the brightness of an image suddenly changes. In a scanning speed modulation circuit of a John receiver, a first delay element that delays the luminance signal for one horizontal scanning period, and a second delay element that delays the luminance signal output from the first delay element for one horizontal scanning period. An element, first subtraction means for subtracting a luminance signal to be delayed by the first delay element from the luminance signal delayed by the first delay element, and a second subtraction means for delaying the luminance signal delayed by the second delay element Second subtraction means for subtracting the luminance signal to be delayed by the delay element, first absolute value processing means for obtaining the absolute value of the output signal of the first subtraction means, and output signal of the second subtraction means. Absolute value Second absolute value processing means to be obtained, addition means for adding the output signal of the first absolute value processing means and the output signal of the second absolute value processing means, and the luminance signal delayed by the first delay element Integrating means for integrating the relevant signal and the output signal of the adding means, and being configured to supply a current to the scanning velocity modulation coil in association with the output signal of the integrating means. Scanning speed modulation circuit of television receiver.