JP2567879B2 - Image vertical edge detection circuit - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a vertical edge detection circuit for television images, and more particularly to a vertical edge detection circuit used in a motion detection circuit for interlaced scanning television signals. .

(Summary of the Invention) The present invention relates to a circuit for detecting a vertical edge of an image from an interlaced scanning television signal, which accurately captures a vertical high frequency component of a still image of the image as a vertical edge signal, The circuit is configured so that the low-frequency component in the vertical direction is not detected as a vertical edge signal, and the detection accuracy of the vertical edge of the image is improved.

(Prior Art) Conventionally, in a motion detection circuit of an interlaced scanning television signal, a vertical edge detection circuit of an image has been used in order to improve its accuracy. (A), (c) As described in the illustrated configuration, the difference signal between the current signal and the signal before one field and ± 1/2 horizontal scanning period or the current signal and the signal before one horizontal scanning period The difference signal with the signal was used. For the motion detection using the vertical edge detection signal, refer to, for example, Japanese Patent Application Laid-Open No. 59-45770 "Adaptive Space-Time Interpolation Filter" filed by the present applicant.

(Problems to be Solved by the Invention) In the conventional example circuit shown in FIG. 4 (a), which will be described in detail later, in addition to the vertical high frequency component of the still image necessary for vertical edge detection, the vertical low frequency component of the moving image is also included. Has the drawback that it is falsely detected. On the other hand, in the conventional circuit shown in FIG. 4 (c), the above-mentioned erroneous detection does not occur. However, since this detects the vertical mid-range component of the image, the vertical high-range component is not detected and the vertical edge component is not detected. There is a drawback that the detection accuracy decreases.

Therefore, an object of the present invention is to solve the above-mentioned conventional problems and to provide a vertical edge detection circuit for an image capable of capturing only the vertical high frequency components of a still image necessary for vertical edge detection.

(Means for Solving the Problems) In order to achieve this object, a vertical edge detection circuit for an image of the present invention is a vertical edge detection circuit for an interlaced scanning television signal, which is at least between a current signal and a signal before a predetermined period. A circuit for generating an absolute value of the difference signal; and a circuit for outputting the minimum value between the absolute value of the generated difference signal and at least one signal obtained by delaying the absolute value in frame units, It is characterized in that the output minimum value is used as a vertical edge signal.

(Example) The present invention will be described in detail below with reference to the accompanying drawings.

FIG. 1 shows a block diagram of a configuration of an embodiment of the vertical edge detection circuit of the present invention.

One of the input signals is as shown Is input to This is a 262H (262 line) delay circuit if, for example, the input signal is a 525 2: 1 interlaced signal.

By the subtractor 3 and the absolute value circuit (ABS) 4, the output of ABS4 becomes the difference absolute value signal between the current line of the input signal and the line one line below on the screen. By the 1-line (H) delay circuit 2, the subtracter 5 and the absolute value circuit (ABS) 6, the output of the ABS 6 becomes a difference absolute value signal between the current line and the line immediately above on the screen. The output of ABS4 and the output of ABS6 are compared by the maximum value circuit (MAX) 7, and the one with the larger absolute value becomes the output of MAX7. This comparison is performed pixel by pixel. MAX7 is for setting the larger absolute difference value between the current line of the input signal and the upper and lower lines on the screen as the vertical edge amount, and this may be omitted in some embodiments. In the example where MAX7 is omitted, only ABS4 output or AB
Only the output of S6 is used and this is input to the subsequent circuit.

The output of MAX7 is input to the 1-frame (F) delay circuit 8 and the minimum value circuit (MIN) 10. MIN10 compares the current vertical edge amount, which is the output of MAX7, with the vertical edge amount in the previous frame, which is the output of F8, and outputs a smaller value for each pixel. If necessary, the output of F8 can be delayed in cascade as shown by the additional F9 and the dotted line, and the outputs of F9 and other frame delay circuits are input to MIN10, respectively. The output of MIN10 becomes the vertical edge signal of the detection circuit of the present invention.

FIG. 2 shows an example of a motion detection circuit incorporating the vertical edge detection circuit of the present invention.

In FIG. 2, the frame difference of the input signal is obtained by the frame difference circuit 11, and the absolute value circuit (ABS) 14 passes through the low-pass filter (LPF) 13 for noise suppression to obtain the absolute value signal x of the frame difference. Is required. Next, in the division circuit 15, the signal x is divided by the vertical edge signal y obtained by the vertical edge detection circuit 12 of the present invention. The output of the division circuit (x / y) 15 is judged in the judgment circuit 16 whether the image is moving or static based on a threshold value peculiar to the circuit, and a motion signal is output. This motion signal controls the operations of various motion adaptive signal processing circuits.

The need for the divider circuit (x / y) 15 in the configuration shown in FIG. 2 can be explained with reference to FIG. Fig. 3 (a), (b)
Two types of motion step signals with different level differences were prepared. In FIG. 3 (a), the solid line 21 is the step signal of the current frame, and the broken line 22 is the step signal of the moving previous frame. Therefore, the interval 23 is the frame difference in this case, and the interval 24 is one sample interval. In order for this frame difference 23 to be judged as motion, for example, the threshold value of the motion judgment circuit
Must be less than or equal to 23. On the other hand, in FIG. 3B, the solid line 25 is the step signal of the current frame, the broken line 26 is the step signal of the previous frame in motion, and the alternate long and short dash line 27 is a still image when the camera or the like has some phase jitter. Although the step signal of the generated jitter is used, it suffices that the threshold value of the motion determination circuit is larger than the frame difference 29 due to the jitter and smaller than the frame difference 28 due to the motion, but the threshold is smaller than the frame difference 13 shown in FIG. When the value is brought into FIG. 3 (b), the frame difference 29 due to the jitter exceeds the threshold value, and this part of the image is determined to be a moving part. This causes image quality deterioration in the motion adaptive signal processing circuit.

Therefore, if it is a horizontal edge, the difference between one sample is calculated as the horizontal edge amount, and if it is the vertical edge, the difference between one line is calculated as the vertical edge amount, and the frame difference is divided by this edge amount before the motion determination. If this is done, it is possible to correctly process the judgments of both FIGS. 3A and 3B with the same threshold value. In this case, the vertical edge amounts in FIGS. 3A and 3B are frame differences 23 and 28, respectively. For further details of these, refer to the above-mentioned JP-A-59-45770. Furthermore, in a device that controls the passband of the vertical spatial frequency by adapting to the motion, such as a scanning line number converter or a converter for interlaced progressive scan signals, division by this vertical edge has an important effect on image quality. It is clear.

4 (a) and 4 (c) show a configuration example of a conventional vertical edge detection circuit. The operation of the configuration example shown in FIG. 4 (a) is the same as that of the configuration shown in FIG. And the operation of the subtractor 3 and the ABS 4 are the same, and the operation of the configuration example shown in FIG. The configuration is the same as that shown in FIG. 4 (a) except that the difference between one lines is obtained instead of the difference. 4 (a), (c)
Components detected as the detection region, that is, the edge amount in the illustrated configuration example are shown in FIGS. 7B and 7D in the time-vertical (f-ν) region, respectively. In the figure, the input signal is 525.
Book, 60Hz, 2: 1 interlaced signal. Obtaining the edge amount is almost equivalent to obtaining the high frequency component of the spatial frequency because it requires the difference, but in FIG. 4 (b), the high frequency component on the ν axis is the detection region. Therefore, the vertical edge can be detected. However, if the signal being dealt with is an interlaced signal, a detection area also occurs in the vertical low frequency component of f = 15 Hz due to the principle of interlaced scanning, and the vertical low frequency component of the motion signal is erroneously detected as a vertical edge signal. It was happening.

On the other hand, in FIG. 4 (d), since the circuit of the configuration shown in FIG. 4 (c) is in-field signal processing, it has a constant characteristic in the time direction, and the problem of erroneous detection as shown in FIG. 4 (b) occurs. Although not present, the vertical midrange component is detected as the vertical edge amount. In a general image, the spatial frequency spectrum has a natural spread, so the circuit shown in FIG. 4 (c) is often sufficient for practical use. However, when the signal source such as a camera has an extremely high resolution, In some cases, vertical edges are difficult to detect in an electronically generated image, and image quality is degraded.

On the other hand, in the first configuration circuit according to the detection circuit of the present invention, since the same means as the configuration example shown in FIG. 4 (a) is used as the vertical edge detection means, it is possible to detect the high frequency component in the vertical direction. It is possible to prevent detection leaks. Furthermore, if an image with edges is moving, focusing on a specific pixel, even if a large value edge signal occurs in the current frame, the edge exists in another position on the screen in the past frame. Therefore, the value of the edge signal is small. Therefore, if the minimum value of the edge signals of a plurality of frames is obtained as in the first illustrated configuration, only the vertical edge signal of the still image portion is obtained, and erroneous detection can be prevented.

This will be described in more detail with reference to FIG. FIG. 5 shows an example of the output waveform in the circuit shown in FIG. In the figure, the horizontal axis represents the vertical position on the screen, and the vertical axis represents the waveform level at that position. The figure also shows a waveform in which a vertical edge image is moving at a constant speed in a fixed vertical direction. In this case, the vertical edge signal e ₀ (output of MAX7 in the first illustrated configuration) at frame zero and the vertical edge signal e ₋₁ (output of F8 in the first illustrated structure) in frame (−1) are shown in the fifth illustration. Since it comes to another position on the screen, the vertical edge signal does not appear as shown in the figure when the minimum value of the signals e ₀ and e _-1 is obtained. That is, the above-described erroneous detection of the vertical edge does not occur, and it is possible to avoid erroneously determining a moving image as a still image in the motion detection circuit having the second illustrated configuration. In the case of a still image, even if the signal has some phase jitter, the signals e ₀ and e _-1 appear at the overlapping position on the screen, so the minimum value is the same as in the circuit shown in FIG. 4 (a). Signal is obtained.

Next, FIG. 6 is a block diagram showing the construction of a 525-line interlaced scanning to progressive scanning converter according to the present invention. 263H41 and 262H42 in the figure are 263 line delay circuits,
It is a 262 line delay circuit, and x1 / 2 45 is a 1/2 coefficient unit. From 263H41 to x1 / 2 45, the current field signal u, the average value v of the front and rear field signals, the frame difference signal w
Is used as the input signal of another circuit. The moving picture filter 46 creates a moving picture interpolation signal M from the signal u. Further, the still picture filter 47 produces a still picture interpolation signal S from the signals u and v.
The signals S and M are switched by the motion signal z by the switch 48 for each pixel in accordance with the motion, and are combined with the signal u by the time axis conversion circuit 49 to be converted into a 525 line scanning signal. LPF50
From the determination circuit 53 to the motion detection circuit, the operation is the second
It is similar to that of the illustrated configuration. The 1-line (H) delay circuit 54 to the minimum value circuit (MIN) 61 are the vertical edge detection circuit according to the present invention, and the operation is the same as that of the first illustrated configuration.

The detection circuit of the present invention is, for example, 11 in addition to the circuit shown in FIG.
It can also be used for the motion detection circuit of other motion adaptive signal processing circuits such as 25 to 525 scanning line converters. Further, the present invention is not limited to motion detection and can be used for other television signal processing circuits such as vertical enhancer.

(Effects of the Invention) As described above, by using the vertical edge detection circuit of the present invention, a vertical edge signal can be accurately obtained from an interlaced scanning television signal, which was conventionally required for this vertical edge detection. It eliminates the disadvantages that the vertical low-pass component of the moving image is erroneously detected in addition to the vertical high-pass component of the still image, and the vertical middle-pass component of the image is detected, which lowers the detection accuracy.

[Brief description of drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the vertical edge detection circuit of the present invention, and FIG. 2 is a block diagram of a motion detection circuit incorporating the detection circuit of the present invention.
3 (a) and 3 (b) show examples of waveforms of signals to be subjected to motion detection, and FIGS. 4 (a) and 4 (b) show configuration examples of a conventional vertical edge detection circuit. FIG. 5 shows a diagram for explaining the operation, FIG. 5 shows an example of signal waveforms in the first circuit shown in FIG. 6, and FIG. 6 shows a 525-line progressive scan converter utilizing the present invention.
A configuration example is shown. 1,31 …… 2,35,54 …… 1 line (H) delay circuit 3,5,32,36,43,55,56 …… Subtractor 4,6,14,33,37,51,57,58 …… Absolute value Circuit (ABS) 7,59 …… Maximum value circuit (MAX) 8,9,60 …… Frame (F) delay circuit 10,61 …… Minimum value circuit (MIN) 11 …… Frame difference circuit, 12 …… Vertical Edge detection circuit 13,50 …… Low pass filter (LPF) 15 …… Division circuit (x / y), 16,53 …… Judgment circuit 41 …… 263 line (H) Delay circuit 42 …… 262 line (H) ) Delay circuit 44 …… Adder, 45 …… 1/2 coefficient unit 46 …… Movie filter, 47 …… Still image filter 48 …… Switch, 49 …… Time axis conversion circuit

Claims (4)

(57) [Claims] 1. A vertical edge detection circuit for an interlaced scanning television signal, which circuit generates at least an absolute value of a difference signal between a current signal and a signal before a predetermined period, and an absolute value of the generated difference signal. And delay it in frame units at least 1
And a circuit for outputting a minimum value between the two signals, and the output minimum value is used as a vertical edge signal. 2. A vertical edge detection circuit for an image according to claim 1, wherein the predetermined period is a sum of one feel period and a half horizontal scanning period. 3. A vertical edge detecting circuit for an image according to claim 1, wherein the predetermined period is a period which is a difference between one field period and 1/2 horizontal scanning period. 4. The detection circuit according to claim 1, wherein the absolute value of the generated difference signal is a period of the sum of the signal of the current line, 1 field period and 1/2 horizontal scanning period. Of the absolute value of the difference signal between the previous signal and the absolute value of the difference signal between the signal of the current line and the signal before the difference of 1 field period and 1/2 horizontal scanning period, the larger absolute value An image vertical edge detection circuit characterized by a value.