JPH06318909A - Burst signal receiving circuit - Google Patents

Abstract

PURPOSE:To shorten a preamble length from the viewpoint of transmission efficiency by identifying and reproducing a burst signal with a different amplitude for each ONU(optical network unit) provided with a DC component in the burst transmission system of a PDS (passive double star) system or the like and completing a transient state caused by unipolar/bipolar conversion during a preamble period. CONSTITUTION:The average DC component of a burst signal (b) is detected by a low-pass filter 3 during the preamble period. A detected voltage (c) is held by a sample/hold circuit 4 during a burst period. By calculating difference between the received burst signal (b) and a held voltage (d) while using a differential amplifier 6, a signal (e) canceled the DC component is outputted. A comparator 7 identifies '1' and '0' at the waveform center position of the signal (e). A control circuit 5 outputs a sample command (g) to the sample/hold circuit 4.

Description

Detailed Description of the Invention

[0001]

The present invention relates to a PDS (Passive Doub)
The present invention relates to a receiver circuit in a burst multiplex transmission system such as the le Star) system, and more particularly to a burst signal receiver circuit for discriminating information from a burst signal.

[0002]

2. Description of the Related Art The PDS transmission system shown in FIG. 10 is one system that constitutes an optical subscriber system, and is an SLT (Su
A multiplexing node such as a star coupler is provided on the way from a bscriber line terminal) to an ONU (Optical Network Unit) installed in the subscriber's house, and a plurality of ONUs and SLTs are connected. A plurality of ONUs share the same optical fiber between the SLT and the multiplexing node. SL as shown in FIG.
The signal from T to ONU is transmitted in a broadcast form as a time division multiplexed signal.

On the other hand, a burst signal is transmitted from the ONU to the SLT, and at the SLT receiving point, the burst signals from a plurality of ONUs are aligned so as not to overlap each other. Therefore, the ONU controls and transmits its own burst transmission timing so as not to collide with burst signals from other ONUs at the SLT reception point. In addition, a preamble as shown in FIG. 11 is added to the signal from the ONU to the SLT to identify the start position of the burst. Further, in order to prevent collision of each burst, in addition to control of burst transmission timing, a guard time is provided. Has been.

Since the PDS transmission system is a transmission system using light, signal transmission from the ONU and SLT is performed by the LD (La
ser diode) and the like. From the viewpoint of transmission efficiency, the transmission code is a scrambled NRZ.
The sign is used. On the other hand, on the receiving side (SLT), PD
A light receiving element such as a (Photo Diode) converts light to electricity to obtain an electric signal, and an amplifier amplifies it to a level required for subsequent processing. At present, between the optical element and the amplifier, there is no choice but to couple them with a capacitor, because the DC drift of the light receiving element is large, and if they are directly connected, the operating point of the amplifier exceeds the allowable range. Therefore, the zero potential point of the amplifier output waveform varies depending on the number of multiplexed burst signals and the amplitude.

[0005]

The received waveform at the SLT is as shown in FIG. 11, where the A section shows the case where the distance to the ONU is short, and the B section shows the case where the distance to the ONU is long.
In order to identify 1,0 information from this signal waveform, the average DC component of each burst is detected from the DC blocked unipolar burst signal (Fig. 11) and added to the received burst signal to add the bipolar burst. It needs to be converted to a signal. The reason is that the difference in the amplitude of each burst signal is 30 dB to 40 dB depending on the distance to the ONU, and if the direct current cut unipolar signal is to be processed,
The dynamic range of the amplifier used must be extremely wide. For example, if the minimum level signal is amplified to 1V, the maximum level signal becomes 30 to 100V, and 30 to 100V is also required as the saturation point of the amplifier. If saturation occurs in the amplifier, the minimum level signal disappears with a limiter applied (Fig. 12).
(A)).

On the other hand, if the signal can be converted into a bipolar signal, it is sufficient that the minimum level signal can be output as the saturation point of the amplifier. The signal of maximum level is naturally subject to large amplitude limitation, but the information near the zero crossing of the waveform is not lost, so
There is no problem in identifying information of 1, 0 (FIG. 12 (b)).
The transient state caused by this unipolar / bipolar conversion must be completed during the preamble period, and high-speed rising characteristics are required. The preamble length should be as short as possible from the viewpoint of transmission efficiency, and usually 2-3.
Bytes are allocated, and if the transmission rate is 156 Mbit / s, 100 ns to 150 ns is the preamble period.
The present invention has been made in view of such circumstances, and an object of the present invention is to provide a burst signal receiving circuit that enables identification reproduction of burst signals having different amplitudes for each ONU.

[0007]

In order to solve the above-mentioned problems, the burst signal receiving circuit of the present invention comprises:
In the invention, the average DC component of each burst is detected by the low-pass filter during the preamble period, the voltage is held by the sample hold circuit during the burst period, and the difference between the received burst signal and the held voltage is detected by the differential amplifier. By doing so, the DC component is canceled and 1,0 is identified at the center position of the waveform. Further, in the invention of claim 2, a time constant circuit for selectively detecting and holding the average DC component of each burst is provided, and the difference between the received burst signal and the detected and held voltage is taken by the differential amplifier. Cancels the DC component by
Identify 1, 0 at the center of the waveform.

[0008]

According to the burst signal receiving circuit configured as described above, it is possible to cancel the DC component and discriminate at the center position of the waveform in a short time, and to shorten the preamble length added to the burst signal.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. (First Embodiment) The first embodiment is an embodiment of the invention of claim 1. 1 is a block diagram, FIG. 2 is a time chart of each point in FIG. 1, and FIG. 3 is an enlarged view of a portion S in FIG. The NRZ burst signal a, which is the output of the optical receiver 1, is blocked by the capacitor 2 for direct current and becomes a signal b. The signal b is input to the low pass filter 3 and the average DC voltage c for each burst is obtained from the output thereof. As shown in FIGS. 2 and 3, the average DC voltage c has a waveform that fluctuates around a voltage of 1/2 of the burst amplitude depending on the continuity of the transmitted code "0" or "1"("0"). , And the occurrence probabilities of "1" are equal). If the preamble provided at the beginning of the burst has an alternating pattern of "0" and "1" as shown in FIG. 3, the average DC voltage c obtained during the preamble period is almost constant. This voltage is applied to the sample and hold circuit 4
, And the voltage d held for one burst period is taken out from the output.

The control of the sample-hold circuit 4 is performed by the output g of the control circuit 5, that is, the sample state is controlled from the head of the preamble, and the control is shifted to the hold state during the preamble. In order to perform such control, it is necessary to know the start position of the burst.
In LT, it is basically necessary to align bursts from a plurality of ONUs at SLT reception points, and the start position of the burst is given as timing information from the system,
Based on this, the control circuit 5 generates the control signal g for the sample hold.

The holding voltage d and the signal b are applied to the respective input terminals of the differential amplifier 6, and a signal e in which the DC component is erased is obtained at the output. The NRZ signal input to the burst receiving circuit is a unipolar signal, whereas the signal e is converted into a bipolar signal. The signal e is applied to the comparator 7 and the judgment is made at the center position of the waveform of the signal e,
The transmitted information "1" and "0" f can be restored. Further, according to this method, it is possible to discriminate between "1" and "0" regardless of whether the burst amplitude is large or small. Further, the information f is input to the flip-flop circuit 8 and synchronized with the reproduction clock j reproduced from the burst reception signal.

(Second Embodiment) The second embodiment is an embodiment of the invention of claim 2. 4 is a block diagram, and FIG. 5 is
4 is a time chart of each point in FIG. 4, and FIG. 6 is an enlarged view of portion S in FIG. The NRZ burst signal a, which is the output of the optical receiver 1, is cut off from the direct current by the capacitor 2 and becomes the signal b via the buffer amplifier 9. The signal b is the first switch circuit 1
Time constant circuit 1 provided for each burst via 0
Connected to 1. The time constant of each time constant circuit 11 is held until the next burst addressed to itself is input, and the time constant circuit 11 is maintained even if there are consecutive "1" or "0" appearing in the transmission code. Set a sufficiently long time constant so that the output voltage does not change.

The operation will be described in more detail.
The time constant circuit 11 is configured by the resistor 11a and the capacitor 11b provided between the switch circuit 10 and the second switch circuit 12, and is selectively connected by the first switch circuit 10 and the second switch circuit 12. In the state, the operation has the same time constant of charge and discharge, and when the occurrence probabilities of "1" and "0" are equal, a DC voltage of 1/2 of the burst amplitude is output as a signal d from the output of the second switch circuit 12. can get. In the state where the switch circuits 10 and 12 are not selected, the discharge path of the capacitor 11b disappears, so that the previous voltage is maintained.

The first switch circuit 10 and the second switch circuit 12 are controlled by the output g of the control circuit 5, that is, the first switch circuit 10 and the second switch circuit 12 are synchronized with the start position of the guard time. Switch at the same time. The leading position of the guard time is given as timing information from the system as in the first embodiment, and the control signal g for the first switch circuit 10 and the second switch circuit 12 is controlled based on this timing information. It is generated by the circuit 5. The holding voltage d and the signal b are applied to the respective input terminals of the differential amplifier 6, and the signal e in which the DC component is erased is obtained at the output. NR input to burst receiving circuit
The Z signal is a unipolar signal, whereas the signal e is converted to a bipolar signal.

The signal e is applied to the comparator 7 and the judgment is made at the center position of the waveform of the signal e, whereby the transmitted information "1" or "0" f can be restored. Further, according to this method, it is possible to discriminate between "1" and "0" regardless of whether the burst amplitude is large or small. Further, the information f is input to the flip-flop circuit 8 and synchronized with the reproduction clock j reproduced from the burst reception signal.

(Burst Clock Reproducing Circuit) An embodiment of the burst clock regenerating circuit for regenerating the reproduced clock j used in the first and second embodiments will be described. FIG. 7 is a block diagram, and FIG. 8 is a time chart showing the waveform of each point in FIG. The NRZ burst signal a, which is the output of the optical receiver 1, is blocked by the capacitor 2 for direct current and becomes a signal b. The signal b is input to the phase circuit 23, and the signal c whose phase is shifted by a predetermined amount is obtained from the output. The differential amplifier 24 receives the signal b and the signal c at its respective inputs, and takes out the bipolar signals d and e from which the DC components have been canceled out. The signal d is a positive phase output, and the signal e is a negative phase output. The signal d is the positive phase input of the first comparator 25 and the second comparator 2
The signal e is connected to the negative phase input of the first comparator 25 and the positive phase input of the second comparator 26.

As a result, a signal f identifying the positive polarity pulse in the signal d appears at the output of the first comparator 25, and a signal identifying the negative polarity pulse in the signal d at the output of the second comparator 26. g appears. The signal g and the signal f are input to the OR circuit 27, respectively, and the signals g and f are output from the outputs thereof.
The double frequency signal h obtained by combining is extracted. Since the signal h is in a state where the pulse is interrupted when "0" or "1" is continuous as transmission information, it cannot be used as a reproduction clock as it is. Then, the signal h is input to the tank circuit 28, and a continuous clock frequency signal i is obtained from the output thereof. The clock frequency signal i is output to the third comparator 29 at a predetermined level, for example, the signal j at the TTL level.
To

(Burst Signal Detection Circuit) As described above, the head position of the preamble or guard time for operating the control circuit 5 is given as timing information from the system. However, prior to full-scale operation when the ONU is installed, a short burst length “measurement burst” is sent from the ONU to measure the transmission line delay time. In this case, it is uncertain at which position on the time slot the "measurement burst" appears, and the burst head position must be detected by some method. An embodiment of the burst signal detection circuit that detects the start position of the burst will be described below. FIG. 9A is a block diagram showing an embodiment of the burst signal detection circuit, and FIG.
3 is a time chart showing the waveform of each point. Optical receiver 1
The NRZ burst signal a, which is the output of, is cut off from the direct current by the capacitor 2 and becomes the signal b. The signal b is input to the phase circuit 33, and a signal c whose phase has shifted by a predetermined amount is obtained from the output. The differential amplifier 34 receives the signal b and the signal c at its inputs, and the burst signal d in which the DC component is canceled is taken out from the output. The counter circuit 38 outputs the signal d
Is operated as a count input, and the output signal k from the counter circuit 38 is set to a high level when a predetermined number of counts are completed. FIG. 9B shows an example in which four positive pulse pulses of the signal d are counted and detected. The counter circuit 38 is reset by the burst signal end signal detected by another means (not shown). The output signal h of the OR circuit 27 of the burst clock recovery circuit
Even if is counted, the start position of the burst can be detected. The burst detection signal k detected in this way is input to the control circuit 5 to operate the sample hold circuit 4 or the switch circuits 10 and 12.

[0020]

As described above, according to the first aspect of the invention, the average DC component is detected by the low-pass filter, and the difference component between the average DC component and the input burst signal is extracted by the differential amplifier. I was able to get. As a result, DC regeneration can be performed, and at the same time, the identification threshold value can be fixed at one point, and the circuit can be simplified. Also, since the circuit can be configured as a feed-forward configuration, it is possible to shorten the time from the arrival of the burst to the steady state, and as a result, the guard time length and preamble length can be shortened, and the transmission efficiency can be shortened. It has become possible to improve.

According to the second aspect of the invention, a time constant circuit is provided for each of the multiplexed bursts to detect the average DC component. As a result, one time constant circuit always operates to detect the average DC component of one burst, so the transient state that occurs in the time constant circuit when a burst arrives replenishes the slight charge lost between bursts. Only. As a result, in addition to the effect of the first aspect, it becomes possible to apply to a burst signal transmission of higher speed, shorter guard time length, shorter preamble length.

[Brief description of drawings]

FIG. 1 is a block diagram showing a first embodiment of the present invention.

FIG. 2 is a time chart showing the waveform of each point in FIG.

FIG. 3 is an enlarged view of a portion S in FIG.

FIG. 4 is a block diagram showing a second embodiment of the present invention.

5 is a time chart showing waveforms at respective points in FIG.

FIG. 6 is an enlarged view of a portion S in FIG.

FIG. 7 is a block diagram showing an embodiment of a burst clock recovery circuit.

FIG. 8 is a time chart showing waveforms at respective points in FIG.

9A is a block diagram showing an embodiment of a burst signal detection circuit, and FIG. 9B is a time chart showing waveforms at respective points in FIG.

FIG. 10 is a block diagram showing an outline of a PDS system.

FIG. 11 is a waveform diagram of a received burst signal which is an output of a PDS optical receiver.

FIG. 12A shows an operation example of amplification of a unipolar burst signal, and FIG. 12B shows an operation example of amplification of a bipolar burst signal.

[Explanation of Codes] 3 Low pass filter. 4 Ampoule hold circuit. 5 Control circuit. 6 Differential amplifier. 7 Comparator. 10 First switch circuit. 11 Time constant circuit. 12 Second switch circuit.

Claims (2)

[Claims] 1. A low pass filter (3) for receiving a burst multiplexed signal and detecting an average DC component of each burst, a sample hold circuit (4) connected to the output of the low pass filter, and the sample hold. A differential amplifier (6) which receives the output of the circuit and the burst multiplexed signal at its input terminals and outputs a burst signal in which the DC component is cancelled, and a differential amplifier (6) at a substantially central position of the output waveform of the differential amplifier. , 0, and a comparator (7) that outputs the sample command and a control circuit (5) that outputs a sample command to the sample hold circuit at the start position of each burst. 2. A plurality of time constant circuits (11) for receiving a burst multiplexed signal, detecting and holding an average DC component of each burst, and between the burst multiplexed signal and the plurality of time constant circuits. A first switch circuit (10) which is provided and selectively connects to the time constant circuit for each burst, and operates in synchronization with the first switch circuit to select the outputs of the plurality of time constant circuits. A second switch circuit (12) for outputting, and a differential amplifier (6) for receiving the output of the second switch circuit and the burst multiplexed signal at each input terminal and outputting a burst signal in which the DC component is canceled. ), A comparator (7) for judging 1 and 0 and outputting at approximately the center position of the output waveform of the differential amplifier, and the first switch circuit and the second switch circuit at the head position of each burst. A control circuit that outputs a switching command to (5)
A burst signal receiving circuit composed of and.