JPH06317616A - Estimating method for power consumption in digital circuit - Google Patents

Abstract

PURPOSE:To carry out high speed measurement by providing the first memory means to store the value of electric power consumed in a state defined for each element, and the second memory means to store the total value of electric power consumed in simulation time. CONSTITUTION:When simulation is started, a DC power consumption value register 204 is initialized on the total value of electric power in a DC power consumption value area 203 to all the elements in a circuit. When the processing of simulation time is started, an AC power consumption value register 202 is initialized. Next, at the present simulation time, the state of the element in the circuit is judged on the state of a nodal point in the circuit and the inner state of the element, and the processing is repeated to the element altered in its state. In the case of renewing the register 202, the power consumption value corresponding to the state of the element is read out of an AC power consumption value register 201, and added to the register 202. In the case of renewing the DC power consumption value, the read out value is subtracted from a register 204 corresponding to the state before alteration, and all the elements altered in their states are processed in this way.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power consumption estimation method for simulating the power consumption of a digital circuit such as an LSI.

[0002]

2. Description of the Related Art Conventionally, the method of obtaining the power consumption is to represent the circuit by a non-linear differential equation, obtain the voltage value of the node in the circuit and the current value of each element in detail by the circuit simulation to solve the equation, and multiply them. Or calculate the power consumption by dividing the circuit to be simulated into several blocks, predict the operating frequency of each block by logic simulation or manually, and calculate the frequency and the average power consumption per gate frequency of each block. , It was calculated from the number of gates.

[0003]

However, in the above-described conventional simulation method, the circuit simulation has a very long execution time, and it is extremely difficult to simulate a large-scale circuit within a realistic time. is there.

When the operating frequency is predicted and obtained,
There has been a problem that the power consumption cannot be accurately obtained when the operation cycle is significantly different in each part of the circuit or when the power consumption value changes depending on the test vector.

In view of the above-mentioned problems, the present invention estimates the power consumption at high speed even when the operating frequency is different in each part of the circuit or the power consumption value changes depending on the test vector. The purpose is to provide a method.

[0006]

Means for Solving the Problems To achieve the above object, the means of the invention according to claim 1 of the present invention is to first define the state of each element in a circuit, and then define the element state. A power consumption estimation method including a first storage means for storing a power value consumed according to the state of and a second storage means for storing a total value of power consumed in a constant simulation time. There is.

Then, the first step of initializing the second storage means, and the elements corresponding to the states of the elements stored in the first storage means for all the elements whose states have changed A second step of adding the power consumption value of the second storage means to the second storage means, and a third step of outputting the power consumption value of the second storage means at the end of the processing in a fixed simulation time. The configuration is performed in order.

Further, the means taken by the invention according to claim 2 defines a state of each element in the circuit, and third storage means for storing a power consumption value corresponding to the state of the element. , A fourth storage means for storing the power value consumed at the current simulation time and a power consumption estimation method.

Then, a fourth step of judging the states of the elements in the circuit at the current simulation time,
For all the elements of which the state has changed in the fourth step, the power consumption value of the element stored in the third storage means corresponds to the state before the change of the state of the element. A fifth step of subtracting the power value from the fourth storage means and adding the power value of the element corresponding to the state after the change of the state of the element to the fourth storage means, and a current simulation A sixth step of outputting the power consumption value of the fourth storage means at the end of processing at time is sequentially performed.

[0010]

With the above construction, in the invention according to claim 1,
First, before the simulation is executed, the states that the element can take are defined for each element in the circuit, and the power value consumed by the state of the element is stored in the first storage means in advance, while the constant simulation time At the start of the simulation process, the second storage means for storing the total value of the power consumption values is initialized by the first step. Then, the simulation time is set, the states of the elements in the circuit at the current simulation time are determined, and all the elements whose states have changed at the simulation time by the second step are stored in the first storage means. The power consumption value corresponding to the state of the element is added to the second storage means. Then, at the end of this addition process in a fixed simulation time, the power consumed in the fixed simulation time stored in the second storage means in the storage means such as a file or the display means such as a screen by the third step. Output the value. By the above processing, the power value consumed when the state of the element in the circuit changes can be obtained.

Here, the power value is a value for each element in the circuit stored in the first storage means, and is used for an element whose state has changed when the circuit operates with a given test vector. And calculated accurately even if the operating frequency in each part of the circuit is different. The state of the element in this case can be defined by the state of the terminal of the element and the internal state of the element. Then, the states of the terminals of the element and the internal state of the element can be processed by a transistor level simulation or by a conventional logic simulation when the element in the circuit is a gate, so that the state of the element can be determined. The processing at each simulation time in this power consumption estimation method is realized at a high speed because it is realized by a simple calculation such as addition.

According to the second aspect of the invention, first, the state that each element in the circuit can take before the simulation is defined is defined, and the power value consumed when the element is in that state is set to the third value. Preliminarily stored in the storage means, the state of the element in the circuit at each simulation time is determined by the fourth step during the simulation, and by the fifth step, all the elements whose states have changed in the fourth step are detected. Then, the power value consumed by the element corresponding to the state before the change in the state of the element stored in the third storage means is subtracted from the fourth storage means, and The power value corresponding to the state is added to the fourth storage means. Then, at the end of the processing for all the elements whose states have changed at the current simulation time, the sixth step stores the current data stored in the fourth storage means in the storage means such as a file or the display means such as a screen. The power value that is constantly consumed at the simulation time is output. By repeating the above processing until the target simulation time, the power value that is constantly consumed depending on the state of the elements in the circuit is obtained at each time. The power consumption is obtained by integrating this value with respect to the simulation time in a constant time width.

Here, the power value is a value for each element in the circuit stored in the third storage means, and is used for an element whose state has changed when the circuit operates with a given test vector. And calculated accurately even if the operating frequency in each part of the circuit is different. The state of the element in this case can be defined by the state of the terminal of the element and the internal state of the element. Then, the states of the terminals of the element and the internal state of the element can be processed by a transistor level simulation or by a conventional logic simulation when the element in the circuit is a gate, so that the state of the element can be determined. The processing at each simulation time in this power consumption estimation method is realized at a high speed because it is realized by a simple calculation such as addition.

[0014]

Embodiments of the present invention will now be described in detail with reference to the drawings. In this embodiment, the power value consumed when the state of the element in the circuit obtained in claim 1 is changed is AC.
The power consumption, the power value that is constantly consumed when there is an element in claim 2, is called DC power consumption.

FIG. 1 is a processing flow chart at one simulation time in the power consumption estimation method of the present invention.
FIG. 6 is a diagram showing storage means in the power consumption estimation method of the present invention.

In FIG. 2, 201 is an AC power consumption value area which is the first storage means for storing the AC power consumption value consumed by the element for each element state, and 202 is the current simulation time. FIG. 6 is a diagram showing an AC power consumption value register that is a second storage unit that stores the total value of the AC power consumption values consumed in. And
Reference numeral 203 denotes a DC power consumption value area, which is a third storage unit that stores the DC power consumption value consumed by the element for each element state, and 204 indicates the DC power consumption consumed at the current simulation time. It is the figure which showed the DC power consumption value register which is the 4th memory | storage means which stores the total value of electric power value.

On the other hand, in FIG. 1, ST101 is a step of initializing the AC power consumption value register 202 to 0 (first step), and ST102 is a step of judging the state of the element in the circuit at the current simulation time (first step). 4 step), ST103 is a step of registering an element whose state in the circuit has changed in the element list, ST
104 is a step of judging whether or not an unprocessed element exists, ST 105 is a step of taking out an unprocessed element, ST
106 is A for the unprocessed element taken out in ST105
A step of adding the AC power consumption value of the corresponding element in the C power consumption value area 201 and the state of the corresponding element to the AC power consumption value register 202 and updating the AC power consumption value register 202 (second step), ST107. Is ST1
DC before the state change for the unprocessed element taken out in 05
The DC power consumption value of the corresponding element in the power consumption value area 203 and the state of the corresponding element is subtracted from the DC power consumption value register 204, and the corresponding element in the DC power consumption value area 203 after the state change and the corresponding DC of element state
The power consumption value is added to the DC power consumption value register 204 and D
Step of updating the C power consumption value register 204 (fifth
Step), ST108 is AC power consumption value register 2
The step of outputting the value of 02 to the file (fourth step), and ST109 is the step of outputting the value of the DC power consumption value register 204 to the file (sixth step).

Now, the calculation processing operation of the power consumption calculation in the embodiment shown in FIGS. 1 and 2 will be described. When the simulation up to the target simulation time starts,
First, for all the elements in the circuit, the DC power consumption value register 204 is initialized with the total value of the power values in the DC power consumption value area 203 corresponding to the initial state of each element according to the initial state of each node. To do. Next, the current simulation time is set to the minimum simulation time at which an event occurs for the test vector given to the circuit, and the processing at one simulation time is executed. When the processing at this one simulation time is started, first in step ST101, the AC power consumption value register 2
02 is initialized to 0. AC power consumption value register 20
2, the power value consumed at each simulation time is updated by addition, so initialization is performed at each simulation time, and the DC power consumption value register 204 holds the power value currently steadily consumed and updated by the difference. Therefore, initialization is performed only once at the start of the simulation process. Next, at the current simulation time, the state of the element in the circuit is determined by the state of the node in the circuit and the internal state of the element, and the processing from step ST104 to step ST107 is repeated for the element whose state has changed. Here, the AC power consumption value register 202 is updated in step ST106, and D is updated in step ST107.
The C power consumption value register 202 is updated. In updating the AC power consumption value register 202 in step ST106, the power consumption value corresponding to the state of the element is read from the AC power consumption value area 201, and the value is added to the AC power consumption value register 202. By performing this for all the elements whose state has changed, the power consumption value consumed by the element whose state has changed at that time is obtained in the AC power consumption value register 202. On the other hand, step ST
In updating the DC power consumption value of 107, the power consumption value corresponding to the state of the element is changed from the DC power consumption value register 204, and the power consumption value corresponding to the state of the element is changed to the DC power consumption. Add to value register 204. By performing this for all the elements whose states have changed, the power value that is constantly consumed depending on the state of the element at that time is the DC power consumption value register 204.
Can be obtained. When the processing is completed for all the elements whose states have changed at the current simulation time, in steps ST108 and ST109, the AC power consumption value register 202 and the DC power consumption value register 20, respectively.
The power value stored in 4 is output to a file. By repeating these processes until the target simulation time, the AC power consumption value and the DC power consumption value can be obtained.

In this embodiment, step ST10
In 8, ST109, the power value is output to the file, but a method of outputting the power value on the screen or the memory and leaving it may be used.

Next, the specific operation of the embodiment shown in FIGS. 1 and 2 will be described using a simple circuit example. 3 is a diagram showing a simple circuit example, FIG. 4 is a diagram showing an example of the AC power consumption value area of the circuit example, and FIG. 5 is a diagram showing an example of the DC power consumption value area.

In FIG. 3, 301 is a P channel MOSF.
ET element (M1), 302 is an N-channel MOSFET element (M2), and 303, 304, 307 are capacitive elements (C
1, C2, C3), 305 is a 2-input NAND gate element (NAND1), 306 is a resistance element (R1), A, B,
C and D are the nodes of the circuit.

Further, in FIG. 4, 401 is an AC power consumption value area which is the first storage means, 411 is a P-channel MOSFET element 301 (M1), 412 is an N-channel MOSFET element 302 (M2), 413 is a capacitance. Elements 303 (C1) and 414 are capacitive elements 304 (C2),
415 is a capacitive element 307 (C3), 416 is a 2-input NA
The ND gate elements 305 (NAND1) and 417 store the AC power consumption value for each possible state of the resistance element 306 (R1). In the AC power consumption value area 401, since the terminal 2 is connected to the logic 0 power supply in the AC power consumption value area 413 corresponding to the capacitive element 303 (C1), it is fixed to logic 0 and the state of terminal 1 is logic 1 The power consumption value when it changes to 8 is defined as 8, and the AC power consumption value area 4 corresponding to the capacitive element 304 (C2)
At 14 the state of terminal 1 changes to logic 1 and terminal 2
Is at logic 0 or the state of terminal 1 is at logic 1
Or when the state of terminal 2 changes to logic 0 or terminal 1
State changes to logic 1 and the state of terminal 2 changes to logic 0 and the state of terminal 1 changes to logic 0 and terminal 2
State is logic 1 or the state of terminal 1 is logic 0
When the state of terminal 2 changes to logic 1 or
Is defined to be 5 when the state of is changed to logic 0 and the state of the terminal 2 is changed to logic 1, and the AC power consumption value area 415 corresponding to the capacitive element 307 (C3) is defined.
In, the power consumption value is defined as 12 when the terminal 2 is connected to the logic 0 power supply and fixed to the logic 0 and the state of the terminal 1 changes to the logic 1. A corresponding to the 2-input NAND gate element 305 (NAND1)
In the C power consumption value area 416, regardless of the states of the terminals 1 and 2, the power consumption value when the state of the terminal 3 changes to logic 1 and the power consumption when the state of the terminal 3 changes to logic 0 The value is defined as 2.

In FIG. 5, 501 is a DC power consumption value area which is the third storage means, and 511 is a P channel M.
OSFET elements 301 (M1) and 512 are N-channel M
The OSFET elements 302 (M2) and 513 are capacitive elements 30.
3 (C1), 514 are capacitive elements 304 (C2), 515
Is a capacitive element 307 (C3), 516 is a 2-input NAND gate element 305 (NAND1), 517 is a resistive element 30
The DC power consumption value is stored for each possible state of each terminal of 6 (R1). The DC power consumption value area 501 is defined as 20 only when the state of the terminal 1 is logic 1 and the state of the terminal 2 is logic 0 in the DC power consumption value area 517 corresponding to the resistance element 306 (R1). .

FIG. 6 shows the state of each node and a power consumption calculation result when an appropriate test vector is given to this circuit.
At the simulation time 0 at the start of the simulation, first, the DC power consumption register 204 is calculated as the total power value in the DC power consumption value area 401 corresponding to the initial state of each element.
Is initialized. Here, the state of the terminal 1 of the element R1 is logic 1 and the state of the terminal 2 is 0 from the logic 1. Next, the current simulation time is set to simulation time 1, and the AC power consumption register 202 is initialized to 0. At the simulation time 1, the nodes A, C, D change, and the elements M1, M2 connected to the nodes A, C, D
The states of C1, C2, NAND1, R1, C3 change. The power consumption is calculated for these elements, and the AC power consumption value 0 of the elements M1, M2, and R1 is equal to that of the element C1.
Since the state of terminal 1 changes to logic 1 and the state of terminal 2 is logic 0, the AC power consumption value is 8, and in element C2, the state of terminal 1 changes to logic 1 and the state of terminal 2 changes to logic 1.
Therefore, the AC power consumption value is 0, the state of terminal 1 changes to logic 0 in C3, and the state of terminal 2 is logic 0, so the power consumption value is 0, and the state of terminal 3 in element NAND1 changes to logic 0. Since the power consumption value has changed, the power consumption value 2 is added to the AC power consumption value register 202, and the AC power consumption value is obtained as 10. Further, elements M1, M2, C1, C2, NA
The DC power consumption value 0 corresponding to the state before the change of these elements is subtracted from the DC power consumption register 204 with respect to ND1, the DC power consumption value 0 of the state after the change is added, and the element R1 is added. On the other hand, the state of the terminal 1 in the state before the change of R1 is the logic 1 from the DC power consumption value register 204.
The DC power consumption value 0 corresponding to the state of the terminal 2 corresponding to the logic 1 is subtracted, and the DC power consumption value 20 corresponding to the state of the terminal 1 after the change is the logic 1 and the state of the terminal 2 corresponds to the logic 0 is added. As a result, the DC power consumption value becomes 20. Similarly, at simulation time 2, the AC power consumption value is 1
8, DC power consumption value 0, A at simulation time 3
The C power consumption value is 0, the DC power consumption value is 0, and the AC power consumption value is 5 and the DC power consumption value is 0 at the simulation time 4.

In this embodiment, the power value is defined for each state of the terminals of each element or for each terminal whose state has changed. It is also possible to easily define and handle a power value for each changed terminal and internal state.

[0026]

As described above, according to the first aspect of the invention, the power value consumed by the state of each element in the circuit is stored in advance in the first storage means. , The state of each element of the circuit is determined, the power consumption value of each element defined in the first storage means is added to the second storage means for all the elements whose states have changed, and finally the second Since the value in the storage means is output, the power consumption value during a certain simulation time can be obtained. According to the second aspect of the present invention, for each element in the circuit, the power value constantly consumed by the element depending on the state of the element is stored in advance in the third storage means, The state is judged, the value in the fourth storage means is updated using the power consumption value defined in the third storage means for all the elements whose state has changed, and finally the fourth storage means. Since the medium value is output, the power value constantly consumed at the current simulation time can be obtained. The power consumption is obtained by integrating this value with respect to the simulation time in a constant time width.

Therefore, for any power consumption value, the power value consumed by the element in the circuit can be obtained by the change in the state of the element when the circuit operates with the given test vector. The power consumption value can be accurately calculated even if the operating frequency of the device is different. Further, since these processes can be realized by simple arithmetic operations such as addition and subtraction, it is possible to realize a power consumption estimation method which can be processed at high speed and can perform high-accuracy and high-speed power consumption calculation. .

[Brief description of drawings]

FIG. 1 is a process flow chart at one simulation time in an embodiment of a power consumption estimation method of the present invention.

FIG. 2 is a diagram showing an embodiment of a storage means of the power consumption estimation method of the present invention.

FIG. 3 is a circuit diagram showing a simple circuit example.

FIG. 4 is a diagram showing an example of an AC power consumption value area.

FIG. 5 is a diagram showing an example of a DC power consumption value area.

6 is a diagram showing a state of each node and a power consumption calculation result when an appropriate test vector is given to the circuit of FIG.

[Explanation of symbols]

101 First Step 102 Fourth Step 106 Second Step 107 Fifth Step 108 Third Step 109 Sixth Step 201, 401 AC Power Consumption Value Area (First Storage Means) 202 AC Power Consumption Value Register (second storage means) 203, 501 DC power consumption value area (third storage means) 204 DC power consumption value register (fourth storage means)

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Shunji Huga 1006 Kadoma, Kadoma City, Osaka Prefecture, Matsushita Electric Industrial Co., Ltd. (72) Yasuhiro Tanaka 1006 Kadoma, Kadoma City, Osaka Matsushita Electric Industrial Co., Ltd. 72) Inventor Shinichi Kumadai, 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd.

Claims (2)

[Claims] 1. A first storage means for storing, for each element in a circuit, a power value consumed by the state of the element, and a second memory for storing a total value of power consumed in a constant simulation time. A first step of initializing the second storage means, and a power value corresponding to the states of the elements stored in the first storage means for all the elements whose states have changed. Power of the digital circuit including a second step of adding the power consumption value of the second storage means to the second storage means, and a third step of outputting the power consumption value of the second storage means at the end of processing for a certain simulation time. How to estimate. 2. A third storage means for storing, for each element in the circuit, a power consumption value corresponding to the state of the element, and a fourth storage means for storing the power value consumed at the current simulation time. And a fourth step of determining the states of the elements in the circuit at the current simulation time, and storing all the elements whose states have changed in the fourth step in the third storage means. With the power consumption value of the element, the power value of the element corresponding to the state before the change of the state of the element is subtracted from the fourth storage means, and corresponds to the state after the change of the state of the element. A fifth step of adding the power value of the element to the fourth storage means and a sixth step of outputting the power consumption value of the fourth storage means at the end of the processing at the current simulation time are provided. Power consumption estimation method for digital circuits.