JPH06311192A - Digital demodulator - Google Patents

Abstract

PURPOSE:To attain miniaturization by reducing the circuit scale of a demodulator receiving and detecting a multi-phase modulated wave obtained by multiplexing transmission data by plural carrier waves. CONSTITUTION:A received input (i) is separated into the I and Q signals of the respective carrier waves by FFT 11 and an reverse FFT 12 generates a synthetic I and Q signals. Then, one equalizer 13 equalizes the received input by setting the I and Q signals resynthesized from demodulation data by reverse FFT 16 to be a reference signal. Thereby, equalization is attained by one equalizer without regard to the number of the carrier waves so as to reduce the circuit scale.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a quasi-coherent detection type demodulator used in a transmitter / receiver of a multi-carrier type modulation / demodulation system which is one of modulation / demodulation systems of digital radio communication.
In particular, it relates to a digital demodulator with an equalizer.

[0002]

2. Description of the Related Art First, a modulator on the transmission side will be described. FIG. 3A is a block diagram showing a configuration example of a multicarrier modulator. The digital data a to be transmitted is
With the buffer 1, the number of multiplexed symbols is n (normally n is 10).
The symbol data b is divided and output to the n modulators 2 to 4 for every (about 100 to 100). Each modulator # 1 to #n 2
Reference numeral 4 orthogonally modulates carriers having different frequencies according to the input symbol data b. The adder 5 adds the modulated signals g of the respective carriers and outputs a final modulated signal h. Figure 3 (B) is (A)
5 is a block diagram of each of modulators 2 to 4 of FIG. FIG. 4 is a diagram showing an example of I and Q signal arrangement, which shows a QPSK (quadrature pha
An example of the signal arrangement (phase diagram) in the case of se sift keying and four-phase phase modulation is shown. The symbol data b for each carrier is converted into the in-phase component I (I) by the I / Q converter 2-1 according to the 2-bit data in FIG.
The data c and the quadrature component Q (I) data d (I is 1 to n) are converted. For each component data c, d, π /
Multipliers 2 for carrier frequency signals e and f with two phases shifted
After being multiplied by 4 and 2-5, respectively, and then added by the adder 2-6, the modulated signal g for each carrier is obtained.
A multicarrier modulation signal (QPSK modulation wave) h is obtained by adding the n modulation signals g by the adder 5 of FIG. 3A.

The present invention is directed to a demodulator of a receiver which receives a multicarrier modulated signal (QPSK modulated wave) thus transmitted. FIG. 5A is a block diagram of a conventional demodulator, and FIG. 5B is a block diagram of a detector provided for each carrier. In FIG. 5A, the received signal i is detected by the # 1 to #n detectors 6 to 8 for each carrier, and I ′ and Q ′ signals j are output.
The buffer 10 converts the I '(I) and Q' (I) signals j of the respective carriers into parallel / serial conversion into digital data of 2 bits per symbol according to the signal arrangement of FIG. 4 and outputs demodulated digital data k. The detector of FIG. 5B multiplies each carrier of the received signal i by a carrier frequency signal that is π / 2 phase-shifted with each other in the multipliers 6-2 and 6-4 to obtain an LPF.
(Low-pass filter) Band-limited by 6-5 and 6-6 to obtain I '(I) and Q' (I) signals for each carrier. The I / Q discriminator 6-7 makes a decision according to the I / Q signal arrangement of FIG. 4 and outputs 1-symbol 2-bit data j. Since it is known that the detectors 6 to 8 in FIG. 5 can be replaced with one FFT (Fast Fourier Transform) based on the principle of quadrature detection, the configuration shown in FIG. You can In the following description, the multi-carrier detectors 6 to 8 are represented as FFT 61 as shown in FIG.

[0004]

The multicarrier modulation method is said to be strong against frequency selective fading, which is inevitable in land mobile communications, because the transmission band per carrier becomes smaller in inverse proportion to the number of carriers. There are advantages. However, the baseband modem (frequency band 300-2700Hz) used for ordinary analog radios
Is used in the HF band (3 MHz to 30 MHz),
Due to the environment in which a multipath delay wave of up to 3 mS due to ionospheric reflection is generated, the error rate of received data decreases, and a sufficient error rate characteristic cannot be obtained. FIG. 7 is a spectrum example diagram of a multicarrier modem by multipath fading (two wave level ratio = 1: 1). As is clear from the figure, frequency selective fading occurs due to multipath fading, and the level of some carriers is greatly attenuated. It is known that an equalizer is effective as a method for solving this problem. FIG. 8 is a block diagram of a conventional demodulator using an equalizer. As shown in the figure, the conventional circuit is a system in which an equalizer and a determiner are provided for each carrier, and each carrier is equalized.
Since a large number of equalizers (100>n> 10) corresponding to the number of carriers are required, there is a drawback that the scale of hardware is significantly increased.

It is an object of the present invention to provide a digital demodulator capable of solving the above-mentioned drawbacks and reducing the increase in the hardware scale due to the increase in the number of carriers.

[0006]

According to the digital demodulator of the present invention, the digital demodulator of the present invention receives and detects a multi-carrier modulated signal in which a plurality of carriers having different frequencies are modulated by transmission data. And a quadrature detection I and Q for inputting the baseband received signal and converting and separating into quadrature detection I and Q signals of each carrier wave.
A first inverse fast Fourier transformer that synthesizes signals for all carriers and outputs a synthesized I and Q signal, and a synthesized I and Q signal from the inverse fast Fourier transformer, synthesizes a previously quantized signal. An equalizer that outputs I _E, Q _E signals equalized using the tap coefficient updated by the equalization target signal, and an output of the equalizer is separated for each carrier to obtain I _E (I)
_, Q _E (I) signal output second fast Fourier transformer, and output of the second fast Fourier transformer data determination at the center point of the symbol of the symbol synchronization signal to determine the quantized signal output And a second inverse fast Fourier transformer for synthesizing the output from the determiner for all carriers and giving the equalizer as the equalization target signal, and the parallel / serial conversion of the output from the determiner. And a buffer for outputting a desired demodulated digital signal.

Further, instead of the first fast Fourier transformer and the first inverse fast Fourier transformer, a signal obtained by receiving the multicarrier modulated signal and converting it into an intermediate frequency is input, and quadrature detection is performed to obtain the signal. It is characterized by including a quadrature detector which outputs a combined I and Q signal.

That is, the gist is that all the carriers are collectively equalized by one equalizer.

[0009]

1 is a block diagram showing a first embodiment of the present invention. In the figure, 11 is a fast Fourier transformer (F
FT), 12 is inverse FFT, 13 is equalizer, 14 is FF
T and 15 are decision units, 16 is an inverse FFT, 17 is a buffer for converting parallel data into serial data, and 18 is a symbol synchronization circuit.

Received signal (baseband signal after detection) i
Is the quadrature detection signal I ′ for each carrier by the FFT 11.
(I), Q '(I) (I is 1 to n). The quadrature detection signals I ′ (I) and Q ′ (I) signals are inverse FFT1.
2 is modulated, and n carriers are combined for each in-phase component I and quadrature component Q. As a result, I, Q which is a combination of all carriers
2 signals are output. The equalizer 13 equalizes using the tap coefficients updated by using the desired signals I _R and Q _R (output of the inverse FFT 16) in the previous symbol, and I _E and Q
Output _E signal. I _E , Q output from the equalizer 13
_{The E} signal is separated into each carrier by the FFT 14 and I
_The signals become _E (I) and Q _E (I) signals, which are input to the determiner 15. The determiner 15 determines the signal point I at the time (center point of the symbol) given from the symbol synchronization circuit 18.
Data determination of _E (I) and Q _E (I) is performed according to the signal arrangement of FIG. The buffer 17 holds demodulated data for all carriers, performs parallel / serial conversion, and outputs demodulated digital data. The decision unit 15 decides on one of the signal constellations in FIG. 4,
Quantized signals I _R (I), Q corresponding to the number of quantized carriers
_R (I) (I is 1 to n) is, I _R obtained by synthesizing the entire carrier by reverse FFT16, it is converted into Q _R signal, the equalizer 13
Desired signal when updating the tap coefficient of Eq. (Target of equalization)
Becomes

FIG. 2 is a block diagram showing a second embodiment of the present invention. The second embodiment is a configuration example in which the input reception signal of the demodulator is taken out from the intermediate frequency (IF) stage, and the FFT 11 and the inverse F in the first embodiment of FIG. 1 are used.
The FT 12 is replaced with a quadrature detector 19. Therefore, the other components are the same as the corresponding components in the first embodiment of FIG. The tap coefficient of the equalizer 13 is updated at the center point of the symbol given from the symbol synchronization circuit 18 by using a signal after the determination data is updated, and a general RLS (Recurs
iveLeast Square) or LMS (Least Mean Square)
) Algorithm.

With such a configuration, as compared with the conventional configuration shown in FIG. 8, it is necessary to newly add one FFT circuit and two inverse FFT circuits in the first embodiment of FIG. However, in the second embodiment of FIG. 2, a quadrature detector, one FFT circuit and one inverse FFT are added, but there is only one equalizer and decision device for all carriers, and The circuit scale can be greatly reduced.

In the above embodiments, QPSK (four-phase PS
Although the case of the K) method is shown, for example, π / 4 shift QPSK, multiphase PSK, multivalued QAM (16QAM,
64QAM).

[0014]

As described above in detail, by implementing the present invention, a demodulator can be realized by one equalizer regardless of the number of carriers, and therefore, the circuit of the demodulator can be realized. The scale is greatly reduced, and the practical effect is extremely large.

[Brief description of drawings]

FIG. 1 is a block diagram showing a first embodiment of the present invention.

FIG. 2 is a block diagram showing a second embodiment of the present invention.

FIG. 3 is a configuration example diagram of a QPSK modulator.

FIG. 4 is an I, Q signal arrangement diagram of a QPSK modulator.

FIG. 5 is a diagram showing a configuration example of a conventional demodulator.

FIG. 6 is a diagram showing a configuration example of a conventional demodulator.

FIG. 7 is a spectrum example diagram of a multi-carrier modulation signal under selective fading.

FIG. 8 is a diagram showing a configuration example of a demodulator using a conventional equalizer.

[Explanation of symbols]

 1 Buffer 2, 3, 4 Modulator 2-1 I, Q Converter 2-2 Carrier Generator 2-3 π / 2 Phase Shifter 2-4, 2-5 Multiplier 2-6 Adder 5 Adder 6 , 7,8 Detector 6-1 Carrier generator 6-2,6-4 Multiplier 6-3 π / 2 Phase shifter 6-5,6-6 LPF 6,7 I, Q decision device 9 Symbol synchronization circuit 10 Buffer 11,14 FFT 12,16 Inverse FFT 13 Equalizer 15 Evaluator 17 Buffer 18 Symbol Synchronization Circuit 19 Quadrature Detector 61 FFT

Claims (2)

[Claims] 1. A baseband received signal after receiving and detecting a multicarrier modulation signal in which a plurality of carriers having different frequencies are modulated by transmission data is input and converted into quadrature detection I and Q signals of each carrier. A first fast Fourier transformer, a first inverse fast Fourier transformer that synthesizes the quadrature detection I and Q signals for all carriers and outputs a synthesized I and Q signal, and the inverse fast Fourier transformer An equalizer that outputs I _E, Q _E signals that are equalized by using the tap coefficient updated by the equalization target signal obtained by synthesizing the previous quantized signal, and the equalizer. Output is separated for each carrier and I _E (I) _, Q
_A second fast Fourier transformer that outputs an _E (I) signal; and a determiner that performs data determination on the output of the second fast Fourier transformer at the center point of the symbol of the symbol synchronization signal and outputs a quantized signal. A second inverse fast Fourier transformer for synthesizing the outputs from the determiner for all carriers and giving the equalizer as the equalization target signal; And a buffer for outputting the demodulated digital signal of. 2. Instead of the first fast Fourier transformer and the first inverse fast Fourier transformer according to claim 1, a signal obtained by receiving the multicarrier modulated signal and converting it to an intermediate frequency is input, 2. The digital demodulator according to claim 1, further comprising a quadrature detector for detecting and outputting the combined I and Q signals.