JPH06309867A - Word line driving circuit for semiconductor integrated circuit and its power supply supply method - Google Patents

Abstract

PURPOSE: To provide a word line driving circuit and a power supplying method for the same with which the malfunction caused by the coupling noise of word lines can be prevented and it is made more suitable for high integration. CONSTITUTION: A negative voltage Vtg, which is lower than a ground voltage and has an absolute value smaller than the threshold voltage of a pull-down means PD1, is supplied to the pull-down means PD1 comprising a word line driving circuit WD1 provided for each word line. This negative voltage Vtg is generated from a negative voltage generating circuit 100 composed of an oscillation circuit, charge pump circuit and voltage level detection circuit. Therefore, each word line is precharged to the negative voltage Vtg by the pulldown means beforw a driving voltage ϕX is supplied to the word line by a pull-up means PU1. Even when a voltage is temporarily increased by coupling noises at a word line WL11 adjacent to a selected word line WL1, that voltage is increased from the negative voltage Vtg so as not to exceed the threshold voltage of a path transistor M11. Thus, the generation of malfunction caused by the leak of data of a storage capacitor SC11 because of coupling noises is prevented.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit,
In particular, the present invention relates to a word line drive circuit for driving a word line and a power supply method thereof.

[0002]

2. Description of the Related Art Ultra-high integration of a semiconductor integrated circuit is promoted by extremely miniaturizing constituent elements such as cell transistors within a predetermined chip area. Achieving such a high degree of integration requires a high level of technology in the manufacturing process, etc., but with the recent continuous technological development and research, ultra-high integration of semiconductor integrated circuits has made rapid progress. .

However, as each component such as a cell transistor integrated in one chip is extremely miniaturized, a problem which has not occurred in a semiconductor integrated circuit of 4M (mega = 2 ²⁰ ) class, for example, has been encountered. 64M or 2
It is occurring in 56M class semiconductor integrated circuits. This is a problem that is inevitably caused by the reduction of the operating power supply voltage and the speeding up of the data access operation in addition to the miniaturization of each component such as the cell transistor.

For example, in particular, the number of word lines increases as the number of cell transistors increases, so that the width of word lines is extremely miniaturized. However, the voltage applied to the word line must be sufficiently higher than the power supply voltage supplied to the chip because the channel of the access transistor that transmits the data stored in the storage capacitor of the cell transistor must be sufficiently conductive. I won't. As a result, the application of a high voltage to a word line having an extremely miniaturized line width further increases the load applied to the word line. When a voltage is applied to the selected word line, coupling noise occurs between adjacent word lines, which is a serious problem. For such noise on the word line, refer to "1990 Symposium on VLSI Circuit".
"WORDLINE COUPLING NOISE" on pages 81 and 82 of "s"
For more information on the paper "REDUCTION TECHNIQUES FOR SCALED DRAMS".

The circuit diagram of FIG. 4 shows the connection relationship between a general word line and a word line drive circuit (driver) in the prior art. The configuration shown in the figure is applied to a 4M CMOS dynamic RAM product, and is generally used in this field.

In the configuration shown in FIG. 4, word line drive circuits are connected to each word line in one chip, and transistors are used as pull-up means and pull-down means. . One word line drive circuit WD1 (WD11) includes a pull-up transistor PU1 (PU11) that receives a word line boosting voltage φX as a power source and a pull-down transistor PD1 (PD12) connected to a ground voltage GND terminal.
And the other word line drive circuits have the same configuration. Pull-up transistor PU1 (P
U11) and pull-down transistor PD1 (PD12)
The word line WL1 (WL11) is connected to the connection point with
When the word line is selected, the word line boosting voltage φX is supplied. Word line boosting voltage φX
Is output from a word line boosting voltage φX generation circuit (boosting circuit) provided in the chip, which has a voltage level higher than the power supply voltage Vcc level. The signals D1 and D11 are signals generated from a combination of row addresses predecoded by a predecoder (not shown) in the chip.
1 and D11 drive word line drive circuits WD1 and WD11 in a row decoder (not shown). That is, the circuit configured at the output end of the row decoder becomes the word line drive circuit as shown in FIG.

FIG. 5 is a waveform diagram for explaining the word line coupling noise generated in the circuit configuration shown in FIG.
The operating characteristics of the circuit of FIG. 4 will be described below with reference to this.

When the signal D1 becomes logic "low", the gate of the pull-up transistor PU1 of the word line drive circuit WD1 is set to the voltage Vcc-Vtn (Vtn is the threshold voltage of the NMOS transistor 2) level. At this time, the pull-down transistor PD1 is turned off. After that, when the word line boosting voltage φX is input, the self-boosting (self-boos) in the pull-up transistor PU1 is input.
is generated, the power supply voltage V is applied to the word line WL1.
A voltage higher than cc is applied to the cell transistor M1.
Turns on for full conduction. Then, the data stored in the storage capacitor SC1 is transmitted to the bit line bar BL, and the sense amplifier 20 amplifies the voltage as shown in FIG.

On the other hand, when such a word line WL1 is selected, the adjacent word line WL11 is brought to a voltage of 0 V through the pull-down transistor PD12, so that access to the cell transistor M11 must be blocked. However, since a coupling capacitance such as C1 * 2 shown in FIG. 4 exists between the adjacent word line WL1 and word line WL11, when a voltage is applied to the word line WL1 by selection, it is temporarily changed. The voltage level of the word line WL11 also rises, causing coupling noise. The voltage rise width of the word line WL11 is
If the voltage rise width of the word line WL1 is ΔWL1, (Δ
WL1 · C1 * 2) / (C1 * 2 + C2). That is, as the voltage applied to the word line WL1 is higher, the noise generated by the coupling capacitance in the word line WL11 is proportionally increased. The rising width is, for example, the cell transistor M1 in FIG.
If the threshold voltage is higher than 1, the data stored in the storage capacitor SC11 is the bit line BL.
Therefore, the storage capacitor SC11 cannot store the correct data “1”. That is,
The voltage level of the data stored in the storage capacitor SC11 becomes low.

Further, as described above, the word line WL1
Even when the selection operation of the word line WL1 is performed again after the selection operation of No. 1 is completed, the voltage level of the word line WL11 again rises due to the coupling noise, and the voltage of the data stored in the storage capacitor SC11 is similarly increased. It will lower the level further. Naturally, such a phenomenon becomes worse as the selection process of the word line WL1 is repeated.

As a result of the above, when the selection operation of the word line WL11 is performed, the storage capacitor SC1
Since the voltage level of the data stored in 1 has dropped, the sense amplifier 20 may malfunction. Such a phenomenon is more likely to occur in the case of an ultra-high integration semiconductor integrated circuit in which the width of the word line is further miniaturized and the power supply voltage level is further lowered. It is better to solve it before realizing the circuit.

In addition, the above-mentioned "1990 Symposium on V"
In the paper on pages 81 and 82 of "LSI Circuits", regarding the arrangement method of the word lines, the twisted form of the word lines (twis
Tedword line) and a word line latch circuit are applied to solve the problem of coupling noise generated when selecting a word line. Although noise can be reduced by this technique as well, the possibility of occurrence of noise still remains, and as the degree of integration of semiconductor integrated circuits progresses, technological limitations will occur.

[0013]

SUMMARY OF THE INVENTION It is, therefore, an object of the present invention to provide a word line drive circuit capable of performing highly reliable data access operation in a highly integrated semiconductor integrated circuit.

Secondly, regarding the highly integrated semiconductor integrated circuit,
It is an object of the present invention to provide a word line drive circuit capable of preventing a malfunction caused by word line coupling noise during a cell data access operation.

Thirdly, in a highly integrated semiconductor integrated circuit,
It is an object of the present invention to provide a power supply method for a word line drive circuit that enables the word line drive circuit to perform a highly reliable cell data access operation.

Fourth, in the highly integrated semiconductor integrated circuit,
It is an object of the present invention to provide a power supply method for a word line drive circuit, which can prevent malfunction due to word line coupling noise during cell data access operation.

Fifth, regarding the highly integrated semiconductor integrated circuit,
Even if coupling noise occurs in the word line adjacent to the selected word line, the word line driving circuit prevents the voltage level of the adjacent word line from exceeding the threshold voltage of the cell transistor due to the coupling noise. To provide.

Sixth, in a highly integrated semiconductor integrated circuit,
Even if coupling noise occurs in the word line adjacent to the selected word line, the coupling noise prevents the voltage level of the adjacent word line from exceeding the threshold voltage of the cell transistor. It is to provide a power supply method.

Seventh, regarding the highly integrated semiconductor integrated circuit,
An object of the present invention is to provide a word line driving circuit that precharges a word line to a negative voltage.

[0020]

In order to achieve such an object, the present invention comprises pull-up means for increasing the voltage of the word line and pull-down means for decreasing the voltage of the word line, Regarding a semiconductor integrated circuit including a word line driving circuit provided one for each word line,
A pull-down means is provided with a negative voltage generating circuit that outputs a negative voltage having an absolute value smaller than the absolute value of the threshold voltage when forming a current path, and the output of this negative voltage generating circuit is supplied as the power source of the pull-down means. Then, one feature is that each word line is precharged to the negative voltage by the pull-down means before the voltage of the word line is raised by the pull-up means.

Regarding the method of supplying power to the word line drive circuit, the pull-down means of the word line drive circuit is
It is characterized in that the pull-down means supplies a negative voltage having an absolute value smaller than the absolute value of the threshold voltage when forming the current path as a power source.

The negative voltage generating circuit according to the semiconductor integrated circuit having the word line driving circuit according to the present invention can be easily integrated by being formed in the peripheral circuit area of the chip.
The negative voltage generating circuit generates a negative voltage having an absolute value smaller than the absolute value of the threshold voltage when a transistor is used as the pull-down means.

[0023]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that common parts are denoted by the same reference numerals as much as possible.

The "word line drive circuit" used herein is a circuit in which a word line is connected to the output terminal and which directly supplies a predetermined voltage to the word line, and is referred to as a "negative voltage generation circuit". Means a circuit different from a substrate voltage generator provided in a normal chip and outputting a negative voltage having an absolute value smaller than the absolute value of the threshold voltage of the pull-down transistor of the word line drive circuit.

FIG. 1 is a circuit diagram showing an embodiment of a word line drive circuit using the power supply method according to the present invention. The characteristic of the configuration is that the pull-down transistors PD1 and PD2 of the word line drive circuits WD1 and WD11 are not connected to the ground voltage GND terminal as in the conventional example shown in FIG. 4, but the output of the negative voltage generation circuit 100. It is connected to the voltage Vtg end. The output voltage Vtg of the negative voltage generation circuit 100 is a voltage whose absolute value is smaller than the threshold voltage of the pull-down transistor PD1 (PD2) of the word line drive circuit. Although FIG. 1 typically shows two word lines adjacent to each other in one chip, many such word lines are present in the chip in proportion to the degree of integration. A word line drive circuit is connected to each word line. In addition, in FIG. 1, one memory cell is representatively shown as being connected to one word line, but in reality, many memory cells are connected to the word line in the row direction. In addition, the output voltage Vtg of the negative voltage generating circuit 100 shown in FIG. 1 is supplied to all the word line driving circuits provided in one chip.

FIG. 2 shows the negative voltage generating circuit 10 shown in FIG.
A detailed circuit example of 0 is shown. This negative voltage generating circuit 100
Is a negative voltage Vtg having a voltage level lower than the ground voltage GND, which performs an oscillating operation and outputs a rectangular wave of a constant cycle, and an output signal of the oscillating circuit 100A as an input to perform a pumping operation. Charge pumping circuit 100 for outputting
B, and a voltage level detection circuit 100C that detects the voltage level of the negative voltage Vtg output from the charge pump circuit 100B and controls the oscillation operation of the oscillation circuit 100A.

The oscillator circuit 100A is formed by using inverter chains 104, ..., 112, and receives the detection signal φDET from the control line 138.
It oscillates according to the ON / OFF operation of 4. The charge pump circuit 100B has a known circuit configuration generally used in the art. The voltage level detection circuit 100C has a transistor 132 diode-connected to the output terminal of the negative voltage Vtg and a channel connected to the output side (signal line 133) of the transistor 132, and serves as a pull-down transistor of the word line drive circuit. The resistance transistor 134 having a resistance value corresponding to the threshold voltage and the output side of the transistor 132 (the signal line 13
3) is connected to the input terminal and is composed of an inverter 136 that outputs a detection signal φDET to the oscillation circuit 100A.

It is preferable that the negative voltage generating circuit 100 that outputs the negative voltage Vtg is arranged as one of the peripheral circuits in consideration of the chip layout in terms of integration.

Next, the operating characteristics of this embodiment will be described in detail with reference to FIGS.

First, the word line drive circuit WD1 (WD11) using the power supply method according to the present invention precharges the word line WL1 (WL11) to the negative voltage Vtg. That is, the feature of the power supply method of the word line drive circuit according to the present invention is that the word line drive circuit WD1 (WD11).
The negative voltage Vtg from the negative voltage generation circuit 100 is supplied as a power source to the pull-down transistor PD1 (PD2). If the absolute value of this negative voltage Vtg is α, the precharge level of all word lines is GN.
D-α (GND indicates the ground voltage). Therefore, when the drive voltage is supplied to the word line WL1 through the word line drive circuit WD1 (WD11), the voltage of the word line WL1 (WL11) in this example rises from the negative voltage Vtg as shown in FIG. Become. In contrast,
In the conventional example shown in FIG. 4, the voltage of the word line is 0 V (G
ND).

The coupling capacitance between the word line WL1 and the word line WL11 is C1 * 2, and the word line W
L11 Self-assured capacitance is C2, word line W
Assuming that the voltage rise width of L1 is ΔWL1, the word line WL1
The voltage rise width of the word line WL11 when the voltage rises is [(ΔWL1 · C1 * 2) / (C1 * 2 + C2)]
-Α. That is, as compared with the circuit shown in FIG. 4, the rise width is as low as α considering the threshold voltage of the cell transistor M11 (M1), so that the word line WL11
It is possible to prevent the cell transistor M11 (M1) connected to the switch from being turned on and prevent data from leaking to the bit line BL. This can be easily understood from the fact that the voltage VS2 does not drop in the waveform diagram shown in FIG. Even if there is data leaking to the bit line BL, the amount thereof is extremely small.

However, at this time, the level of the negative voltage Vtg output from the negative voltage generation circuit 100 is the pull-down transistor PD1 of the word line drive circuit WD1 (WD11).
The absolute value must be smaller than the threshold voltage Vt of (PD2). This is because when the absolute value α is larger than the absolute value of Vt, the voltage Vgs between the gate and the source of the pull-down transistor PD1 (PD2) = α, so that Vgs
Is larger than Vt, and the pull-down transistor PD1 (PD2) becomes conductive to lower the level of the word line drive voltage.

As described above, the absolute value of the negative voltage Vtg output from the negative voltage generating circuit 100 needs to be smaller than the threshold voltage of the pull-down transistor, but if this condition is not satisfied, it does not seem to be satisfied. If so, the voltage level detection circuit 1 of the negative voltage generation circuit 100 shown in FIG.
The detection signal .phi.DET becomes logic "low" by 00C, and the value of the negative voltage Vtg is maintained as described above by the oscillation operation of the oscillation circuit 100A.

According to this embodiment, the drive voltage is supplied to the selected word line when the word line is enabled, and an undesired voltage rise, that is, coupling noise is generated in the word line adjacent to the word line. Even so, since the rising width does not exceed the threshold voltage of the cell transistor, a stable data access operation can be performed.

The embodiment shown in FIGS. 1 and 2 is an optimum embodiment based on the idea of the present invention, and is not limited to this, and the same effect can be obtained within the technical scope of the present invention. It is also possible to carry out various modifications as obtained.
For example, FIG. 1 shows a method of supplying power to the word line drive circuit.
It is possible to obtain the same effect not only by the circuit configuration as shown in (4) but also by a word line drive circuit in which the pull-up transistor is a PMOS transistor. Furthermore, the negative voltage Vt of the negative voltage generation circuit 100 shown in FIG.
If g is within a range in which the absolute value is smaller than the threshold voltage of the pull-down transistor of the word line drive circuit, various other modified circuit configurations can be considered.

[0036]

As described above, the word line driving circuit and the power supply method therefor according to the present invention have an absolute value smaller than the absolute value of the threshold voltage when a transistor is used as the pull-down means of the word line driving circuit. A negative voltage having a value is used as a power supply for the pull-down means and the selected word line is precharged to the negative voltage level, which is caused by the coupling noise of the word line adjacent to the selected word line. It is possible to prevent a malfunction during data access. This is even more effective in an ultra-high-integrated semiconductor integrated circuit, which is more sensitive to voltage level fluctuations. Further, by doing so, the reliability of the highly integrated semiconductor integrated circuit can be further enhanced.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a main part of a semiconductor integrated circuit showing an embodiment of the present invention.

FIG. 2 is a circuit diagram showing a specific example of the negative voltage generating circuit shown in FIG.

FIG. 3 is a waveform diagram showing a potential state in a main part in the embodiment of the present invention.

FIG. 4 is a circuit diagram of a main part of a semiconductor integrated circuit according to a conventional technique.

5 is a waveform diagram showing a potential state in a main part of the circuit shown in FIG.

[Explanation of symbols]

100 Negative voltage generation circuit 100A Oscillation circuit 100B Charge pump circuit 100C Voltage level detection circuit WD1, WD11 Word line drive circuit PU1, PU2 Pull-up transistor (pull-up means) PD1, PD2 Pull-down transistor (pull-down means) WL1, WL11 Word line φX Word line boosting voltage (driving voltage) Vtg Negative voltage

Claims (9)

[Claims] 1. A semiconductor comprising a pull-up means for raising the voltage of a word line and a pull-down means for lowering the voltage of the word line, and comprising a word line drive circuit provided for each word line. The integrated circuit is provided with a negative voltage generating circuit that outputs a negative voltage having an absolute value smaller than the absolute value of the threshold voltage when the pull-down means forms a current path, and the output of the negative voltage generating circuit is the power supply of the pull-down means. The semiconductor integrated circuit is characterized in that each word line is precharged to the negative voltage by the pull-down means before the voltage of the word line is raised by the pull-up means. 2. An oscillation circuit in which a negative voltage generation circuit outputs a rectangular wave of a constant cycle by an oscillation operation, a charge pump circuit which performs a pumping operation by an output signal of the oscillation circuit and outputs a negative voltage, and The semiconductor integrated circuit according to claim 1, further comprising a voltage level detection circuit that detects the level of the negative voltage output from the charge pump circuit and controls the oscillation operation of the oscillation circuit. 3. A word line drive circuit which is provided in a row decoder of a semiconductor integrated circuit and supplies a drive voltage to a selected word line, comprising: a first power supply having a positive voltage level and a second power supply having a negative voltage level; A pull-up means in which a current path is formed for one power source and a pull-down means in which a current path is formed for a second power source; and a word line is connected to a connection point between the pull-up means and the pull-down means. Second word line
A word line drive circuit, wherein a drive voltage is obtained by increasing a negative voltage level of a power supply to a positive voltage level of a first power supply. 4. The word line drive circuit according to claim 3, wherein the absolute value of the negative voltage level is made smaller than the absolute value of the threshold voltage for forming the current path in the pull-down means. 5. The word line drive circuit according to claim 4, wherein the second power supply is a power supply from a negative voltage generating circuit formed in the peripheral circuit region. 6. An oscillating circuit in which a negative voltage generating circuit outputs a rectangular wave of a constant cycle by an oscillating operation, and a charge pump which performs a pumping operation by an output signal of the oscillating circuit to generate a voltage as a second power supply. 6. The word line drive circuit according to claim 5, comprising a circuit and a voltage level detection circuit that detects the level of the voltage output from the charge pump circuit and controls the oscillation operation of the oscillation circuit. 7. A word line drive circuit in a semiconductor integrated circuit, comprising: a pull-up transistor using a word line boosting voltage as a power supply; and a pull-up transistor connected in series and ON / O complementary to the pull-up transistor.
A pull-down transistor that operates in FF mode is provided, and a negative voltage that is output from the negative voltage generation circuit formed in the peripheral circuit area and has an absolute value smaller than the absolute value of the threshold voltage of the pull-down transistor is supplied as the power source of the pull-down transistor. And a word line driving circuit connected to a connection portion of the pull-up transistor and the pull-down transistor. 8. The word line drive circuit according to claim 7, wherein all the word lines are precharged to a negative voltage during a read operation. 9. Complementary pull-up means and pull-down means are provided, and a drive voltage is supplied by the pull-up means when a word line is selected, one for each word line. A method for supplying power to a word line driving circuit, wherein a negative voltage generating circuit is used to generate a negative voltage having an absolute value smaller than an absolute value of a threshold voltage for forming a current path of a pull-down means, and the negative voltage is generated. Is supplied as the power supply to the pull-down means of each word line drive circuit,
A power supply method, wherein all word lines can be precharged with the negative voltage when selecting the word line.