JPH06301603A - Semiconductor device - Google Patents

Abstract

PURPOSE:To provide a semiconductor device capable of preventing information stored in a storage device built in the semiconductor device itself from being illegally read out. CONSTITUTION:The semiconductor device 1 is provided with a down counter 7 for counting the input frequency of codes from an input terminal 5a and an AND gate 8 for inhibiting the opening of a semiconductor switch 4 for outputting information from the built-in storage device 2 to the outside when the count value of the down counter 7 reaches a prescribed value. Thereby the illegal reading of information stored in the storage device 2 built in the semiconductor device 1 to the outside can be made difficult as compared with a conventional method.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device such as a memory device or a microcomputer having the memory device built therein, and more particularly to a semiconductor device having a function of protecting information stored in the memory device from an illegal read operation. Regarding the device.

[0002]

2. Description of the Related Art A conventional semiconductor device is shown in the block diagram of FIG.
In particular, a configuration example of a semiconductor device having a function of protecting information stored in a built-in storage device from an illegal read operation is shown.

In FIG. 4, reference numeral 1 indicates a semiconductor device, specifically, a large-scale storage device itself, or a microcomputer having a storage device built therein is constructed on one chip. . The semiconductor device 1 is provided with an input terminal 5a for inputting a signal from the outside and an output terminal 5b for outputting a signal to the outside.

Reference numeral 2 indicates a storage device. As described above, the storage device 2 may be a main constituent element of the semiconductor device 1, or a constituent element of a microcomputer together with a CPU (not shown) and the like. There are cases such as. Reference numeral 3 indicates a protector, which is connected to the above-mentioned input terminal 5a and signal line 6a. A protection release code having a predetermined value is set in advance in the protection device 3, and a high level protection release signal is issued only when the code input from the input terminal 5a matches the preset protection release code. Output to signal line 6b.

Reference numeral 4 is a semiconductor switch, which is connected to the storage device 2 by a signal line 6c, connected to the output terminal 5b by a signal line 6d, and connected to the protection device 3 by a signal line 6b. The semiconductor switch 4 outputs the information stored in the storage device 2 to the output terminal 5b only when the protection release signal output from the protection device 3 and applied via the signal line 6b is at a high level. To do.

The operation of such a conventional semiconductor device is as follows. To read the information stored in the storage device 2 of the semiconductor device 1, the protection release code is input to the input terminal 5a.

However, if the code input from the input terminal 5a does not match the protection cancellation code preset in the protection device 3, the protection device 3 maintains the protection cancellation signal at the low level, so that the semiconductor is protected. The switch 4 maintains the closed state. As a result, the storage device 2
Since the information stored in 1 is not output to the output terminal 5b, it is impossible to illegally read information from the semiconductor device 1 to the outside.

On the other hand, when the code input from the input terminal 5a coincides with the protection release code preset in the protection device 3, the protection device 3 outputs a high level protection release signal to the signal line 6b. Therefore, the semiconductor switch 4 is opened. As a result, the information stored in the storage device 2 is output to the output terminal 5b via the signal lines 6c and 6d, so that the information can be read out of the semiconductor device 1.

[0009]

By the way, in the conventional semiconductor device having the protection function as described above, there is a fear that illegal protection release can be performed relatively easily. This is extremely time-consuming and time-consuming when various codes are manually input, but in the semiconductor device as described above, for example, a microcomputer or the like is used, and a huge number of types are required in a relatively short time. This is because it is possible to easily input the same code as the protection release code to the semiconductor device by generating the code and sequentially inputting it to the external input terminal.

The present invention has been made in view of the above circumstances, and an object thereof is to provide a semiconductor device capable of preventing unauthorized reading of information stored in a storage device in the semiconductor device.

[0011]

According to a first aspect of the present invention, a semiconductor device has a counter for counting the number of times a code is input from an external input terminal, and a counter for counting the number of times the code is input from an external input terminal. It is provided with means for inhibiting the operation of the information output means for outputting information from the built-in storage device.

A second aspect of the semiconductor device of the present invention is such that the information sent from an information output means for outputting information from a built-in storage device is forcibly supplied with a predetermined signal when the information is sent to the external output terminal. The protection device is provided with information conversion means for converting it into specific information, and the protection device generates a protection release signal regardless of whether the code input from the external input terminal matches a preset code, When the code and the preset code do not match, the information changing means is operated to output a predetermined signal.

According to a third aspect of the semiconductor device of the present invention, an external input terminal, an external output terminal, a storage device for storing information, and a code input from the external input terminal are different from each other in advance. First to n-th (n is a natural number) protection devices that generate protection release signals when the codes set as the values match, and stored in the storage device when a predetermined signal is given. Information output means for outputting information from an external output terminal and first to i-th (i is a natural number and i in the i-th code input to the input terminal.
≦ n) The i protection codes output from the first to i-th protection devices are output from the i-th protection release signals only when the same codes as the i codes preset in each protection device are input in the same order. Means for generating a predetermined signal to operate the information output means.

[0014]

According to the first aspect of the semiconductor device of the present invention, when the number of times of input of the code from the external input terminal counted by the counter reaches a predetermined value, the information for outputting the information from the built-in storage device. The operation of the output means is prohibited,
Information cannot be read from the storage device.

In the second aspect of the semiconductor device of the present invention, the protection device generates the protection release signal regardless of whether the code input from the external input terminal matches the preset code or not. Information is read from the storage device, but when the input code and the preset code do not match, the information changing means operates and a predetermined signal, for example, "1" or "0" continues. Data is output.

According to a third aspect of the semiconductor device of the present invention, in the i-th code input to the input terminal, the first to i-th codes are input.
(I is a natural number and i ≦ n) i output from the first to i-th protect devices only when i-codes that are the same as i-codes preset in each protect device are input in the same order. A predetermined signal is generated from the individual protection release signals, whereby the information output means operates and the information can be read from the storage device.

[0017]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail with reference to the drawings showing the embodiments thereof.

FIG. 1 is a block diagram showing a configuration example of a first invention of a semiconductor device according to the present invention. In FIG. 1, the same reference numerals as those in FIG. 4 referred to in the description of the conventional example described above indicate the same or corresponding portions.

In FIG. 1, reference numeral 1 indicates a semiconductor device, specifically, a large-scale storage device itself, or a microcomputer having a storage device built therein is constructed on one chip. . The semiconductor device 1 is provided with an input terminal 5a for inputting a signal from the outside and an output terminal 5b for outputting a signal to the outside.

Reference numeral 2 is a storage device. As described above, the storage device 2 may be a main constituent element of the semiconductor device 1, or may be a constituent element of a microcomputer together with a CPU (not shown). There are also cases.
Reference numeral 3 is a protector, which is the input terminal 5a described above.
And signal line 6a. A protection release code having a predetermined value is set in advance in the protection device 3, and a high level protection release signal is issued only when the code input from the input terminal 5a matches the preset protection release code. It outputs to the AND gate 8 via the signal line 6b.

The AND gate 8 has two inputs, one positive logic input terminal is connected to the protector 3 via the signal line 6b as described above, and the other negative logic input terminal is the signal line 6g. It is connected to the down counter 7 via. The above-mentioned signal line 6a is connected to the down counter 7,
The number of times the signal is input to the input terminal 5a is down-counted from a preset predetermined value. Then, when the count value of the down counter 7 underflows, the down counter 7 outputs a high level read inhibit signal to the signal line 6g.

Therefore, the AND gate 8 is normally supplied with a low level protection release signal from the protector 3 and a low level read inhibit signal from the down counter 7, and outputs the low level signal to the signal line 6f. It is outputting. However, when the protection release signal provided from the protection device 3 becomes high level, the down counter 7
If the read inhibit signal given from the AND is low level, the AND gate 8 outputs a high level signal to the signal line 6f. In addition, when the protection release signal provided from the protect device 3 becomes high level, the down counter 7
If the read inhibit signal given by the signal also becomes high level, the AND gate 8 outputs a low level signal to the signal line 6f.

Reference numeral 4 is a semiconductor switch, the storage device 2 is the above-mentioned signal line 6c, and the output terminal 5b is the signal line 6d.
In addition, the protection device 3 is connected by a signal line 6b. The semiconductor switch 4 is opened only when the signal given from the AND gate 8 via the signal line 6f is at a high level to output the information stored in the storage device 2 to the output terminal 5b. .

The operation of the first invention of the semiconductor device of the present invention as described above is as follows. In order to read the information stored in the storage device 2 of the semiconductor device 1, the protection release code is input to the input terminal 5a as in the conventional example.

If the code input from the input terminal 5a does not match the protection cancellation code preset in the protection device 3, the protection device 3 keeps the protection cancellation signal at the low level, so that the semiconductor switch 4 is operated. Keeps closed. As a result, the information stored in the storage device 2 is not output to the output terminal 5b, so it is impossible to illegally read the information from the semiconductor device 1 to the outside.

On the other hand, when the code input from the input terminal 5a matches the protection release code preset in the protection device 3, the protection device 3 outputs a high level protection release signal to the signal line 6b. . At this time, the number of times the code has been input to the input terminal 5a up to that time is determined by the down counter 7
If it is less than or equal to the predetermined value set in, the down counter 7
Since the read inhibit signal outputted from the signal line 6g to the signal line 6g is at a low level, the AND gate 8 outputs a high level signal to the signal line 6f.

In this way, the AND gate 8 is connected to the signal line 6f.
When a high level signal is output to the semiconductor switch 4, the semiconductor switch 4 opens. As a result, the information stored in the storage device 2 is output to the output terminal 5b via the signal lines 6c and 6d, so that the information can be read out of the semiconductor device 1.

By the way, in the case where the code inputted many times through the input terminal 5a does not coincide with the protection cancellation code preset in the protect device 3, the down counter 7 is eventually operated. The count value underflows. In such a case, the read inhibit signal output from the down counter 7 to the signal line 6f becomes high level, and therefore the output from the AND gate 8 to the signal line 6f becomes the level of the signal given from the signal line 6b. Maintain low level regardless.

When the output signal of the AND gate 8 is maintained at the low level in this way, the input terminal
When the code input from 5a matches the protection release code preset in the protection device 3, the protection device 3
Even if a high level protection release signal is output from the semiconductor switch 4, the semiconductor switch 4 is not opened. As a result, the information stored in the storage device 2 is not output to the output terminal 5b, so that it becomes impossible to illegally read the information from the semiconductor device 1 to the outside.

Although the down counter 7 is used in the above embodiment, the up counter is used to output an overflow signal generated when the count value matches a predetermined value to the signal line 6g. It goes without saying that you can do it.

Next, a second invention of the semiconductor device of the present invention will be described. FIG. 2 is a block diagram showing a configuration example of the second invention of the semiconductor device according to the present invention. In addition, this FIG.
In FIG. 4, the same reference numerals as those in FIGS. 1 and 4 referred to in the description of the first invention and the conventional example described above indicate the same or corresponding portions.

However, in the second aspect of the present invention, the protection device 3
Outputs a high level signal to the signal line 6b regardless of whether or not there is a code input from the input terminal 5a and the protection release code preset in the protection device 3.

Instead, in the second aspect of the present invention, the protect device 3 uses the signal line when the code input from the input terminal 5a and the preset protection release code match.
It outputs a low level signal to 6h, and outputs a high level signal if they do not match.

Further, in the second invention, in addition to the conventional structure shown in FIG. 4, the signal line 6i is branched from the middle of the signal line 6d. This signal line 6i is a semiconductor switch 4b
Is connected to the ground potential 9 via.

The opening / closing of the semiconductor switch 4b is controlled by a signal given from the protector 3 via the above-mentioned signal line 6h. Specifically, the semiconductor switch 4b is opened when the signal provided from the protector 3 via the signal line 6h is high level, and closed when the signal is low level.

The operation of the second invention of such a semiconductor device of the present invention is as follows. In order to read the information stored in the storage device 2 of the semiconductor device 1, the protection release code is input to the input terminal 5a as in the conventional example and the first invention.

When the code input from the input terminal 5a matches the protection release code preset in the protect device 3, the protect device 3 outputs a high level signal to the signal line 6b, so that the semiconductor switch 4 is activated. Opens.
Further, in this case, since the low level signal is output from the protection device 3 to the signal line 6h, the semiconductor switch 4b
Maintains a closed circuit. As a result, the information stored in the storage device 2 is output to the output terminal 5b via the signal lines 6c and 6d, so that the information can be read out of the semiconductor device 1.

On the other hand, if the code input from the input terminal 5a does not match the protection release code preset in the protector 3, the protector 3 still outputs a high level signal to the signal line 6b. The semiconductor switch 4 opens. Therefore, the information stored in the storage device 2 is output to the output terminal 5b via the signal lines 6c and 6d. However, in this case, since a high level signal is output from the protection device 3 to the signal line 6h, the semiconductor switch 4b opens and connects the signal line 6d to the ground potential 9. As a result, a low level signal is continuously output from the output terminal 5b.

Although the signal line 6d is connected to the ground potential 9 via the semiconductor switch 4b in the above embodiment, it may be connected to the power supply potential instead of the ground potential 9. When such a configuration is adopted, the output terminal 5b
Then, the high-level signal is continuously output.

Next, a third invention of the semiconductor device of the present invention will be described. FIG. 3 is a block diagram showing a configuration example of a third invention of the semiconductor device according to the present invention. In addition, this FIG.
4, the same reference numerals as those in FIGS. 1, 2 and 4 referred to in the above description of the first and second inventions and the conventional example indicate the same or corresponding portions.

However, in the third invention, a plurality of protect devices (in the embodiment shown in FIG. 3, the first, second and third protect devices are used).
3 protection devices 3a, 3b, 3c) are provided,
A different protection release code is preset for each. Each of the first, second and third protection devices 3a, 3b, 3c is designed so that a code is inputted from the input terminal 5a through the signal line 6a, and the inputted code is preset for each. When they match the protection release code, a high level signal is output to each of the signal lines 13a, 13b and 13c. In addition, in the first and second protect devices 3a and 3b, when the code input from the input terminal 5a through the signal line 6a does not match the preset protection release code, the signal line 13d is used. , Outputs a high level signal to 13e.

The signal line 13a is the first of the three-input AND gates 8.
, The signal line 13b is connected to one positive logic input terminal of the two-input OR gate 12a, and the signal line 13c is connected to one positive logic input terminal of the two-input OR gate 12b. Further, the signal lines 13d and 13e are connected to the positive logic input terminals of both the 2-input OR gates 12c, and the output of the OR gate 12c is supplied to the up counter 11 via the signal line 13f.
Is connected to the clock terminal CK of.

The up counter 11 has two output terminals T1 and T2. In the initial state, low level signals are output from the output terminals T1 and T2 to the signal lines 13g and 13h, respectively. In the initial state, when the high-level signal is input to the clock terminal CK once in the initial state, the up-counter 11 first outputs the high-level signal from the output terminal T1 to the signal line 13g, and is input twice. Then, a high-level signal is output from the output terminal T2 to the signal line 13h.

The above-mentioned signal line 13g is connected to the other negative logic input terminal of the OR gate 12a, and the above-mentioned signal line 13f is connected to the other negative logic input terminal of the OR gate 12b. There is. The outputs of both OR gates 12a and 12b are input to the AND gate 8 described above. AND gate 8
Is output to the semiconductor switch 4 via the signal line 6f, and the opening / closing of the semiconductor switch 4 is controlled by the output of the AND gate 8 as in the first invention.

The operation of the third invention of the semiconductor device of the present invention as described above is as follows. In order to read the information stored in the storage device 2 of the semiconductor device 1, inputting a protection release code to the input terminal 5a is the same as in the first and second inventions and the conventional example described above.

It is assumed that the up-counter 11 is in the initial state, and therefore low-level signals are output from the output terminals T1 and T2 to the signal lines 13g and 13h, respectively.
A high level signal is input to the second and third input terminals of the ND gate 8. When the code input from the input terminal 5a matches the protection release code preset in the first protection device 3a, the first protection device 3a outputs a high level signal to the signal line 13a, so that the AND gate is used. 8
Output becomes high level. The high level output from the AND gate 8 is given to the semiconductor switch 4 via the signal line 6f, so that the semiconductor switch 4 is opened. As a result, the information stored in the storage device 2 is output to the output terminal 5b via the signal lines 6c and 6d, so that the information can be read out of the semiconductor device 1.

On the other hand, when the code input from the input terminal 5a does not match the protection release code preset in the first protector 3a, a low level signal is sent from the first protector 3a to the signal line 13a. Is output, the semiconductor switch 4 does not open and the information stored in the storage device 2 is not output to the outside of the semiconductor device 1. In this case, a high level signal is output from the protection device 3 to the signal line 13d. Therefore, this high-level signal
Up counter 11 from OR gate 12c via signal line 13f
Since it is given to the clock terminal CK of
A high-level signal is output to the signal line 13g from the output terminal T1 of.

By outputting a high level signal to the signal line 13g, the output of the OR gate 12a is maintained at a low level. In this state, it is set in the first protection device 3a and the second protection device 3b, respectively. When the protection release code is input from the input terminal 5a, the first protection device
Since the output from 3a to the signal line 13a and the output from the second protection device 3b to the signal line 13b both become high level, the output terminal T2 of the up-counter 11 to the signal line 13h
The output to the OR gate remains low, so the OR gate 12
The outputs of a and 12b both go high. Therefore, A
A high-level signal is input to the three input terminals of the ND gate 8, so its output also becomes a high-level signal.
It is given to the semiconductor switch 4 via 6f. As a result, the information stored in the storage device 2 is output from the input terminal 5a.

That is, when an incorrect code is input once to the input terminal 5a, the semiconductor device is not started until the protection release codes set in both the first and second protection devices 3a and 3b are input. It becomes possible to read information from 1.

When the code input to the input terminal 5a for the second time is also incorrect, a high level signal is output from the second protector 3b to the signal line 13e, which causes the OR gate 12c and the signal line 13f. Is supplied to the clock terminal CK of the up counter 11 via the output terminal T2 of the up counter 11.
The output to the signal line 13h also goes high. Therefore, in this state, the protection release codes set in the first, second, and third protection devices 3a, 3b, and 3c are correctly input from the input terminal 5a, and then the protection devices 3a and 3 are not input.
The signals output from b, 3c to the outputs 13a, 13b, 13c become high level, the output of the AND gate 8 also becomes high level, the semiconductor switch 4 is opened, and the information is read out from the semiconductor device 1 to the outside. It

That is, when an incorrect code is input twice to the input terminal 5a, next, the first, second and third protection devices 3 are
The information can be read from the semiconductor device 1 only after the protection release codes set in all of a, 3b and 3c are input.

In the above embodiment, three protection devices are provided as indicated by reference numerals 3a, 3b and 3c, but two protection devices or four or more protection devices are also provided. Of course, it is possible.

[0053]

As described above in detail, in any of the first, second, and third inventions of the semiconductor device of the present invention, it is possible to illegally read information from the memory device built in the semiconductor device. Is much more difficult than before.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration example of a first invention of a semiconductor device according to the present invention.

FIG. 2 is a block diagram showing a configuration example of a second invention of a semiconductor device according to the present invention.

FIG. 3 is a block diagram showing a configuration example of a third invention of a semiconductor device according to the invention.

FIG. 4 is a block diagram showing a configuration example of a conventional semiconductor device, particularly a semiconductor device having a function of protecting information stored in a built-in storage device.

[Explanation of symbols]

 1 semiconductor device 2 storage device 3 (3a, 3b, 3c) protection device 4 (4b) semiconductor switch 5a input terminal 5b output terminal 7 down counter 9 ground potential 11 up counter

Claims (3)

[Claims] 1. An input terminal for receiving a signal from the outside,
An output terminal for outputting a signal to the outside, a storage device that stores information, and a protection that generates a protection release signal when a code input from the input terminal matches a preset code A semiconductor device comprising: a device; and an information output unit that outputs information stored in the storage device from the output terminal when the protection release signal is given from the protection device, wherein a code from the input terminal is provided. And a means for inhibiting the operation of the information output means when the count value of the counter reaches a predetermined value. 2. An input terminal for receiving a signal from the outside,
An output terminal for outputting a signal to the outside, a storage device that stores information, and a protection that generates a protection release signal when a code input from the input terminal matches a preset code A semiconductor device comprising: a device; and an information output means for outputting information stored in the storage device from the output terminal when the protection release signal is given from the protection device, The protection device is provided with information conversion means for forcibly converting the information sent to the output terminal into specific information when a predetermined signal is given, and the protection device is preset with a code input from the input terminal. The protection release signal is generated regardless of whether the code matches or does not match, and the information change is performed when the input code and the preset code do not match. The semiconductor device is characterized in that by operating the means are no order to output a predetermined signal. 3. An input terminal for receiving a signal from the outside, an output terminal for outputting a signal to the outside, a storage device for storing information, and a code respectively inputted from the input terminal. The first to nth (n is a natural number) protection device that generates a protection release signal when a code that has been set as a different value is matched with the storage device when a predetermined signal is given. Information output means for outputting the stored information from the output terminal, and preset in each of the first to i-th (i is a natural number and i ≦ n) protect devices in the i-th code input to the input terminal. The predetermined signal is generated from the i protection release signals output from the first to i-th protect devices only when the same codes as the i codes that have been input are input in the same order. Further comprising a means for operating the information output means Te wherein a.