JPH06301372A - Display control circuit - Google Patents

Abstract

PURPOSE:To shorten the time for updating plotting with a display device in which a moving picture part and a fixed picture are displayed in crossover by updating plotting only in the moving picture part. CONSTITUTION:This display control circuit is provided with a frame buffer 41a for moving pictures and a frame buffer 41b for fixed pictures. Data are simultaneously read out of these frame buffers at the time of the display and whether image information exists in the frame buffer for the moving pictures or not is decided by a decision circuit 41c. The moving picture data is selected in the case of the presence and the fixed picture data in the case of the absence by a selector 41d. This data is outputted as the selected image data. As a result, the moving picture data and the fixed picture data are synthesized according to the presence or absence of the moving picture data.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display control circuit used for a display device, and more particularly to a display control circuit used for displaying drawing data.

[0002]

2. Description of the Related Art Generally, a display control circuit of this type includes a plurality of frame buffers, selectively writes drawing data in the frame buffers, synthesizes the frame buffer data as necessary, and displays the synthesized data. (For example, Japanese Patent Laid-Open No. 59-165091).

A conventional display control circuit will be outlined with reference to FIG.

The display control circuit includes a display control unit 11, and the display control unit 11 includes a display processor 11a and a frame management unit 11b. The display processor 11a generates drawing data by software. On the other hand, the frame management unit 11b generates a selection signal according to an instruction from the display processor 11a and supplies it to the frame selector 12. The frame selector 12 selectively writes the drawing data in the first to Nth (N is an integer of 2 or more) frame buffers 21 to 2N according to the selection signal. That is, the first to Nth frame buffers 21
Through 2N, the drawing data is written selectively and for each preset segment.

At the time of reading, a control signal is given from the display controller 11 to the frame multiplexer 31. The frame multiplexer 31 selectively reads the buffer data from the first to Nth frame buffers according to the control signal, and displays the CRT display unit 32 as display data.
Give to. For example, the frame multiplexer 31 sequentially selects each of the frame buffers 21 to 2N and reads out the buffer data to give to the CRT display unit 32, or simultaneously reads out the buffer data from a plurality of frame buffers and logically synthesizes them and then displays them to the CRT display unit 32. give. In any case, the graphic data displayed on the CRT display unit 32 is a combination of data for each frame.

[0006]

As described above, in the conventional display control circuit, since the display controller including the display processor controls the frame selector and the frame multiplexer, the display processor draws in the frame buffer. The processing load other than writing the data is incurred. Further, there is a problem in that a frame-level management of drawing data requires a software-level management table, which complicates the processing. In addition, due to the above problems, the conventional display control circuit has a problem that the real-time property of the drawing update time is impaired.

An object of the present invention is to provide a display control circuit capable of reducing drawing processing.

Another object of the present invention is to provide a display control circuit capable of performing high quality drawing without impairing the real time property of drawing update time.

[0009]

According to the present invention, a first frame buffer which is used when a moving image and a fixed image are combined and displayed, and which stores moving image data as first buffer data, A second frame buffer that stores fixed image data as second buffer data, a determination unit that determines whether or not the first buffer data exists and outputs a determination result, and a determination unit that responds to the determination result. The first
And a selection means for selecting any one of the second buffer data and transmitting it as the display image data.

[0010]

EXAMPLES The present invention will be described below with reference to examples.

Referring to FIG. 1, the display control circuit 41 is supplied with image data from a graphic processor 42. The graphic processor 42 generates moving image data and fixed image data as image data.

The display control circuit 41 includes a moving picture frame buffer 41a, a fixed picture frame buffer 41b, a determination circuit 41c, and a selector 41d. From the graphic processor 42, address signals, data signals,
And the control signal is transmitted, and when the data signal represents moving image data, the moving image data is written in the address indicated by the address signal by the control signal in the moving image frame buffer 41a. On the other hand, when the data signal represents the fixed image data, the fixed image data is written in the fixed image frame buffer 41b at the address indicated by the address signal by the control signal. In addition,
The moving image data is updated by the graphic processor at regular intervals.

The moving picture image data and the fixed picture image data are read out from the moving picture frame buffer 41a and the fixed picture frame buffer 41b at a predetermined cycle. Then, the moving image data and the fixed image data are supplied to the selector 41d, and the moving image data is further supplied to the determination circuit 41c. The determination circuit 41c determines whether or not there is moving image data. That is, the determination circuit 41c determines whether or not the image information is present in the data read from the moving image frame buffer 41b. When the image information exists, the determination circuit 41c controls the selector 41d to select the moving image data and output it as the selected image data. On the other hand, when there is no image data, the determination circuit 41c controls the selector 41d to select the fixed image data and output it as the selected image data.

The selected image data is a color palette / DAC
43, where it is converted into color information and then converted into a video signal and applied to the display 44. As a result, the moving image and the fixed image are combined and displayed on the display unit 44.

Since the moving image data and the fixed image data are selectively output according to the contents of the moving image frame buffer, the moving image and the fixed image can be automatically combined.

[0016]

As described above, according to the present invention, since the moving picture frame buffer and the fixed picture frame buffer are provided, the graphic processor only needs to update the moving picture frame buffer. As a result, the drawing process is reduced. Can be achieved. Further, the determination circuit determines whether or not image information is present in the moving image frame buffer and selectively outputs the moving image data or the fixed image data. Therefore, the moving image and the fixed image can be combined, and as a result, it is possible to perform high-quality drawing without impairing the real-time property of the drawing update time.

[Brief description of drawings]

FIG. 1 is a block diagram for explaining an embodiment of a display control circuit according to the present invention.

FIG. 2 is a block diagram for explaining a conventional display control circuit.

[Explanation of symbols]

 11 display control unit 11a display processor 11b frame management unit 12 frame selector 21 to 2N frame buffer 31 frame multiplexer 32 CRT display unit 41 display control circuit 41a moving image frame buffer 41b fixed image frame buffer 41c determination circuit 41d selector 42 graphic processor 43 Color Palette / DAC 44 Display

Claims (3)

[Claims] 1. A first frame buffer, which is used when a moving image and a fixed image are combined and displayed, and stores moving image data as first buffer data, and a fixed image data is second buffer data. A display control circuit comprising: a second frame buffer for storing the image data as an output and an output unit for selectively outputting the first and second buffer data as display image data. 2. The display control circuit according to claim 1, wherein the output means determines whether or not the first buffer data exists and outputs a determination result,
A display control circuit comprising: a selection unit that selects one of the first and second buffer data according to the determination result and sends it as the display image data. 3. The display control circuit according to claim 2, wherein the determination means outputs a first determination signal when the first buffer data is present and the first buffer data is not present when the first buffer data is not present. A second determination signal is output, and the selection means outputs the first buffer data as the display image data in response to the first determination signal and outputs the second buffer signal in response to the second determination signal. A display control circuit, wherein buffer data is transmitted as the display image data.